1// Copyright 2018 The Fuchsia Authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#include <hwreg/bitfields.h>
6#include <zircon/types.h>
7
8namespace serial {
9
10constexpr uint32_t AML_UART_WFIFO = 0x0;
11constexpr uint32_t AML_UART_RFIFO = 0x4;
12
13class Control : public hwreg::RegisterBase<Control, uint32_t, hwreg::EnablePrinter> {
14public:
15    enum XmitLength {
16        kXmitLength8 = 0,
17        kXmitLength7 = 1,
18        kXmitLength6 = 2,
19        kXmitLength5 = 3,
20    };
21
22    enum Parity {
23        kParityNone = 0,
24        kParityEven = 2,
25        kParityOdd = 3,
26    };
27
28    enum StopLength {
29        kStopLen1 = 0,
30        kStopLen2 = 1,
31    };
32
33    DEF_BIT(31, inv_rts);
34    DEF_BIT(30, mask_err);
35    DEF_BIT(29, inv_cts);
36    DEF_BIT(28, tx_interrupt_enable);
37    DEF_BIT(27, rx_interrupt_enable);
38    DEF_BIT(26, inv_tx);
39    DEF_BIT(25, clear_error);
40    DEF_BIT(24, rst_rx);
41    DEF_BIT(22, rst_tx);
42    DEF_FIELD(21, 20, xmit_len);
43    DEF_FIELD(19, 18, parity);
44    DEF_FIELD(17, 16, stop_len);
45    DEF_BIT(15, two_wire);
46    DEF_BIT(13, rx_enable);
47    DEF_BIT(12, tx_enable);
48    DEF_FIELD(11, 0, baud0);
49
50    static auto Get() { return hwreg::RegisterAddr<Control>(0x8); }
51};
52
53class Status : public hwreg::RegisterBase<Status, uint32_t> {
54public:
55    DEF_BIT(26, rx_busy);
56    DEF_BIT(25, tx_busy);
57    DEF_BIT(24, rx_overflow);
58    DEF_BIT(23, cts_level);
59    DEF_BIT(22, tx_empty);
60    DEF_BIT(21, tx_full);
61    DEF_BIT(20, rx_empty);
62    DEF_BIT(19, rx_full);
63    DEF_BIT(18, tx_overflow);
64    DEF_BIT(17, frame_error);
65    DEF_BIT(16, parity_error);
66    DEF_FIELD(15, 8, tx_count);
67    DEF_FIELD(7, 0, rx_count);
68
69    static auto Get() { return hwreg::RegisterAddr<Status>(0xC); }
70};
71
72class Misc : public hwreg::RegisterBase<Misc, uint32_t> {
73public:
74    DEF_FIELD(15, 8, xmit_irq_count);
75    DEF_FIELD(7, 0, recv_irq_count);
76
77    static auto Get() { return hwreg::RegisterAddr<Misc>(0x10); }
78};
79
80class Reg5 : public hwreg::RegisterBase<Reg5, uint32_t, hwreg::EnablePrinter> {
81public:
82    DEF_BIT(26, xtal_tick);
83    DEF_BIT(24, use_xtal_clk);
84    DEF_BIT(23, use_new_baud_rate);
85    DEF_FIELD(22, 0, new_baud_rate);
86
87    static auto Get() { return hwreg::RegisterAddr<Reg5>(0x14); }
88};
89
90#define AML_UART_REG5_NEW_BAUD_RATE_MASK 0x7fffff
91
92} // namespace serial
93