1// Copyright 2018 The Fuchsia Authors. All rights reserved. 2// Use of this source code is governed by a BSD-style license that can be 3// found in the LICENSE file. 4 5#include <soc/aml-s905d2/s905d2-gpio.h> 6 7static aml_gpio_block_t s905d2_gpio_blocks[] = { 8 // GPIO Z Block 9 { 10 .start_pin = (S905D2_GPIOZ_START + 0), 11 .pin_block = S905D2_GPIOZ_START, 12 .pin_count = 8, 13 .mux_offset = S905D2_PERIPHS_PIN_MUX_6, 14 .oen_offset = S905D2_PREG_PAD_GPIO4_EN_N, 15 .input_offset = S905D2_PREG_PAD_GPIO4_I, 16 .output_offset = S905D2_PREG_PAD_GPIO4_O, 17 .output_shift = 0, 18 .pull_offset = S905D2_PULL_UP_REG4, 19 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG4, 20 .mmio_index = 0, 21 .pin_start = S905D2_GPIOZ_PIN_START, 22 .lock = MTX_INIT, 23 }, 24 { 25 .start_pin = (S905D2_GPIOZ_START + 8), 26 .pin_block = S905D2_GPIOZ_START, 27 .pin_count = 8, 28 .mux_offset = S905D2_PERIPHS_PIN_MUX_7, 29 .oen_offset = S905D2_PREG_PAD_GPIO4_EN_N, 30 .input_offset = S905D2_PREG_PAD_GPIO4_I, 31 .output_offset = S905D2_PREG_PAD_GPIO4_O, 32 .output_shift = 0, 33 .pull_offset = S905D2_PULL_UP_REG4, 34 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG4, 35 .mmio_index = 0, 36 .pin_start = S905D2_GPIOZ_PIN_START, 37 .lock = MTX_INIT, 38 }, 39 // GPIO A Block 40 { 41 .start_pin = (S905D2_GPIOA_START + 0), 42 .pin_block = S905D2_GPIOA_START, 43 .pin_count = 8, 44 .mux_offset = S905D2_PERIPHS_PIN_MUX_D, 45 .oen_offset = S905D2_PREG_PAD_GPIO5_EN_N, 46 .input_offset = S905D2_PREG_PAD_GPIO5_I, 47 .output_offset = S905D2_PREG_PAD_GPIO5_O, 48 .output_shift = 0, 49 .pull_offset = S905D2_PULL_UP_REG5, 50 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG5, 51 .mmio_index = 0, 52 .pin_start = S905D2_GPIOA_PIN_START, 53 .lock = MTX_INIT, 54 }, 55 { 56 .start_pin = (S905D2_GPIOA_START + 8), 57 .pin_block = S905D2_GPIOA_START, 58 .pin_count = 8, 59 .mux_offset = S905D2_PERIPHS_PIN_MUX_E, 60 .oen_offset = S905D2_PREG_PAD_GPIO5_EN_N, 61 .input_offset = S905D2_PREG_PAD_GPIO5_I, 62 .output_offset = S905D2_PREG_PAD_GPIO5_O, 63 .output_shift = 0, 64 .pull_offset = S905D2_PULL_UP_REG5, 65 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG5, 66 .mmio_index = 0, 67 .pin_start = S905D2_GPIOA_PIN_START, 68 .lock = MTX_INIT, 69 }, 70 // GPIO BOOT Block 71 { 72 .start_pin = (S905D2_GPIOBOOT_START + 0), 73 .pin_block = S905D2_GPIOBOOT_START, 74 .pin_count = 8, 75 .mux_offset = S905D2_PERIPHS_PIN_MUX_0, 76 .oen_offset = S905D2_PREG_PAD_GPIO0_EN_N, 77 .input_offset = S905D2_PREG_PAD_GPIO0_I, 78 .output_offset = S905D2_PREG_PAD_GPIO0_O, 79 .output_shift = 0, 80 .pull_offset = S905D2_PULL_UP_REG0, 81 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG0, 82 .mmio_index = 0, 83 .pin_start = S905D2_GPIOBOOT_PIN_START, 84 .lock = MTX_INIT, 85 }, 86 { 87 .start_pin = (S905D2_GPIOBOOT_START + 8), 88 .pin_block = S905D2_GPIOBOOT_START, 89 .pin_count = 8, 90 .mux_offset = S905D2_PERIPHS_PIN_MUX_1, 91 .oen_offset = S905D2_PREG_PAD_GPIO0_EN_N, 92 .input_offset = S905D2_PREG_PAD_GPIO0_I, 93 .output_offset = S905D2_PREG_PAD_GPIO0_O, 94 .output_shift = 0, 95 .pull_offset = S905D2_PULL_UP_REG0, 96 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG0, 97 .mmio_index = 0, 98 .pin_start = S905D2_GPIOBOOT_PIN_START, 99 .lock = MTX_INIT, 100 }, 101 // GPIO C Block 102 { 103 .start_pin = (S905D2_GPIOC_START + 0), 104 .pin_block = S905D2_GPIOC_START, 105 .pin_count = 8, 106 .mux_offset = S905D2_PERIPHS_PIN_MUX_9, 107 .oen_offset = S905D2_PREG_PAD_GPIO1_EN_N, 108 .input_offset = S905D2_PREG_PAD_GPIO1_I, 109 .output_offset = S905D2_PREG_PAD_GPIO1_O, 110 .pull_offset = S905D2_PULL_UP_REG1, 111 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG1, 112 .output_shift = 0, 113 .mmio_index = 0, 114 .pin_start = S905D2_GPIOC_PIN_START, 115 .lock = MTX_INIT, 116 }, 117 // GPIO X Block 118 { 119 .start_pin = (S905D2_GPIOX_START + 0), 120 .pin_block = S905D2_GPIOX_START, 121 .pin_count = 8, 122 .mux_offset = S905D2_PERIPHS_PIN_MUX_3, 123 .oen_offset = S905D2_PREG_PAD_GPIO2_EN_N, 124 .input_offset = S905D2_PREG_PAD_GPIO2_I, 125 .output_offset = S905D2_PREG_PAD_GPIO2_O, 126 .output_shift = 0, 127 .pull_offset = S905D2_PULL_UP_REG2, 128 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG2, 129 .mmio_index = 0, 130 .pin_start = S905D2_GPIOX_PIN_START, 131 .lock = MTX_INIT, 132 }, 133 { 134 .start_pin = (S905D2_GPIOX_START + 8), 135 .pin_block = S905D2_GPIOX_START, 136 .pin_count = 8, 137 .mux_offset = S905D2_PERIPHS_PIN_MUX_4, 138 .oen_offset = S905D2_PREG_PAD_GPIO2_EN_N, 139 .input_offset = S905D2_PREG_PAD_GPIO2_I, 140 .output_offset = S905D2_PREG_PAD_GPIO2_O, 141 .output_shift = 0, 142 .pull_offset = S905D2_PULL_UP_REG2, 143 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG2, 144 .mmio_index = 0, 145 .pin_start = S905D2_GPIOX_PIN_START, 146 .lock = MTX_INIT, 147 }, 148 { 149 .start_pin = (S905D2_GPIOX_START + 16), 150 .pin_block = S905D2_GPIOX_START, 151 .pin_count = 4, 152 .mux_offset = S905D2_PERIPHS_PIN_MUX_5, 153 .oen_offset = S905D2_PREG_PAD_GPIO2_EN_N, 154 .input_offset = S905D2_PREG_PAD_GPIO2_I, 155 .output_offset = S905D2_PREG_PAD_GPIO2_O, 156 .pull_offset = S905D2_PULL_UP_REG2, 157 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG2, 158 .output_shift = 0, 159 .mmio_index = 0, 160 .pin_start = S905D2_GPIOX_PIN_START, 161 .lock = MTX_INIT, 162 }, 163 // GPIO H Block 164 { 165 .start_pin = (S905D2_GPIOH_START + 0), 166 .pin_block = S905D2_GPIOH_START, 167 .pin_count = 8, 168 .mux_offset = S905D2_PERIPHS_PIN_MUX_B, 169 .oen_offset = S905D2_PREG_PAD_GPIO3_EN_N, 170 .input_offset = S905D2_PREG_PAD_GPIO3_I, 171 .output_offset = S905D2_PREG_PAD_GPIO3_O, 172 .pull_offset = S905D2_PULL_UP_REG3, 173 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG3, 174 .output_shift = 0, 175 .mmio_index = 0, 176 .pin_start = S905D2_GPIOH_PIN_START, 177 .lock = MTX_INIT, 178 }, 179 { 180 .start_pin = (S905D2_GPIOH_START + 8), 181 .pin_block = S905D2_GPIOH_START, 182 .pin_count = 1, 183 .mux_offset = S905D2_PERIPHS_PIN_MUX_C, 184 .oen_offset = S905D2_PREG_PAD_GPIO3_EN_N, 185 .input_offset = S905D2_PREG_PAD_GPIO3_I, 186 .output_offset = S905D2_PREG_PAD_GPIO3_O, 187 .pull_offset = S905D2_PULL_UP_REG3, 188 .pull_en_offset = S905D2_PAD_PULL_UP_EN_REG3, 189 .output_shift = 0, 190 .mmio_index = 0, 191 .pin_start = S905D2_GPIOH_PIN_START, 192 .lock = MTX_INIT, 193 }, 194 // GPIO AO Block 195 { 196 .start_pin = (S905D2_GPIOAO_START + 0), 197 .pin_block = S905D2_GPIOAO_START, 198 .pin_count = 8, 199 .mux_offset = S905D2_AO_RTI_PINMUX_REG0, 200 .oen_offset = S905D2_AO_GPIO_O_EN_N, 201 .input_offset = S905D2_AO_GPIO_I, 202 .output_offset = S905D2_AO_GPIO_O, 203 .output_shift = 0, 204 .pull_offset = S905D2_PULL_UP_REG3, 205 .pull_en_offset = S905D2_GPIOAO_PULL_EN_REG, 206 .mmio_index = 1, 207 .lock = MTX_INIT, 208 .pin_start = S905D2_GPIOA0_PIN_START, 209 }, 210 { 211 .start_pin = (S905D2_GPIOAO_START + 8), 212 .pin_block = S905D2_GPIOAO_START, 213 .pin_count = 4, 214 .mux_offset = S905D2_AO_RTI_PINMUX_REG1, 215 .oen_offset = S905D2_AO_GPIO_O_EN_N, 216 .input_offset = S905D2_AO_GPIO_I, 217 .output_offset = S905D2_AO_GPIO_O, 218 .output_shift = 0, 219 .pull_offset = S905D2_GPIOAO_PULL_UP_REG, 220 .pull_en_offset = S905D2_GPIOAO_PULL_EN_REG, 221 .mmio_index = 1, 222 .pin_start = S905D2_GPIOA0_PIN_START, 223 .lock = MTX_INIT, 224 }, 225 { 226 .start_pin = (S905D2_GPIOE_START + 0), 227 .pin_block = S905D2_GPIOE_START, 228 .pin_count = 3, 229 .mux_offset = S905D2_AO_RTI_PINMUX_REG1, 230 .oen_offset = S905D2_AO_GPIO_O_EN_N, 231 .input_offset = S905D2_AO_GPIO_I, 232 .output_offset = S905D2_AO_GPIO_O, 233 .output_shift = 16, 234 .pull_offset = S905D2_GPIOAO_PULL_UP_REG, 235 .pull_en_offset = S905D2_GPIOAO_PULL_EN_REG, 236 .mmio_index = 1, 237 .pin_start = S905D2_GPIOA0_PIN_START, 238 .lock = MTX_INIT, 239 }, 240}; 241 242static aml_gpio_interrupt_t s905d2_interrupt_block = { 243 .pin_0_3_select_offset = S905D2_GPIO_0_3_PIN_SELECT, 244 .pin_4_7_select_offset = S905D2_GPIO_4_7_PIN_SELECT, 245 .edge_polarity_offset = S905D2_GPIO_INT_EDGE_POLARITY, 246 .filter_select_offset = S905D2_GPIO_FILTER_SELECT, 247}; 248