1// Copyright 2018 The Fuchsia Authors. All rights reserved. 2// Use of this source code is governed by a BSD-style license that can be 3// found in the LICENSE file. 4 5#pragma once 6 7// Map all of 0-1GB into kernel space in one shot. 8#define PERIPHERAL_BASE_PHYS (0) 9#define PERIPHERAL_BASE_SIZE (0x40000000UL) // 1GB 10 11// Individual peripherals in this mapping. 12#define PCIE_ECAM_BASE_PHYS ((zx_paddr_t)(PERIPHERAL_BASE_PHYS + 0x808100000)) 13#define PCIE_ECAM_SIZE (0x100000) 14#define PCIE_MMIO_BASE_PHYS ((zx_paddr_t)(PERIPHERAL_BASE_PHYS + 0x808200000)) 15#define PCIE_MMIO_SIZE (0x100000) 16#define PCIE_INT_BASE (32) 17#define RTC_BASE_PHYS ((zx_paddr_t)(PERIPHERAL_BASE_PHYS + 0x808301000)) 18#define RTC_SIZE (0x1000) 19