1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1996, by Steve Passe 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the developer may NOT be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#ifndef __MACHINE_MPTABLE_H__ 29#define __MACHINE_MPTABLE_H__ 30 31enum busTypes { 32 NOBUS = 0, 33 CBUS = 1, 34 CBUSII = 2, 35 EISA = 3, 36 ISA = 6, 37 MCA = 9, 38 PCI = 13, 39 XPRESS = 18, 40 MAX_BUSTYPE = 18, 41 UNKNOWN_BUSTYPE = 0xff 42}; 43 44/* MP Floating Pointer Structure */ 45typedef struct MPFPS { 46 uint8_t signature[4]; 47 uint32_t pap; 48 uint8_t length; 49 uint8_t spec_rev; 50 uint8_t checksum; 51 uint8_t config_type; 52 uint8_t mpfb2; 53 uint8_t mpfb3; 54 uint8_t mpfb4; 55 uint8_t mpfb5; 56} __packed *mpfps_t; 57 58#define MPFB2_IMCR_PRESENT 0x80 59#define MPFB2_MUL_CLK_SRCS 0x40 60 61/* MP Configuration Table Header */ 62typedef struct MPCTH { 63 uint8_t signature[4]; 64 uint16_t base_table_length; 65 uint8_t spec_rev; 66 uint8_t checksum; 67 uint8_t oem_id[8]; 68 uint8_t product_id[12]; 69 uint32_t oem_table_pointer; 70 uint16_t oem_table_size; 71 uint16_t entry_count; 72 uint32_t apic_address; 73 uint16_t extended_table_length; 74 uint8_t extended_table_checksum; 75 uint8_t reserved; 76} __packed *mpcth_t; 77 78/* Base table entries */ 79 80#define MPCT_ENTRY_PROCESSOR 0 81#define MPCT_ENTRY_BUS 1 82#define MPCT_ENTRY_IOAPIC 2 83#define MPCT_ENTRY_INT 3 84#define MPCT_ENTRY_LOCAL_INT 4 85 86typedef struct PROCENTRY { 87 uint8_t type; 88 uint8_t apic_id; 89 uint8_t apic_version; 90 uint8_t cpu_flags; 91 uint32_t cpu_signature; 92 uint32_t feature_flags; 93 uint32_t reserved1; 94 uint32_t reserved2; 95} __packed *proc_entry_ptr; 96 97#define PROCENTRY_FLAG_EN 0x01 98#define PROCENTRY_FLAG_BP 0x02 99 100typedef struct BUSENTRY { 101 uint8_t type; 102 uint8_t bus_id; 103 uint8_t bus_type[6]; 104} __packed *bus_entry_ptr; 105 106typedef struct IOAPICENTRY { 107 uint8_t type; 108 uint8_t apic_id; 109 uint8_t apic_version; 110 uint8_t apic_flags; 111 uint32_t apic_address; 112} __packed *io_apic_entry_ptr; 113 114#define IOAPICENTRY_FLAG_EN 0x01 115 116typedef struct INTENTRY { 117 uint8_t type; 118 uint8_t int_type; 119 uint16_t int_flags; 120 uint8_t src_bus_id; 121 uint8_t src_bus_irq; 122 uint8_t dst_apic_id; 123 uint8_t dst_apic_int; 124} __packed *int_entry_ptr; 125 126#define INTENTRY_TYPE_INT 0 127#define INTENTRY_TYPE_NMI 1 128#define INTENTRY_TYPE_SMI 2 129#define INTENTRY_TYPE_EXTINT 3 130 131#define INTENTRY_FLAGS_POLARITY 0x3 132#define INTENTRY_FLAGS_POLARITY_CONFORM 0x0 133#define INTENTRY_FLAGS_POLARITY_ACTIVEHI 0x1 134#define INTENTRY_FLAGS_POLARITY_ACTIVELO 0x3 135#define INTENTRY_FLAGS_TRIGGER 0xc 136#define INTENTRY_FLAGS_TRIGGER_CONFORM 0x0 137#define INTENTRY_FLAGS_TRIGGER_EDGE 0x4 138#define INTENTRY_FLAGS_TRIGGER_LEVEL 0xc 139 140/* Extended table entries */ 141 142typedef struct EXTENTRY { 143 uint8_t type; 144 uint8_t length; 145} __packed *ext_entry_ptr; 146 147#define MPCT_EXTENTRY_SAS 0x80 148#define MPCT_EXTENTRY_BHD 0x81 149#define MPCT_EXTENTRY_CBASM 0x82 150 151typedef struct SASENTRY { 152 uint8_t type; 153 uint8_t length; 154 uint8_t bus_id; 155 uint8_t address_type; 156 uint64_t address_base; 157 uint64_t address_length; 158} __packed *sas_entry_ptr; 159 160#define SASENTRY_TYPE_IO 0 161#define SASENTRY_TYPE_MEMORY 1 162#define SASENTRY_TYPE_PREFETCH 2 163 164typedef struct BHDENTRY { 165 uint8_t type; 166 uint8_t length; 167 uint8_t bus_id; 168 uint8_t bus_info; 169 uint8_t parent_bus; 170 uint8_t reserved[3]; 171} __packed *bhd_entry_ptr; 172 173#define BHDENTRY_INFO_SUBTRACTIVE_DECODE 0x1 174 175typedef struct CBASMENTRY { 176 uint8_t type; 177 uint8_t length; 178 uint8_t bus_id; 179 uint8_t address_mod; 180 uint32_t predefined_range; 181} __packed *cbasm_entry_ptr; 182 183#define CBASMENTRY_ADDRESS_MOD_ADD 0x0 184#define CBASMENTRY_ADDRESS_MOD_SUBTRACT 0x1 185 186#define CBASMENTRY_RANGE_ISA_IO 0 187#define CBASMENTRY_RANGE_VGA_IO 1 188 189#ifdef _KERNEL 190struct mptable_hostb_softc { 191#ifdef NEW_PCIB 192 struct pcib_host_resources sc_host_res; 193 int sc_decodes_vga_io; 194 int sc_decodes_isa_io; 195#endif 196}; 197 198#ifdef NEW_PCIB 199void mptable_pci_host_res_init(device_t pcib); 200#endif 201int mptable_pci_probe_table(int bus); 202int mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin); 203#endif 204#endif /* !__MACHINE_MPTABLE_H__ */ 205