1/*-
2 * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause
3 *
4 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by TooLs GmbH.
19 * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 *    derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 *	$NetBSD: clock.c,v 1.9 2000/01/19 02:52:19 msaitoh Exp $
34 */
35/*
36 * Copyright (C) 2001 Benno Rice.
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 *    notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 *    notice, this list of conditions and the following disclaimer in the
46 *    documentation and/or other materials provided with the distribution.
47 *
48 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
51 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
52 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
53 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
54 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
55 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
56 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
57 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58 */
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/kernel.h>
63#include <sys/bus.h>
64#include <sys/interrupt.h>
65#include <sys/pcpu.h>
66#include <sys/sysctl.h>
67#include <sys/timeet.h>
68#include <sys/timetc.h>
69#include <sys/vdso.h>
70
71#include <dev/ofw/openfirm.h>
72
73#include <machine/clock.h>
74#include <machine/cpu.h>
75#include <machine/intr_machdep.h>
76#include <machine/md_var.h>
77#include <machine/smp.h>
78
79/*
80 * Initially we assume a processor with a bus frequency of 12.5 MHz.
81 */
82static int		initialized = 0;
83static uint64_t		ps_per_tick = 80000;
84static u_long		ticks_per_sec = 12500000;
85static u_long		*decr_counts[MAXCPU];
86
87static int		decr_et_start(struct eventtimer *et,
88    sbintime_t first, sbintime_t period);
89static int		decr_et_stop(struct eventtimer *et);
90static timecounter_get_t	decr_get_timecount;
91static uint32_t decr_vdso_timehands(struct vdso_timehands *vdso_th,
92    struct timecounter *tc);
93#ifdef COMPAT_FREEBSD32
94static uint32_t decr_vdso_timehands32(struct vdso_timehands32 *vdso_th32,
95    struct timecounter *tc);
96#endif
97
98struct decr_state {
99	int	mode;	/* 0 - off, 1 - periodic, 2 - one-shot. */
100	int32_t	div;	/* Periodic divisor. */
101};
102DPCPU_DEFINE_STATIC(struct decr_state, decr_state);
103
104static struct eventtimer	decr_et;
105static struct timecounter	decr_tc = {
106	.tc_get_timecount = 		decr_get_timecount,
107	.tc_counter_mask = 		~0u,
108	.tc_name = 			"timebase",
109	.tc_quality = 			1000,
110	.tc_fill_vdso_timehands = 	decr_vdso_timehands,
111#ifdef COMPAT_FREEBSD32
112	.tc_fill_vdso_timehands32 = 	decr_vdso_timehands32,
113#endif
114};
115
116/*
117 * Decrementer interrupt handler.
118 */
119void
120decr_intr(struct trapframe *frame)
121{
122	struct decr_state *s = DPCPU_PTR(decr_state);
123	int		nticks = 0;
124	int32_t		val;
125
126	if (!initialized)
127		return;
128
129	(*decr_counts[curcpu])++;
130
131#ifdef BOOKE
132	/*
133	 * Interrupt handler must reset DIS to avoid getting another
134	 * interrupt once EE is enabled.
135	 */
136	mtspr(SPR_TSR, TSR_DIS);
137#endif
138
139	if (s->mode == 1) {
140		/*
141		 * Based on the actual time delay since the last decrementer
142		 * reload, we arrange for earlier interrupt next time.
143		 */
144		__asm ("mfdec %0" : "=r"(val));
145		while (val < 0) {
146			val += s->div;
147			nticks++;
148		}
149		mtdec(val);
150	} else if (s->mode == 2) {
151		nticks = 1;
152		decr_et_stop(NULL);
153	} else if (s->mode == 0) {
154		/* Potemkin timer ran out without an event. Just reset it. */
155		decr_et_stop(NULL);
156	}
157
158	while (nticks-- > 0) {
159		if (decr_et.et_active)
160			decr_et.et_event_cb(&decr_et, decr_et.et_arg);
161	}
162}
163
164void
165cpu_initclocks(void)
166{
167
168	decr_tc_init();
169	cpu_initclocks_bsp();
170}
171
172/*
173 * BSP early initialization.
174 */
175void
176decr_init(void)
177{
178	struct cpuref cpu;
179	char buf[32];
180
181	/*
182	 * Check the BSP's timebase frequency. Sometimes we can't find the BSP,
183	 * so fall back to the first CPU in this case.
184	 */
185	if (platform_smp_get_bsp(&cpu) != 0)
186		platform_smp_first_cpu(&cpu);
187	ticks_per_sec = platform_timebase_freq(&cpu);
188	ps_per_tick = 1000000000000 / ticks_per_sec;
189
190	set_cputicker(mftb, ticks_per_sec, false);
191	snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
192	intrcnt_add(buf, &decr_counts[curcpu]);
193	decr_et_stop(NULL);
194	initialized = 1;
195}
196
197#ifdef SMP
198/*
199 * AP early initialization.
200 */
201void
202decr_ap_init(void)
203{
204	char buf[32];
205
206	snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
207	intrcnt_add(buf, &decr_counts[curcpu]);
208	decr_et_stop(NULL);
209}
210#endif
211
212/*
213 * Final initialization.
214 */
215void
216decr_tc_init(void)
217{
218
219	decr_tc.tc_frequency = ticks_per_sec;
220	tc_init(&decr_tc);
221	decr_et.et_name = "decrementer";
222	decr_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT |
223	    ET_FLAGS_PERCPU;
224	decr_et.et_quality = 1000;
225	decr_et.et_frequency = ticks_per_sec;
226	decr_et.et_min_period = (0x00000002LLU << 32) / ticks_per_sec;
227	decr_et.et_max_period = (0x7fffffffLLU << 32) / ticks_per_sec;
228	decr_et.et_start = decr_et_start;
229	decr_et.et_stop = decr_et_stop;
230	decr_et.et_priv = NULL;
231	et_register(&decr_et);
232}
233
234uint32_t
235decr_vdso_timehands(struct vdso_timehands *vdso_th, struct timecounter *tc)
236{
237	vdso_th->th_algo = VDSO_TH_ALGO_PPC_TB;
238	bzero(vdso_th->th_res, sizeof(vdso_th->th_res));
239	return (initialized == 1);
240}
241
242#ifdef COMPAT_FREEBSD32
243uint32_t
244decr_vdso_timehands32(struct vdso_timehands32 *vdso_th32,
245    struct timecounter *tc)
246{
247	vdso_th32->th_algo = VDSO_TH_ALGO_PPC_TB;
248	bzero(vdso_th32->th_res, sizeof(vdso_th32->th_res));
249	return (initialized == 1);
250}
251#endif
252
253/*
254 * Event timer start method.
255 */
256static int
257decr_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
258{
259	struct decr_state *s = DPCPU_PTR(decr_state);
260	uint32_t fdiv;
261#ifdef BOOKE
262	uint32_t tcr;
263#endif
264
265	if (period != 0) {
266		s->mode = 1;
267		s->div = (decr_et.et_frequency * period) >> 32;
268	} else {
269		s->mode = 2;
270		s->div = 0;
271	}
272	if (first != 0)
273		fdiv = (decr_et.et_frequency * first) >> 32;
274	else
275		fdiv = s->div;
276
277#ifdef BOOKE
278	tcr = mfspr(SPR_TCR);
279	tcr |= TCR_DIE;
280	if (s->mode == 1) {
281		mtspr(SPR_DECAR, s->div);
282		tcr |= TCR_ARE;
283	} else
284		tcr &= ~TCR_ARE;
285	mtdec(fdiv);
286	mtspr(SPR_TCR, tcr);
287#else
288	mtdec(fdiv);
289#endif
290
291	return (0);
292}
293
294/*
295 * Event timer stop method.
296 */
297static int
298decr_et_stop(struct eventtimer *et)
299{
300	struct decr_state *s = DPCPU_PTR(decr_state);
301#ifdef BOOKE
302	uint32_t tcr;
303#endif
304
305	s->mode = 0;
306	s->div = 0x7fffffff;
307#ifdef BOOKE
308	tcr = mfspr(SPR_TCR);
309	tcr &= ~(TCR_DIE | TCR_ARE);
310	mtspr(SPR_TCR, tcr);
311#else
312	mtdec(s->div);
313#endif
314	return (0);
315}
316
317/*
318 * Timecounter get method.
319 */
320static unsigned
321decr_get_timecount(struct timecounter *tc)
322{
323	return (mftb());
324}
325
326/*
327 * Wait for about n microseconds (at least!).
328 */
329void
330DELAY(int n)
331{
332	volatile u_quad_t	tb;
333	u_quad_t		ttb;
334
335	TSENTER();
336	tb = mftb();
337	ttb = tb + howmany((uint64_t)n * 1000000, ps_per_tick);
338	nop_prio_vlow();
339	while (tb < ttb)
340		tb = mftb();
341	nop_prio_medium();
342	TSEXIT();
343}
344