1/* $NetBSD: fpu_add.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ 2 3/*- 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Lawrence Berkeley Laboratory. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions 20 * are met: 21 * 1. Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * 2. Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * 3. Neither the name of the University nor the names of its contributors 27 * may be used to endorse or promote products derived from this software 28 * without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 * SUCH DAMAGE. 41 */ 42 43/* 44 * Perform an FPU add (return x + y). 45 * 46 * To subtract, negate y and call add. 47 */ 48 49#include <sys/types.h> 50#include <sys/systm.h> 51 52#include <machine/fpu.h> 53#include <machine/ieeefp.h> 54 55#include <powerpc/fpu/fpu_arith.h> 56#include <powerpc/fpu/fpu_emu.h> 57 58struct fpn * 59fpu_add(struct fpemu *fe) 60{ 61 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r; 62 u_int r0, r1, r2, r3; 63 int rd; 64 65 /* 66 * Put the `heavier' operand on the right (see fpu_emu.h). 67 * Then we will have one of the following cases, taken in the 68 * following order: 69 * 70 * - y = NaN. Implied: if only one is a signalling NaN, y is. 71 * The result is y. 72 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN 73 * case was taken care of earlier). 74 * If x = -y, the result is NaN. Otherwise the result 75 * is y (an Inf of whichever sign). 76 * - y is 0. Implied: x = 0. 77 * If x and y differ in sign (one positive, one negative), 78 * the result is +0 except when rounding to -Inf. If same: 79 * +0 + +0 = +0; -0 + -0 = -0. 80 * - x is 0. Implied: y != 0. 81 * Result is y. 82 * - other. Implied: both x and y are numbers. 83 * Do addition a la Hennessey & Patterson. 84 */ 85 DPRINTF(FPE_REG, ("fpu_add:\n")); 86 DUMPFPN(FPE_REG, x); 87 DUMPFPN(FPE_REG, y); 88 DPRINTF(FPE_REG, ("=>\n")); 89 ORDER(x, y); 90 if (ISNAN(y)) { 91 fe->fe_cx |= FPSCR_VXSNAN; 92 DUMPFPN(FPE_REG, y); 93 return (y); 94 } 95 if (ISINF(y)) { 96 if (ISINF(x) && x->fp_sign != y->fp_sign) { 97 fe->fe_cx |= FPSCR_VXISI; 98 return (fpu_newnan(fe)); 99 } 100 DUMPFPN(FPE_REG, y); 101 return (y); 102 } 103 rd = ((fe->fe_fpscr) & FPSCR_RN); 104 if (ISZERO(y)) { 105 if (rd != FP_RM) /* only -0 + -0 gives -0 */ 106 y->fp_sign &= x->fp_sign; 107 else /* any -0 operand gives -0 */ 108 y->fp_sign |= x->fp_sign; 109 DUMPFPN(FPE_REG, y); 110 return (y); 111 } 112 if (ISZERO(x)) { 113 DUMPFPN(FPE_REG, y); 114 return (y); 115 } 116 /* 117 * We really have two numbers to add, although their signs may 118 * differ. Make the exponents match, by shifting the smaller 119 * number right (e.g., 1.011 => 0.1011) and increasing its 120 * exponent (2^3 => 2^4). Note that we do not alter the exponents 121 * of x and y here. 122 */ 123 r = &fe->fe_f3; 124 r->fp_class = FPC_NUM; 125 if (x->fp_exp == y->fp_exp) { 126 r->fp_exp = x->fp_exp; 127 r->fp_sticky = 0; 128 } else { 129 if (x->fp_exp < y->fp_exp) { 130 /* 131 * Try to avoid subtract case iii (see below). 132 * This also guarantees that x->fp_sticky = 0. 133 */ 134 SWAP(x, y); 135 } 136 /* now x->fp_exp > y->fp_exp */ 137 r->fp_exp = x->fp_exp; 138 r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp); 139 } 140 r->fp_sign = x->fp_sign; 141 if (x->fp_sign == y->fp_sign) { 142 FPU_DECL_CARRY 143 144 /* 145 * The signs match, so we simply add the numbers. The result 146 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or 147 * 11.111...0). If so, a single bit shift-right will fix it 148 * (but remember to adjust the exponent). 149 */ 150 /* r->fp_mant = x->fp_mant + y->fp_mant */ 151 FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]); 152 FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]); 153 FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]); 154 FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]); 155 if ((r->fp_mant[0] = r0) >= FP_2) { 156 (void) fpu_shr(r, 1); 157 r->fp_exp++; 158 } 159 } else { 160 FPU_DECL_CARRY 161 162 /* 163 * The signs differ, so things are rather more difficult. 164 * H&P would have us negate the negative operand and add; 165 * this is the same as subtracting the negative operand. 166 * This is quite a headache. Instead, we will subtract 167 * y from x, regardless of whether y itself is the negative 168 * operand. When this is done one of three conditions will 169 * hold, depending on the magnitudes of x and y: 170 * case i) |x| > |y|. The result is just x - y, 171 * with x's sign, but it may need to be normalized. 172 * case ii) |x| = |y|. The result is 0 (maybe -0) 173 * so must be fixed up. 174 * case iii) |x| < |y|. We goofed; the result should 175 * be (y - x), with the same sign as y. 176 * We could compare |x| and |y| here and avoid case iii, 177 * but that would take just as much work as the subtract. 178 * We can tell case iii has occurred by an overflow. 179 * 180 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0. 181 */ 182 /* r->fp_mant = x->fp_mant - y->fp_mant */ 183 FPU_SET_CARRY(y->fp_sticky); 184 FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]); 185 FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]); 186 FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]); 187 FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]); 188 if (r0 < FP_2) { 189 /* cases i and ii */ 190 if ((r0 | r1 | r2 | r3) == 0) { 191 /* case ii */ 192 r->fp_class = FPC_ZERO; 193 r->fp_sign = rd == FP_RM; 194 return (r); 195 } 196 } else { 197 /* 198 * Oops, case iii. This can only occur when the 199 * exponents were equal, in which case neither 200 * x nor y have sticky bits set. Flip the sign 201 * (to y's sign) and negate the result to get y - x. 202 */ 203#ifdef DIAGNOSTIC 204 if (x->fp_exp != y->fp_exp || r->fp_sticky) 205 panic("fpu_add"); 206#endif 207 r->fp_sign = y->fp_sign; 208 FPU_SUBS(r3, 0, r3); 209 FPU_SUBCS(r2, 0, r2); 210 FPU_SUBCS(r1, 0, r1); 211 FPU_SUBC(r0, 0, r0); 212 } 213 r->fp_mant[3] = r3; 214 r->fp_mant[2] = r2; 215 r->fp_mant[1] = r1; 216 r->fp_mant[0] = r0; 217 if (r0 < FP_1) 218 fpu_norm(r); 219 } 220 DUMPFPN(FPE_REG, r); 221 return (r); 222} 223