1 2/*- 3 * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 4 * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19#define RT2573_NOISE_FLOOR -95 20 21#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 22#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 23 24#define RT2573_CONFIG_NO 1 25#define RT2573_IFACE_INDEX 0 26 27#define RT2573_MCU_CNTL 0x01 28#define RT2573_WRITE_MAC 0x02 29#define RT2573_READ_MAC 0x03 30#define RT2573_WRITE_MULTI_MAC 0x06 31#define RT2573_READ_MULTI_MAC 0x07 32#define RT2573_READ_EEPROM 0x09 33#define RT2573_WRITE_LED 0x0a 34 35/* 36 * WME registers. 37 */ 38#define RT2573_AIFSN_CSR 0x0400 39#define RT2573_CWMIN_CSR 0x0404 40#define RT2573_CWMAX_CSR 0x0408 41#define RT2573_TXOP01_CSR 0x040C 42#define RT2573_TXOP23_CSR 0x0410 43#define RT2573_MCU_CODE_BASE 0x0800 44 45/* 46 * H/w encryption/decryption support 47 */ 48#define KEY_SIZE (IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE) 49#define RT2573_ADDR_MAX 64 50#define RT2573_SKEY_MAX 4 51 52#define RT2573_SKEY(vap, kidx) (0x1000 + ((vap) * RT2573_SKEY_MAX + \ 53 (kidx)) * KEY_SIZE) 54#define RT2573_PKEY(id) (0x1200 + (id) * KEY_SIZE) 55 56#define RT2573_ADDR_ENTRY(id) (0x1a00 + (id) * 8) 57 58/* 59 * Shared memory area 60 */ 61#define RT2573_HW_BCN_BASE(id) (0x2400 + (id) * 0x100) 62 63/* 64 * Control and status registers. 65 */ 66#define RT2573_MAC_CSR0 0x3000 67#define RT2573_MAC_CSR1 0x3004 68#define RT2573_MAC_CSR2 0x3008 69#define RT2573_MAC_CSR3 0x300c 70#define RT2573_MAC_CSR4 0x3010 71#define RT2573_MAC_CSR5 0x3014 72#define RT2573_MAC_CSR6 0x3018 73#define RT2573_MAC_CSR7 0x301c 74#define RT2573_MAC_CSR8 0x3020 75#define RT2573_MAC_CSR9 0x3024 76#define RT2573_MAC_CSR10 0x3028 77#define RT2573_MAC_CSR11 0x302c 78#define RT2573_MAC_CSR12 0x3030 79#define RT2573_MAC_CSR13 0x3034 80#define RT2573_MAC_CSR14 0x3038 81#define RT2573_MAC_CSR15 0x303c 82#define RT2573_TXRX_CSR0 0x3040 83#define RT2573_TXRX_CSR1 0x3044 84#define RT2573_TXRX_CSR2 0x3048 85#define RT2573_TXRX_CSR3 0x304c 86#define RT2573_TXRX_CSR4 0x3050 87#define RT2573_TXRX_CSR5 0x3054 88#define RT2573_TXRX_CSR6 0x3058 89#define RT2573_TXRX_CSR7 0x305c 90#define RT2573_TXRX_CSR8 0x3060 91#define RT2573_TXRX_CSR9 0x3064 92#define RT2573_TXRX_CSR10 0x3068 93#define RT2573_TXRX_CSR11 0x306c 94#define RT2573_TXRX_CSR12 0x3070 95#define RT2573_TXRX_CSR13 0x3074 96#define RT2573_TXRX_CSR14 0x3078 97#define RT2573_TXRX_CSR15 0x307c 98#define RT2573_PHY_CSR0 0x3080 99#define RT2573_PHY_CSR1 0x3084 100#define RT2573_PHY_CSR2 0x3088 101#define RT2573_PHY_CSR3 0x308c 102#define RT2573_PHY_CSR4 0x3090 103#define RT2573_PHY_CSR5 0x3094 104#define RT2573_PHY_CSR6 0x3098 105#define RT2573_PHY_CSR7 0x309c 106#define RT2573_SEC_CSR0 0x30a0 107#define RT2573_SEC_CSR1 0x30a4 108#define RT2573_SEC_CSR2 0x30a8 109#define RT2573_SEC_CSR3 0x30ac 110#define RT2573_SEC_CSR4 0x30b0 111#define RT2573_SEC_CSR5 0x30b4 112#define RT2573_STA_CSR0 0x30c0 113#define RT2573_STA_CSR1 0x30c4 114#define RT2573_STA_CSR2 0x30c8 115#define RT2573_STA_CSR3 0x30cc 116#define RT2573_STA_CSR4 0x30d0 117#define RT2573_STA_CSR5 0x30d4 118 119/* possible values for register RT2573_ADDR_MODE */ 120#define RT2573_MODE_MASK 0x7 121#define RT2573_MODE_NOSEC 0 122#define RT2573_MODE_WEP40 1 123#define RT2573_MODE_WEP104 2 124#define RT2573_MODE_TKIP 3 125#define RT2573_MODE_AES_CCMP 4 126#define RT2573_MODE_CKIP40 5 127#define RT2573_MODE_CKIP104 6 128 129/* possible flags for register RT2573_MAC_CSR1 */ 130#define RT2573_RESET_ASIC (1 << 0) 131#define RT2573_RESET_BBP (1 << 1) 132#define RT2573_HOST_READY (1 << 2) 133 134/* possible flags for register MAC_CSR5 */ 135#define RT2573_NUM_BSSID_MSK(n) (((n * 3) & 3) << 16) 136 137/* possible flags for register MAC_CSR11 */ 138#define RT2573_AUTO_WAKEUP (1 << 15) 139#define RT2573_TBCN_EXP(n) ((n) << 8) 140#define RT2573_TBCN_EXP_MAX 0x7f 141#define RT2573_TBCN_DELAY(t) (t) 142#define RT2573_TBCN_DELAY_MAX 0xff 143 144/* possible flags for register TXRX_CSR0 */ 145/* Tx filter flags are in the low 16 bits */ 146#define RT2573_AUTO_TX_SEQ (1 << 15) 147/* Rx filter flags are in the high 16 bits */ 148#define RT2573_DISABLE_RX (1 << 16) 149#define RT2573_DROP_CRC_ERROR (1 << 17) 150#define RT2573_DROP_PHY_ERROR (1 << 18) 151#define RT2573_DROP_CTL (1 << 19) 152#define RT2573_DROP_NOT_TO_ME (1 << 20) 153#define RT2573_DROP_TODS (1 << 21) 154#define RT2573_DROP_VER_ERROR (1 << 22) 155#define RT2573_DROP_MULTICAST (1 << 23) 156#define RT2573_DROP_BROADCAST (1 << 24) 157#define RT2573_DROP_ACKCTS (1 << 25) 158 159/* possible flags for register TXRX_CSR4 */ 160#define RT2573_ACKCTS_PWRMGT (1 << 16) 161#define RT2573_SHORT_PREAMBLE (1 << 18) 162#define RT2573_MRR_ENABLED (1 << 19) 163#define RT2573_MRR_CCK_FALLBACK (1 << 22) 164#define RT2573_LONG_RETRY(max) ((max) << 24) 165#define RT2573_LONG_RETRY_MASK (0xf << 24) 166#define RT2573_SHORT_RETRY(max) ((max) << 28) 167#define RT2573_SHORT_RETRY_MASK (0xf << 28) 168 169/* possible flags for register TXRX_CSR9 */ 170#define RT2573_TSF_TIMER_EN (1 << 16) 171#define RT2573_TSF_SYNC_MODE(x) (((x) & 0x3) << 17) 172#define RT2573_TSF_SYNC_MODE_DIS 0 173#define RT2573_TSF_SYNC_MODE_STA 1 174#define RT2573_TSF_SYNC_MODE_IBSS 2 175#define RT2573_TSF_SYNC_MODE_HOSTAP 3 176#define RT2573_TBTT_TIMER_EN (1 << 19) 177#define RT2573_BCN_TX_EN (1 << 20) 178 179/* possible flags for register PHY_CSR0 */ 180#define RT2573_PA_PE_2GHZ (1 << 16) 181#define RT2573_PA_PE_5GHZ (1 << 17) 182 183/* possible flags for register PHY_CSR3 */ 184#define RT2573_BBP_READ (1 << 15) 185#define RT2573_BBP_BUSY (1 << 16) 186/* possible flags for register PHY_CSR4 */ 187#define RT2573_RF_20BIT (20 << 24) 188#define RT2573_RF_BUSY (1U << 31) 189 190/* LED values */ 191#define RT2573_LED_RADIO (1 << 8) 192#define RT2573_LED_G (1 << 9) 193#define RT2573_LED_A (1 << 10) 194#define RT2573_LED_ON 0x1e1e 195#define RT2573_LED_OFF 0x0 196 197/* USB vendor requests */ 198#define RT2573_MCU_SLEEP 7 199#define RT2573_MCU_RUN 8 200#define RT2573_MCU_WAKEUP 9 201 202#define RT2573_SMART_MODE (1 << 0) 203 204#define RT2573_BBPR94_DEFAULT 6 205 206#define RT2573_BBP_WRITE (1 << 15) 207 208/* dual-band RF */ 209#define RT2573_RF_5226 1 210#define RT2573_RF_5225 3 211/* single-band RF */ 212#define RT2573_RF_2528 2 213#define RT2573_RF_2527 4 214 215#define RT2573_BBP_VERSION 0 216 217struct rum_tx_desc { 218 uint32_t flags; 219#define RT2573_TX_BURST (1 << 0) 220#define RT2573_TX_VALID (1 << 1) 221#define RT2573_TX_MORE_FRAG (1 << 2) 222#define RT2573_TX_NEED_ACK (1 << 3) 223#define RT2573_TX_TIMESTAMP (1 << 4) 224#define RT2573_TX_OFDM (1 << 5) 225#define RT2573_TX_IFS_SIFS (1 << 6) 226#define RT2573_TX_LONG_RETRY (1 << 7) 227#define RT2573_TX_TKIPMIC (1 << 8) 228#define RT2573_TX_KEY_PAIR (1 << 9) 229#define RT2573_TX_KEY_ID(id) (((id) & 0x3f) << 10) 230#define RT2573_TX_CIP_MODE(m) ((m) << 29) 231 232 uint16_t wme; 233#define RT2573_QID(v) (v) 234#define RT2573_AIFSN(v) ((v) << 4) 235#define RT2573_LOGCWMIN(v) ((v) << 8) 236#define RT2573_LOGCWMAX(v) ((v) << 12) 237 238 uint8_t hdrlen; 239 uint8_t xflags; 240#define RT2573_TX_HWSEQ (1 << 4) 241 242 uint8_t plcp_signal; 243 uint8_t plcp_service; 244#define RT2573_PLCP_LENGEXT 0x80 245 246 uint8_t plcp_length_lo; 247 uint8_t plcp_length_hi; 248 249 uint32_t iv; 250 uint32_t eiv; 251 252 uint8_t offset; 253 uint8_t qid; 254 uint8_t txpower; 255#define RT2573_DEFAULT_TXPOWER 0 256 257 uint8_t reserved; 258} __packed; 259 260struct rum_rx_desc { 261 uint32_t flags; 262#define RT2573_RX_BUSY (1 << 0) 263#define RT2573_RX_DROP (1 << 1) 264#define RT2573_RX_UC2ME (1 << 2) 265#define RT2573_RX_MC (1 << 3) 266#define RT2573_RX_BC (1 << 4) 267#define RT2573_RX_MYBSS (1 << 5) 268#define RT2573_RX_CRC_ERROR (1 << 6) 269#define RT2573_RX_OFDM (1 << 7) 270 271#define RT2573_RX_DEC_MASK (3 << 8) 272#define RT2573_RX_DEC_OK (0 << 8) 273 274#define RT2573_RX_IV_ERROR (1 << 8) 275#define RT2573_RX_MIC_ERROR (2 << 8) 276#define RT2573_RX_KEY_ERROR (3 << 8) 277 278#define RT2573_RX_KEY_PAIR (1 << 28) 279 280#define RT2573_RX_CIP_MASK (7 << 29) 281#define RT2573_RX_CIP_MODE(m) ((m) << 29) 282 283 uint8_t rate; 284 uint8_t rssi; 285 uint8_t reserved1; 286 uint8_t offset; 287 uint32_t iv; 288 uint32_t eiv; 289 uint32_t reserved2[2]; 290} __packed; 291 292#define RT2573_RF1 0 293#define RT2573_RF2 2 294#define RT2573_RF3 1 295#define RT2573_RF4 3 296 297#define RT2573_EEPROM_MACBBP 0x0000 298#define RT2573_EEPROM_ADDRESS 0x0004 299#define RT2573_EEPROM_ANTENNA 0x0020 300#define RT2573_EEPROM_CONFIG2 0x0022 301#define RT2573_EEPROM_BBP_BASE 0x0026 302#define RT2573_EEPROM_TXPOWER 0x0046 303#define RT2573_EEPROM_FREQ_OFFSET 0x005e 304#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 305#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 306