1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2004-2006 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <sys/param.h> 30#include <sys/systm.h> 31#include <sys/bus.h> 32#include <sys/conf.h> 33#include <machine/bus.h> 34#include <sys/lock.h> 35#include <sys/mutex.h> 36#include <sys/rman.h> 37#include <sys/serial.h> 38 39#include <dev/scc/scc_bfe.h> 40#include <dev/scc/scc_bus.h> 41 42#include <dev/ic/z8530.h> 43 44#include "scc_if.h" 45 46static int z8530_bfe_attach(struct scc_softc *, int); 47static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *); 48static int z8530_bfe_ipend(struct scc_softc *); 49static int z8530_bfe_probe(struct scc_softc *); 50 51/* Channel B is always at 0 offset. */ 52#define CHAN_A (-(sc->sc_class->cl_range)) 53#define CHAN_B 0 54 55static kobj_method_t z8530_methods[] = { 56 KOBJMETHOD(scc_attach, z8530_bfe_attach), 57 KOBJMETHOD(scc_iclear, z8530_bfe_iclear), 58 KOBJMETHOD(scc_ipend, z8530_bfe_ipend), 59 KOBJMETHOD(scc_probe, z8530_bfe_probe), 60 KOBJMETHOD_END 61}; 62 63/* 64 * escc (macio) spacing. 65 */ 66struct scc_class scc_z8530_escc_class = { 67 "z8530 escc class", 68 z8530_methods, 69 sizeof(struct scc_softc), 70 .cl_channels = 2, 71 .cl_class = SCC_CLASS_Z8530, 72 .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC, 73 /* Negative .cl_range signifies this is channel spacing. */ 74 .cl_range = (CHAN_B - 16), 75}; 76 77/* 78 * SUN compatible channel spacing. 79 */ 80struct scc_class scc_z8530_legacy_class = { 81 "z8530 legacy class", 82 z8530_methods, 83 sizeof(struct scc_softc), 84 .cl_channels = 2, 85 .cl_class = SCC_CLASS_Z8530, 86 .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC, 87 /* Negative .cl_range signifies this is channel spacing. */ 88 .cl_range = (CHAN_B - 2), 89}; 90 91/* Multiplexed I/O. */ 92static __inline uint8_t 93scc_getmreg(struct scc_bas *bas, int ch, int reg) 94{ 95 96 scc_setreg(bas, ch + REG_CTRL, reg); 97 scc_barrier(bas); 98 return (scc_getreg(bas, ch + REG_CTRL)); 99} 100 101static int 102z8530_bfe_attach(struct scc_softc *sc __unused, int reset __unused) 103{ 104 105 return (0); 106} 107 108static int 109z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch) 110{ 111 struct scc_bas *bas; 112 int c; 113 114 bas = &sc->sc_bas; 115 c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B; 116 mtx_lock_spin(&sc->sc_hwmtx); 117 if (ch->ch_ipend & SER_INT_TXIDLE) { 118 scc_setreg(bas, c + REG_CTRL, CR_RSTTXI); 119 scc_barrier(bas); 120 } 121 if (ch->ch_ipend & SER_INT_RXREADY) { 122 scc_getreg(bas, c + REG_DATA); 123 scc_barrier(bas); 124 } 125 if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK)) 126 scc_setreg(bas, c + REG_CTRL, CR_RSTERR); 127 mtx_unlock_spin(&sc->sc_hwmtx); 128 return (0); 129} 130 131#define SIGCHG(c, i, s, d) \ 132 if (c) { \ 133 i |= (i & s) ? s : s | d; \ 134 } else { \ 135 i = (i & s) ? (i & ~s) | d : i; \ 136 } 137 138static int 139z8530_bfe_ipend(struct scc_softc *sc) 140{ 141 struct scc_bas *bas; 142 struct scc_chan *ch[2]; 143 uint32_t sig; 144 uint8_t bes, ip, src; 145 146 bas = &sc->sc_bas; 147 ch[0] = &sc->sc_chan[0]; 148 ch[1] = &sc->sc_chan[1]; 149 ch[0]->ch_ipend = 0; 150 ch[1]->ch_ipend = 0; 151 152 mtx_lock_spin(&sc->sc_hwmtx); 153 ip = scc_getmreg(bas, CHAN_A, RR_IP); 154 if (ip & IP_RIA) 155 ch[0]->ch_ipend |= SER_INT_RXREADY; 156 if (ip & IP_RIB) 157 ch[1]->ch_ipend |= SER_INT_RXREADY; 158 if (ip & IP_TIA) 159 ch[0]->ch_ipend |= SER_INT_TXIDLE; 160 if (ip & IP_TIB) 161 ch[1]->ch_ipend |= SER_INT_TXIDLE; 162 if (ip & IP_SIA) { 163 bes = scc_getmreg(bas, CHAN_A, CR_RSTXSI); 164 if (bes & BES_BRK) 165 ch[0]->ch_ipend |= SER_INT_BREAK; 166 sig = ch[0]->ch_hwsig; 167 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 168 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 169 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 170 if (sig & SER_MASK_DELTA) { 171 ch[0]->ch_hwsig = sig; 172 ch[0]->ch_ipend |= SER_INT_SIGCHG; 173 } 174 src = scc_getmreg(bas, CHAN_A, RR_SRC); 175 if (src & SRC_OVR) 176 ch[0]->ch_ipend |= SER_INT_OVERRUN; 177 } 178 if (ip & IP_SIB) { 179 bes = scc_getmreg(bas, CHAN_B, CR_RSTXSI); 180 if (bes & BES_BRK) 181 ch[1]->ch_ipend |= SER_INT_BREAK; 182 sig = ch[1]->ch_hwsig; 183 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 184 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 185 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 186 if (sig & SER_MASK_DELTA) { 187 ch[1]->ch_hwsig = sig; 188 ch[1]->ch_ipend |= SER_INT_SIGCHG; 189 } 190 src = scc_getmreg(bas, CHAN_B, RR_SRC); 191 if (src & SRC_OVR) 192 ch[1]->ch_ipend |= SER_INT_OVERRUN; 193 } 194 mtx_unlock_spin(&sc->sc_hwmtx); 195 196 return (ch[0]->ch_ipend | ch[1]->ch_ipend); 197} 198 199static int 200z8530_bfe_probe(struct scc_softc *sc __unused) 201{ 202 203 return (0); 204} 205