1/* SPDX-License-Identifier: BSD-3-Clause */
2/* Copyright(c) 2007-2022 Intel Corporation */
3#ifndef ADF_PFVF_MSG_H
4#define ADF_PFVF_MSG_H
5
6/*
7 * PF<->VF Gen2 Messaging format
8 *
9 * The PF has an array of 32-bit PF2VF registers, one for each VF. The
10 * PF can access all these registers while each VF can access only the one
11 * register associated with that particular VF.
12 *
13 * The register functionally is split into two parts:
14 * The bottom half is for PF->VF messages. In particular when the first
15 * bit of this register (bit 0) gets set an interrupt will be triggered
16 * in the respective VF.
17 * The top half is for VF->PF messages. In particular when the first bit
18 * of this half of register (bit 16) gets set an interrupt will be triggered
19 * in the PF.
20 *
21 * The remaining bits within this register are available to encode messages.
22 * and implement a collision control mechanism to prevent concurrent use of
23 * the PF2VF register by both the PF and VF.
24 *
25 *  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
26 *  _______________________________________________
27 * |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |
28 * +-----------------------------------------------+
29 *  \___________________________/ \_________/ ^   ^
30 *                ^                    ^      |   |
31 *                |                    |      |   VF2PF Int
32 *                |                    |      Message Origin
33 *                |                    Message Type
34 *                Message-specific Data/Reserved
35 *
36 *  15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
37 *  _______________________________________________
38 * |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |
39 * +-----------------------------------------------+
40 *  \___________________________/ \_________/ ^   ^
41 *                ^                    ^      |   |
42 *                |                    |      |   PF2VF Int
43 *                |                    |      Message Origin
44 *                |                    Message Type
45 *                Message-specific Data/Reserved
46 *
47 * Message Origin (Should always be 1)
48 * A legacy out-of-tree QAT driver allowed for a set of messages not supported
49 * by this driver; these had a Msg Origin of 0 and are ignored by this driver.
50 *
51 * When a PF or VF attempts to send a message in the lower or upper 16 bits,
52 * respectively, the other 16 bits are written to first with a defined
53 * IN_USE_BY pattern as part of a collision control scheme (see function
54 * adf_gen2_pfvf_send() in adf_pf2vf_msg.c).
55 *
56 *
57 * PF<->VF Gen4 Messaging format
58 *
59 * Similarly to the gen2 messaging format, 32-bit long registers are used for
60 * communication between PF and VFs. However, each VF and PF share a pair of
61 * 32-bits register to avoid collisions: one for PV to VF messages and one
62 * for VF to PF messages.
63 *
64 * Both the Interrupt bit and the Message Origin bit retain the same position
65 * and meaning, although non-system messages are now deprecated and not
66 * expected.
67 *
68 *  31 30              9  8  7  6  5  4  3  2  1  0
69 *  _______________________________________________
70 * |  |  |   . . .   |  |  |  |  |  |  |  |  |  |  |
71 * +-----------------------------------------------+
72 *  \_____________________/ \_______________/  ^  ^
73 *             ^                     ^         |  |
74 *             |                     |         |  PF/VF Int
75 *             |                     |         Message Origin
76 *             |                     Message Type
77 *             Message-specific Data/Reserved
78 *
79 * For both formats, the message reception is acknowledged by lowering the
80 * interrupt bit on the register where the message was sent.
81 */
82
83/* PFVF message common bits */
84#define ADF_PFVF_INT BIT(0)
85#define ADF_PFVF_MSGORIGIN_SYSTEM BIT(1)
86
87/* Different generations have different CSR layouts, use this struct
88 * to abstract these differences away
89 */
90struct pfvf_message {
91	u8 type;
92	u32 data;
93};
94
95/* PF->VF messages */
96enum pf2vf_msgtype {
97	ADF_PF2VF_MSGTYPE_RESTARTING = 0x01,
98	ADF_PF2VF_MSGTYPE_VERSION_RESP = 0x02,
99	ADF_PF2VF_MSGTYPE_BLKMSG_RESP = 0x03,
100	/* Values from 0x10 are Gen4 specific, message type is only 4 bits in
101	   Gen2 devices. */
102	ADF_PF2VF_MSGTYPE_RP_RESET_RESP = 0x10,
103};
104
105/* VF->PF messages */
106enum vf2pf_msgtype {
107	ADF_VF2PF_MSGTYPE_INIT = 0x03,
108	ADF_VF2PF_MSGTYPE_SHUTDOWN = 0x04,
109	ADF_VF2PF_MSGTYPE_VERSION_REQ = 0x05,
110	ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ = 0x06,
111	ADF_VF2PF_MSGTYPE_LARGE_BLOCK_REQ = 0x07,
112	ADF_VF2PF_MSGTYPE_MEDIUM_BLOCK_REQ = 0x08,
113	ADF_VF2PF_MSGTYPE_SMALL_BLOCK_REQ = 0x09,
114	/* Values from 0x10 are Gen4 specific, message type is only 4 bits in
115	   Gen2 devices. */
116	ADF_VF2PF_MSGTYPE_RP_RESET = 0x10,
117};
118
119/* VF/PF compatibility version. */
120enum pfvf_compatibility_version {
121	/* Support for extended capabilities */
122	ADF_PFVF_COMPAT_CAPABILITIES = 0x02,
123	/* In-use pattern cleared by receiver */
124	ADF_PFVF_COMPAT_FAST_ACK = 0x03,
125	/* Ring to service mapping support for non-standard mappings */
126	ADF_PFVF_COMPAT_RING_TO_SVC_MAP = 0x04,
127	/* Reference to the latest version */
128	ADF_PFVF_COMPAT_THIS_VERSION = 0x04,
129};
130
131/* PF->VF Version Response */
132#define ADF_PF2VF_VERSION_RESP_VERS_MASK GENMASK(7, 0)
133#define ADF_PF2VF_VERSION_RESP_RESULT_MASK GENMASK(9, 8)
134
135enum pf2vf_compat_response {
136	ADF_PF2VF_VF_COMPATIBLE = 0x01,
137	ADF_PF2VF_VF_INCOMPATIBLE = 0x02,
138	ADF_PF2VF_VF_COMPAT_UNKNOWN = 0x03,
139};
140
141enum ring_reset_result {
142	RPRESET_SUCCESS = 0x00,
143	RPRESET_NOT_SUPPORTED = 0x01,
144	RPRESET_INVAL_BANK = 0x02,
145	RPRESET_TIMEOUT = 0x03,
146};
147
148#define ADF_VF2PF_RNG_RESET_RP_MASK GENMASK(1, 0)
149#define ADF_VF2PF_RNG_RESET_RSVD_MASK GENMASK(25, 2)
150
151/* PF->VF Block Responses */
152#define ADF_PF2VF_BLKMSG_RESP_TYPE_MASK GENMASK(1, 0)
153#define ADF_PF2VF_BLKMSG_RESP_DATA_MASK GENMASK(9, 2)
154
155enum pf2vf_blkmsg_resp_type {
156	ADF_PF2VF_BLKMSG_RESP_TYPE_DATA = 0x00,
157	ADF_PF2VF_BLKMSG_RESP_TYPE_CRC = 0x01,
158	ADF_PF2VF_BLKMSG_RESP_TYPE_ERROR = 0x02,
159};
160
161/* PF->VF Block Error Code */
162enum pf2vf_blkmsg_error {
163	ADF_PF2VF_INVALID_BLOCK_TYPE = 0x00,
164	ADF_PF2VF_INVALID_BYTE_NUM_REQ = 0x01,
165	ADF_PF2VF_PAYLOAD_TRUNCATED = 0x02,
166	ADF_PF2VF_UNSPECIFIED_ERROR = 0x03,
167};
168
169/* VF->PF Block Requests */
170#define ADF_VF2PF_LARGE_BLOCK_TYPE_MASK GENMASK(1, 0)
171#define ADF_VF2PF_LARGE_BLOCK_BYTE_MASK GENMASK(8, 2)
172#define ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK GENMASK(2, 0)
173#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK GENMASK(8, 3)
174#define ADF_VF2PF_SMALL_BLOCK_TYPE_MASK GENMASK(3, 0)
175#define ADF_VF2PF_SMALL_BLOCK_BYTE_MASK GENMASK(8, 4)
176#define ADF_VF2PF_BLOCK_CRC_REQ_MASK BIT(9)
177
178/* PF->VF Block Request Types
179 *  0..15 - 32 byte message
180 * 16..23 - 64 byte message
181 * 24..27 - 128 byte message
182 */
183enum vf2pf_blkmsg_req_type {
184	ADF_VF2PF_BLKMSG_REQ_CAP_SUMMARY = 0x02,
185	ADF_VF2PF_BLKMSG_REQ_RING_SVC_MAP = 0x03,
186};
187
188#define ADF_VF2PF_SMALL_BLOCK_TYPE_MAX                                         \
189	(FIELD_MAX(ADF_VF2PF_SMALL_BLOCK_TYPE_MASK))
190
191#define ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX                                        \
192	(FIELD_MAX(ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK) +                         \
193	 ADF_VF2PF_SMALL_BLOCK_TYPE_MAX + 1)
194
195#define ADF_VF2PF_LARGE_BLOCK_TYPE_MAX                                         \
196	(FIELD_MAX(ADF_VF2PF_LARGE_BLOCK_TYPE_MASK) +                          \
197	 ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX)
198
199#define ADF_VF2PF_SMALL_BLOCK_BYTE_MAX                                         \
200	FIELD_MAX(ADF_VF2PF_SMALL_BLOCK_BYTE_MASK)
201
202#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_MAX                                        \
203	FIELD_MAX(ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK)
204
205#define ADF_VF2PF_LARGE_BLOCK_BYTE_MAX                                         \
206	FIELD_MAX(ADF_VF2PF_LARGE_BLOCK_BYTE_MASK)
207
208struct pfvf_blkmsg_header {
209	u8 version;
210	u8 payload_size;
211} __packed;
212
213#define ADF_PFVF_BLKMSG_HEADER_SIZE (sizeof(struct pfvf_blkmsg_header))
214#define ADF_PFVF_BLKMSG_PAYLOAD_SIZE(blkmsg)                                   \
215	(sizeof(blkmsg) - ADF_PFVF_BLKMSG_HEADER_SIZE)
216#define ADF_PFVF_BLKMSG_MSG_SIZE(blkmsg)                                       \
217	(ADF_PFVF_BLKMSG_HEADER_SIZE + (blkmsg)->hdr.payload_size)
218#define ADF_PFVF_BLKMSG_MSG_MAX_SIZE 128
219
220/* PF->VF Block message header bytes */
221#define ADF_PFVF_BLKMSG_VER_BYTE 0
222#define ADF_PFVF_BLKMSG_LEN_BYTE 1
223
224/* PF/VF Capabilities message values */
225enum blkmsg_capabilities_versions {
226	ADF_PFVF_CAPABILITIES_V1_VERSION = 0x01,
227	ADF_PFVF_CAPABILITIES_V2_VERSION = 0x02,
228	ADF_PFVF_CAPABILITIES_V3_VERSION = 0x03,
229};
230
231struct capabilities_v1 {
232	struct pfvf_blkmsg_header hdr;
233	u32 ext_dc_caps;
234} __packed;
235
236struct capabilities_v2 {
237	struct pfvf_blkmsg_header hdr;
238	u32 ext_dc_caps;
239	u32 capabilities;
240} __packed;
241
242struct capabilities_v3 {
243	struct pfvf_blkmsg_header hdr;
244	u32 ext_dc_caps;
245	u32 capabilities;
246	u32 frequency;
247} __packed;
248
249/* PF/VF Ring to service mapping values */
250enum blkmsg_ring_to_svc_versions {
251	ADF_PFVF_RING_TO_SVC_VERSION = 0x01,
252};
253
254struct ring_to_svc_map_v1 {
255	struct pfvf_blkmsg_header hdr;
256	u16 map;
257} __packed;
258
259#endif /* ADF_PFVF_MSG_H */
260