1/*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 2001,2002,2003 S��ren Schmidt <sos@FreeBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31/* misc defines */ 32MALLOC_DECLARE(M_PSTIOP); 33#define I2O_IOP_OUTBOUND_FRAME_COUNT 32 34#define I2O_IOP_OUTBOUND_FRAME_SIZE 0x20 35 36/* structure defs */ 37struct out_mfa_buf { 38 u_int32_t buf[I2O_IOP_OUTBOUND_FRAME_SIZE]; 39}; 40 41struct iop_softc { 42 struct resource *r_mem; 43 struct resource *r_irq; 44 caddr_t ibase; 45 caddr_t obase; 46 u_int32_t phys_obase; 47 struct i2o_registers *reg; 48 struct i2o_status_get_reply *status; 49 int lct_count; 50 struct i2o_lct_entry *lct; 51 int ism; 52 device_t dev; 53 struct mtx mtx; 54 int outstanding; 55 void *handle; 56 struct intr_config_hook *iop_delayed_attach; 57}; 58 59/* structure at start of IOP shared mem */ 60struct i2o_registers { 61 volatile u_int32_t apic_select; 62 volatile u_int32_t reserved0; 63 volatile u_int32_t apic_winreg; 64 volatile u_int32_t reserved1; 65 volatile u_int32_t iqueue_reg0; 66 volatile u_int32_t iqueue_reg1; 67 volatile u_int32_t oqueue_reg0; 68 volatile u_int32_t oqueue_reg1; 69 volatile u_int32_t iqueue_event; 70 volatile u_int32_t iqueue_intr_status; 71 volatile u_int32_t iqueue_intr_mask; 72 volatile u_int32_t oqueue_event; 73 volatile u_int32_t oqueue_intr_status; 74 volatile u_int32_t oqueue_intr_mask; 75#define I2O_OUT_INTR_QUEUE 0x08 76#define I2O_OUT_INTR_BELL 0x04 77#define I2O_OUT_INTR_MSG1 0x02 78#define I2O_OUT_INTR_MSG0 0x01 79 80 volatile u_int64_t reserved2; 81 volatile u_int32_t iqueue; 82 volatile u_int32_t oqueue; 83 volatile u_int64_t reserved3; 84 volatile u_int64_t mac_addr; 85 volatile u_int32_t ip_addr; 86 volatile u_int32_t ip_mask; 87}; 88 89/* Scatter/Gather List management */ 90struct i2o_sgl { 91 u_int32_t count:24; 92#define I2O_SGL_CNT_MASK 0xffffff 93 94 u_int32_t flags:8; 95#define I2O_SGL_SIMPLE 0x10 96#define I2O_SGL_PAGELIST 0x20 97#define I2O_SGL_CHAIN 0x30 98#define I2O_SGL_ATTRIBUTE 0x7c 99#define I2O_SGL_BC0 0x01 100#define I2O_SGL_BC1 0x02 101#define I2O_SGL_DIR 0x04 102#define I2O_SGL_LA 0x08 103#define I2O_SGL_EOB 0x40 104#define I2O_SGL_END 0x80 105 106 u_int32_t phys_addr[1]; 107} __packed; 108 109#define I2O_SGL_MAX_SEGS ((I2O_IOP_OUTBOUND_FRAME_SIZE - (8 + 2)) + 1) 110 111/* i2o command codes */ 112#define I2O_UTIL_NOP 0x00 113#define I2O_UTIL_PARAMS_GET 0x06 114#define I2O_UTIL_CLAIM 0x09 115#define I2O_UTIL_CONFIG_DIALOG 0x10 116#define I2O_UTIL_EVENT_REGISTER 0x13 117#define I2O_BSA_BLOCK_READ 0x30 118#define I2O_BSA_BLOCK_WRITE 0x31 119#define I2O_BSA_CACHE_FLUSH 0x37 120#define I2O_EXEC_STATUS_GET 0xa0 121#define I2O_EXEC_OUTBOUND_INIT 0xa1 122#define I2O_EXEC_LCT_NOTIFY 0xa2 123#define I2O_EXEC_SYSTAB_SET 0xa3 124#define I2O_EXEC_IOP_RESET 0xbd 125#define I2O_EXEC_SYS_ENABLE 0xd1 126#define I2O_PRIVATE_MESSAGE 0xff 127 128/* basic message layout */ 129struct i2o_basic_message { 130 u_int8_t version:4; 131 u_int8_t offset:4; 132 u_int8_t message_flags; 133 u_int16_t message_size; 134 u_int32_t target_address:12; 135 u_int32_t initiator_address:12; 136 u_int32_t function:8; 137 u_int32_t initiator_context; 138 u_int32_t transaction_context; 139} __packed; 140 141/* basic reply layout */ 142struct i2o_single_reply { 143 u_int8_t version_offset; 144 u_int8_t message_flags; 145#define I2O_MESSAGE_FLAGS_STATIC 0x01 146#define I2O_MESSAGE_FLAGS_64BIT 0x02 147#define I2O_MESSAGE_FLAGS_MULTIPLE 0x10 148#define I2O_MESSAGE_FLAGS_FAIL 0x20 149#define I2O_MESSAGE_FLAGS_LAST 0x40 150#define I2O_MESSAGE_FLAGS_REPLY 0x80 151 152 u_int16_t message_size; 153 u_int32_t target_address:12; 154 u_int32_t initiator_address:12; 155 u_int32_t function:8; 156 u_int32_t initiator_context; 157 u_int32_t transaction_context; 158 u_int16_t detailed_status; 159#define I2O_DETAIL_STATUS_SUCCESS 0x0000 160#define I2O_DETAIL_STATUS_BAD_KEY 0x0002 161#define I2O_DETAIL_STATUS_TCL_ERROR 0x0003 162#define I2O_DETAIL_STATUS_REPLY_BUFFER_FULL 0x0004 163#define I2O_DETAIL_STATUS_NO_SUCH_PAGE 0x0005 164#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_SOFT 0x0006 165#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_HARD 0x0007 166#define I2O_DETAIL_STATUS_CHAIN_BUFFER_TOO_LARGE 0x0009 167#define I2O_DETAIL_STATUS_UNSUPPORTED_FUNCTION 0x000a 168#define I2O_DETAIL_STATUS_DEVICE_LOCKED 0x000b 169#define I2O_DETAIL_STATUS_DEVICE_RESET 0x000c 170#define I2O_DETAIL_STATUS_INAPPROPRIATE_FUNCTION 0x000d 171#define I2O_DETAIL_STATUS_INVALID_INITIATOR_ADDRESS 0x000e 172#define I2O_DETAIL_STATUS_INVALID_MESSAGE_FLAGS 0x000f 173#define I2O_DETAIL_STATUS_INVALID_OFFSET 0x0010 174#define I2O_DETAIL_STATUS_INVALID_PARAMETER 0x0011 175#define I2O_DETAIL_STATUS_INVALID_REQUEST 0x0012 176#define I2O_DETAIL_STATUS_INVALID_TARGET_ADDRESS 0x0013 177#define I2O_DETAIL_STATUS_MESSAGE_TOO_LARGE 0x0014 178#define I2O_DETAIL_STATUS_MESSAGE_TOO_SMALL 0x0015 179#define I2O_DETAIL_STATUS_MISSING_PARAMETER 0x0016 180#define I2O_DETAIL_STATUS_TIMEOUT 0x0017 181#define I2O_DETAIL_STATUS_UNKNOWN_ERROR 0x0018 182#define I2O_DETAIL_STATUS_UNKNOWN_FUNCTION 0x0019 183#define I2O_DETAIL_STATUS_UNSUPPORTED_VERSION 0x001a 184#define I2O_DETAIL_STATUS_DEVICE_BUSY 0x001b 185#define I2O_DETAIL_STATUS_DEVICE_NOT_AVAILABLE 0x001c 186 187 u_int8_t retry_count; 188 u_int8_t status; 189#define I2O_REPLY_STATUS_SUCCESS 0x00 190#define I2O_REPLY_STATUS_ABORT_DIRTY 0x01 191#define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02 192#define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03 193#define I2O_REPLY_STATUS_ERROR_DIRTY 0x04 194#define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05 195#define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06 196#define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08 197#define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09 198#define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0a 199#define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0b 200#define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80 201 202 u_int32_t donecount; 203} __packed; 204 205struct i2o_fault_reply { 206 u_int8_t version_offset; 207 u_int8_t message_flags; 208 u_int16_t message_size; 209 u_int32_t target_address:12; 210 u_int32_t initiator_address:12; 211 u_int32_t function:8; 212 u_int32_t initiator_context; 213 u_int32_t transaction_context; 214 u_int8_t lowest_version; 215 u_int8_t highest_version; 216 u_int8_t severity; 217#define I2O_SEVERITY_FORMAT_ERROR 0x01 218#define I2O_SEVERITY_PATH_ERROR 0x02 219#define I2O_SEVERITY_PATH_STATE 0x04 220#define I2O_SEVERITY_CONGESTION 0x08 221 222 u_int8_t failure_code; 223#define I2O_FAILURE_CODE_TRANSPORT_SERVICE_SUSPENDED 0x81 224#define I2O_FAILURE_CODE_TRANSPORT_SERVICE_TERMINATED 0x82 225#define I2O_FAILURE_CODE_TRANSPORT_CONGESTION 0x83 226#define I2O_FAILURE_CODE_TRANSPORT_FAIL 0x84 227#define I2O_FAILURE_CODE_TRANSPORT_STATE_ERROR 0x85 228#define I2O_FAILURE_CODE_TRANSPORT_TIME_OUT 0x86 229#define I2O_FAILURE_CODE_TRANSPORT_ROUTING_FAILURE 0x87 230#define I2O_FAILURE_CODE_TRANSPORT_INVALID_VERSION 0x88 231#define I2O_FAILURE_CODE_TRANSPORT_INVALID_OFFSET 0x89 232#define I2O_FAILURE_CODE_TRANSPORT_INVALID_MSG_FLAGS 0x8A 233#define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_SMALL 0x8B 234#define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_LARGE 0x8C 235#define I2O_FAILURE_CODE_TRANSPORT_INVALID_TARGET_ID 0x8D 236#define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_ID 0x8E 237#define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F 238#define I2O_FAILURE_CODE_TRANSPORT_UNKNOWN_FAILURE 0xFF 239 240 u_int32_t failing_iop_id:12; 241 u_int32_t reserved:4; 242 u_int32_t failing_host_unit_id:16; 243 u_int32_t age_limit; 244 u_int64_t preserved_mfa; 245} __packed; 246 247struct i2o_exec_iop_reset_message { 248 u_int8_t version_offset; 249 u_int8_t message_flags; 250 u_int16_t message_size; 251 u_int32_t target_address:12; 252 u_int32_t initiator_address:12; 253 u_int32_t function:8; 254 u_int8_t reserved[16]; 255 u_int32_t status_word_low_addr; 256 u_int32_t status_word_high_addr; 257} __packed; 258 259struct i2o_exec_status_get_message { 260 u_int8_t version_offset; 261 u_int8_t message_flags; 262 u_int16_t message_size; 263 u_int32_t target_address:12; 264 u_int32_t initiator_address:12; 265 u_int32_t function:8; 266 u_int8_t reserved[16]; 267 u_int32_t reply_buf_low_addr; 268 u_int32_t reply_buf_high_addr; 269 u_int32_t reply_buf_length; 270} __packed; 271 272struct i2o_status_get_reply { 273 u_int16_t organization_id; 274 u_int16_t reserved; 275 u_int32_t iop_id:12; 276 u_int32_t reserved1:4; 277 u_int32_t host_unit_id:16; 278 u_int32_t segment_number:12; 279 u_int32_t i2o_version:4; 280 u_int32_t iop_state:8; 281#define I2O_IOP_STATE_INITIALIZING 0x01 282#define I2O_IOP_STATE_RESET 0x02 283#define I2O_IOP_STATE_HOLD 0x04 284#define I2O_IOP_STATE_READY 0x05 285#define I2O_IOP_STATE_OPERATIONAL 0x08 286#define I2O_IOP_STATE_FAILED 0x10 287#define I2O_IOP_STATE_FAULTED 0x11 288 289 u_int32_t messenger_type:8; 290 u_int16_t inbound_mframe_size; 291 u_int8_t init_code; 292 u_int8_t reserved2; 293 u_int32_t max_inbound_mframes; 294 u_int32_t current_ibound_mframes; 295 u_int32_t max_outbound_mframes; 296 u_int8_t product_idstring[24]; 297 u_int32_t expected_lct_size; 298 u_int32_t iop_capabilities; 299 u_int32_t desired_private_memsize; 300 u_int32_t current_private_memsize; 301 u_int32_t current_private_membase; 302 u_int32_t desired_private_iosize; 303 u_int32_t current_private_iosize; 304 u_int32_t current_private_iobase; 305 u_int8_t reserved3[3]; 306 u_int8_t sync_byte; 307} __packed; 308 309struct i2o_exec_init_outqueue_message { 310 u_int8_t version_offset; 311 u_int8_t message_flags; 312 u_int16_t message_size; 313 u_int32_t target_address:12; 314 u_int32_t initiator_address:12; 315 u_int32_t function:8; 316 u_int32_t initiator_context; 317 u_int32_t transaction_context; 318 u_int32_t host_pagesize; 319 u_int8_t init_code; 320 u_int8_t reserved; 321 u_int16_t queue_framesize; 322 struct i2o_sgl sgl[2]; 323} __packed; 324 325#define I2O_EXEC_OUTBOUND_INIT_IN_PROGRESS 0x01 326#define I2O_EXEC_OUTBOUND_INIT_REJECTED 0x02 327#define I2O_EXEC_OUTBOUND_INIT_FAILED 0x03 328#define I2O_EXEC_OUTBOUND_INIT_COMPLETE 0x04 329 330struct i2o_exec_systab_set_message { 331 u_int8_t version_offset; 332 u_int8_t message_flags; 333 u_int16_t message_size; 334 u_int32_t target_address:12; 335 u_int32_t initiator_address:12; 336 u_int32_t function:8; 337 u_int32_t initiator_context; 338 u_int32_t transaction_context; 339 u_int32_t iop_id:12; 340#define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_IOP 0x000 341#define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_HOST 0x001 342#define I2O_EXEC_SYS_TAB_IOP_ID_UNKNOWN_IOP 0xfff 343 344 u_int32_t reserved1:4; 345 u_int32_t host_unit_id:16; 346#define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_LOCAL_UNIT 0x0000 347#define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_UNKNOWN_UNIT 0xffff 348 349 u_int32_t segment_number:12; 350#define I2O_EXEC_SYS_TAB_SEG_NUMBER_LOCAL_SEGMENT 0x000 351#define I2O_EXEC_SYS_TAB_SEG_NUMBER_UNKNOWN_SEGMENT 0xfff 352 353 u_int32_t reserved2:4; 354 u_int32_t reserved3:8; 355 struct i2o_sgl sgl[3]; 356} __packed; 357 358struct i2o_exec_systab { 359 u_int8_t entries; 360 u_int8_t version; 361#define I2O_RESOURCE_MANAGER_VERSION 0 362 363 u_int16_t reserved1; 364 u_int32_t change_id; 365 u_int64_t reserved2; 366 u_int16_t organization_id; 367 u_int16_t reserved3; 368 u_int32_t iop_id:12; 369 u_int32_t reserved4:20; 370 u_int32_t segment_number:12; 371 u_int32_t i2o_version:4; 372 u_int32_t iop_state:8; 373 u_int32_t messenger_type:8; 374 u_int16_t inbound_mframe_size; 375 u_int16_t reserved5; 376 u_int32_t last_changed; 377 u_int32_t iop_capabilities; 378 u_int64_t messenger_info; 379} __packed; 380 381struct i2o_exec_get_lct_message { 382 u_int8_t version_offset; 383 u_int8_t message_flags; 384 u_int16_t message_size; 385 u_int32_t target_address:12; 386 u_int32_t initiator_address:12; 387 u_int32_t function:8; 388 u_int32_t initiator_context; 389 u_int32_t transaction_context; 390 u_int32_t class; 391 u_int32_t last_change_id; 392 struct i2o_sgl sgl; 393} __packed; 394 395#define I2O_TID_IOP 0x000 396#define I2O_TID_HOST 0x001 397#define I2O_TID_NONE 0xfff 398 399struct i2o_lct_entry { 400 u_int32_t entry_size:16; 401 u_int32_t local_tid:12; 402 u_int32_t reserved:4; 403 u_int32_t change_id; 404 u_int32_t device_flags; 405 u_int32_t class:12; 406#define I2O_CLASS_EXECUTIVE 0x000 407#define I2O_CLASS_DDM 0x001 408#define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010 409#define I2O_CLASS_SEQUENTIAL_STORAGE 0x011 410#define I2O_CLASS_LAN 0x020 411#define I2O_CLASS_WAN 0x030 412#define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040 413#define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041 414#define I2O_CLASS_SCSI_PERIPHERAL 0x051 415#define I2O_CLASS_ATE_PORT 0x060 416#define I2O_CLASS_ATE_PERIPHERAL 0x061 417#define I2O_CLASS_FLOPPY_CONTROLLER 0x070 418#define I2O_CLASS_FLOPPY_DEVICE 0x071 419#define I2O_CLASS_BUS_ADAPTER_PORT 0x080 420#define I2O_CLASS_MATCH_ANYCLASS 0xffffffff 421 422 u_int32_t class_version:4; 423 u_int32_t class_org:16; 424 u_int32_t sub_class; 425#define I2O_SUBCLASS_i960 0x001 426#define I2O_SUBCLASS_HDM 0x020 427#define I2O_SUBCLASS_ISM 0x021 428 429 u_int32_t user_tid:12; 430 u_int32_t parent_tid:12; 431 u_int32_t bios_info:8; 432 u_int8_t identity_tag[8]; 433 u_int32_t event_capabilities; 434} __packed; 435 436#define I2O_LCT_ENTRYSIZE (sizeof(struct i2o_lct_entry)/sizeof(u_int32_t)) 437 438struct i2o_get_lct_reply { 439 u_int32_t table_size:16; 440 u_int32_t boot_device:12; 441 u_int32_t lct_version:4; 442 u_int32_t iop_flags; 443 u_int32_t current_change_id; 444 struct i2o_lct_entry entry[1]; 445} __packed; 446 447struct i2o_util_get_param_message { 448 u_int8_t version_offset; 449 u_int8_t message_flags; 450 u_int16_t message_size; 451 u_int32_t target_address:12; 452 u_int32_t initiator_address:12; 453 u_int32_t function:8; 454 u_int32_t initiator_context; 455 u_int32_t transaction_context; 456 u_int32_t operation_flags; 457 struct i2o_sgl sgl[2]; 458} __packed; 459 460struct i2o_get_param_template { 461 u_int16_t operation; 462#define I2O_PARAMS_OPERATION_FIELD_GET 0x0001 463#define I2O_PARAMS_OPERATION_LIST_GET 0x0002 464#define I2O_PARAMS_OPERATION_MORE_GET 0x0003 465#define I2O_PARAMS_OPERATION_SIZE_GET 0x0004 466#define I2O_PARAMS_OPERATION_TABLE_GET 0x0005 467#define I2O_PARAMS_OPERATION_FIELD_SET 0x0006 468#define I2O_PARAMS_OPERATION_LIST_SET 0x0007 469#define I2O_PARAMS_OPERATION_ROW_ADD 0x0008 470#define I2O_PARAMS_OPERATION_ROW_DELETE 0x0009 471#define I2O_PARAMS_OPERATION_TABLE_CLEAR 0x000A 472 473 u_int16_t group; 474#define I2O_BSA_DEVICE_INFO_GROUP_NO 0x0000 475#define I2O_BSA_OPERATIONAL_CONTROL_GROUP_NO 0x0001 476#define I2O_BSA_POWER_CONTROL_GROUP_NO 0x0002 477#define I2O_BSA_CACHE_CONTROL_GROUP_NO 0x0003 478#define I2O_BSA_MEDIA_INFO_GROUP_NO 0x0004 479#define I2O_BSA_ERROR_LOG_GROUP_NO 0x0005 480 481#define I2O_UTIL_PARAMS_DESCRIPTOR_GROUP_NO 0xF000 482#define I2O_UTIL_PHYSICAL_DEVICE_TABLE_GROUP_NO 0xF001 483#define I2O_UTIL_CLAIMED_TABLE_GROUP_NO 0xF002 484#define I2O_UTIL_USER_TABLE_GROUP_NO 0xF003 485#define I2O_UTIL_PRIVATE_MESSAGE_EXTENSIONS_GROUP_NO 0xF005 486#define I2O_UTIL_AUTHORIZED_USER_TABLE_GROUP_NO 0xF006 487#define I2O_UTIL_DEVICE_IDENTITY_GROUP_NO 0xF100 488#define I2O_UTIL_DDM_IDENTITY_GROUP_NO 0xF101 489#define I2O_UTIL_USER_INFORMATION_GROUP_NO 0xF102 490#define I2O_UTIL_SGL_OPERATING_LIMITS_GROUP_NO 0xF103 491#define I2O_UTIL_SENSORS_GROUP_NO 0xF200 492 493 u_int16_t field_count; 494 u_int16_t pad; 495} __packed; 496 497struct i2o_get_param_operation { 498 u_int16_t operation_count; 499 u_int16_t reserved; 500 struct i2o_get_param_template operation[1]; 501} __packed; 502 503struct i2o_get_param_reply { 504 u_int16_t result_count; 505 u_int16_t reserved; 506 u_int16_t block_size; 507 u_int8_t block_status; 508 u_int8_t error_info_size; 509 u_int32_t result[1]; 510} __packed; 511 512struct i2o_device_identity { 513 u_int32_t class; 514 u_int16_t owner; 515 u_int16_t parent; 516 u_int8_t vendor[16]; 517 u_int8_t product[16]; 518 u_int8_t description[16]; 519 u_int8_t revision[8]; 520 u_int8_t sn_format; 521 u_int8_t serial[256]; 522} __packed; 523 524struct i2o_bsa_device { 525 u_int8_t device_type; 526 u_int8_t path_count; 527 u_int16_t power_state; 528 u_int32_t block_size; 529 u_int64_t capacity; 530 u_int32_t capabilities; 531 u_int32_t state; 532} __packed; 533 534struct i2o_util_claim_message { 535 u_int8_t version_offset; 536 u_int8_t message_flags; 537 u_int16_t message_size; 538 u_int32_t target_address:12; 539 u_int32_t initiator_address:12; 540 u_int32_t function:8; 541 u_int32_t initiator_context; 542 u_int32_t transaction_context; 543 u_int16_t claim_flags; 544 u_int8_t reserved; 545 u_int8_t claim_type; 546} __packed; 547 548struct i2o_util_event_register_message { 549 u_int8_t version_offset; 550 u_int8_t message_flags; 551 u_int16_t message_size; 552 u_int32_t target_address:12; 553 u_int32_t initiator_address:12; 554 u_int32_t function:8; 555 u_int32_t initiator_context; 556 u_int32_t transaction_context; 557 u_int32_t event_mask; 558} __packed; 559 560struct i2o_util_event_reply_message { 561 u_int8_t version_offset; 562 u_int8_t message_flags; 563 u_int16_t message_size; 564 u_int32_t target_address:12; 565 u_int32_t initiator_address:12; 566 u_int32_t function:8; 567 u_int32_t initiator_context; 568 u_int32_t transaction_context; 569 u_int32_t event_mask; 570 u_int32_t event_data[1]; 571} __packed; 572 573struct i2o_util_config_dialog_message { 574 u_int8_t version_offset; 575 u_int8_t message_flags; 576 u_int16_t message_size; 577 u_int32_t target_address:12; 578 u_int32_t initiator_address:12; 579 u_int32_t function:8; 580 u_int32_t initiator_context; 581 u_int32_t transaction_context; 582 u_int32_t page_number; 583 struct i2o_sgl sgl[2]; 584} __packed; 585 586struct i2o_private_message { 587 u_int8_t version_offset; 588 u_int8_t message_flags; 589 u_int16_t message_size; 590 u_int32_t target_address:12; 591 u_int32_t initiator_address:12; 592 u_int32_t function:8; 593 u_int32_t initiator_context; 594 u_int32_t transaction_context; 595 u_int16_t function_code; 596 u_int16_t organization_id; 597 struct i2o_sgl in_sgl; 598 struct i2o_sgl out_sgl; 599} __packed; 600 601struct i2o_bsa_rw_block_message { 602 u_int8_t version_offset; 603 u_int8_t message_flags; 604 u_int16_t message_size; 605 u_int32_t target_address:12; 606 u_int32_t initiator_address:12; 607 u_int32_t function:8; 608 u_int32_t initiator_context; 609 u_int32_t transaction_context; 610 u_int16_t control_flags; 611 u_int8_t time_multiplier; 612 u_int8_t fetch_ahead; 613 u_int32_t bytecount; 614 u_int64_t lba; 615 struct i2o_sgl sgl; 616} __packed; 617 618struct i2o_bsa_cache_flush_message { 619 u_int8_t version_offset; 620 u_int8_t message_flags; 621 u_int16_t message_size; 622 u_int32_t target_address:12; 623 u_int32_t initiator_address:12; 624 u_int32_t function:8; 625 u_int32_t initiator_context; 626 u_int32_t transaction_context; 627 u_int16_t control_flags; 628 u_int8_t time_multiplier; 629 u_int8_t reserved; 630} __packed; 631 632/* prototypes */ 633int iop_init(struct iop_softc *); 634void iop_attach(void *); 635void iop_intr(void *); 636int iop_reset(struct iop_softc *); 637int iop_init_outqueue(struct iop_softc *); 638int iop_get_lct(struct iop_softc *); 639struct i2o_get_param_reply *iop_get_util_params(struct iop_softc *,int,int,int); 640u_int32_t iop_get_mfa(struct iop_softc *); 641void iop_free_mfa(struct iop_softc *, int); 642int iop_queue_wait_msg(struct iop_softc *, int, struct i2o_basic_message *); 643int iop_create_sgl(struct i2o_basic_message *, caddr_t, int, int); 644 645/* global prototypes */ 646int pst_add_raid(struct iop_softc *, struct i2o_lct_entry *); 647