1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009 Yahoo! Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30/* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT2 controllers */ 31 32/* TODO Move headers to mpsvar */ 33#include <sys/types.h> 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/kernel.h> 37#include <sys/module.h> 38#include <sys/bus.h> 39#include <sys/conf.h> 40#include <sys/malloc.h> 41#include <sys/sysctl.h> 42#include <sys/uio.h> 43 44#include <machine/bus.h> 45#include <machine/resource.h> 46#include <sys/rman.h> 47 48#include <dev/pci/pcireg.h> 49#include <dev/pci/pcivar.h> 50#include <dev/pci/pci_private.h> 51 52#include <dev/mps/mpi/mpi2_type.h> 53#include <dev/mps/mpi/mpi2.h> 54#include <dev/mps/mpi/mpi2_ioc.h> 55#include <dev/mps/mpi/mpi2_cnfg.h> 56#include <dev/mps/mpi/mpi2_tool.h> 57 58#include <sys/queue.h> 59#include <sys/kthread.h> 60#include <dev/mps/mps_ioctl.h> 61#include <dev/mps/mpsvar.h> 62 63static int mps_pci_probe(device_t); 64static int mps_pci_attach(device_t); 65static int mps_pci_detach(device_t); 66static int mps_pci_suspend(device_t); 67static int mps_pci_resume(device_t); 68static void mps_pci_free(struct mps_softc *); 69static int mps_alloc_msix(struct mps_softc *sc, int msgs); 70static int mps_alloc_msi(struct mps_softc *sc, int msgs); 71static int mps_pci_alloc_interrupts(struct mps_softc *sc); 72 73static device_method_t mps_methods[] = { 74 DEVMETHOD(device_probe, mps_pci_probe), 75 DEVMETHOD(device_attach, mps_pci_attach), 76 DEVMETHOD(device_detach, mps_pci_detach), 77 DEVMETHOD(device_suspend, mps_pci_suspend), 78 DEVMETHOD(device_resume, mps_pci_resume), 79 80 DEVMETHOD_END 81}; 82 83static driver_t mps_pci_driver = { 84 "mps", 85 mps_methods, 86 sizeof(struct mps_softc) 87}; 88 89struct mps_ident { 90 uint16_t vendor; 91 uint16_t device; 92 uint16_t subvendor; 93 uint16_t subdevice; 94 u_int flags; 95 const char *desc; 96} mps_identifiers[] = { 97 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, 98 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2004" }, 99 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, 100 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2008" }, 101 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, 102 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, 104 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, 106 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2108" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, 108 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, 110 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2116" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, 112 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, 114 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, 116 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, 118 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, 120 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, 122 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2208" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1, 124 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 125 // Add Customer specific vender/subdevice id before generic 126 // (0xffff) vender/subdevice id. 127 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 128 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" }, 129 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 130 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" }, 131 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 132 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 134 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" }, 135 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 136 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 137 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3, 138 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS2308" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200, 140 0xffff, 0xffff, 0, "Avago Technologies (LSI) SSS6200" }, 141 { 0, 0, 0, 0, 0, NULL } 142}; 143 144DRIVER_MODULE(mps, pci, mps_pci_driver, 0, 0); 145MODULE_DEPEND(mps, cam, 1, 1, 1); 146MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice", pci, mps, 147 mps_identifiers, nitems(mps_identifiers) - 1); 148static struct mps_ident * 149mps_find_ident(device_t dev) 150{ 151 struct mps_ident *m; 152 153 for (m = mps_identifiers; m->vendor != 0; m++) { 154 if (m->vendor != pci_get_vendor(dev)) 155 continue; 156 if (m->device != pci_get_device(dev)) 157 continue; 158 if ((m->subvendor != 0xffff) && 159 (m->subvendor != pci_get_subvendor(dev))) 160 continue; 161 if ((m->subdevice != 0xffff) && 162 (m->subdevice != pci_get_subdevice(dev))) 163 continue; 164 return (m); 165 } 166 167 return (NULL); 168} 169 170static int 171mps_pci_probe(device_t dev) 172{ 173 struct mps_ident *id; 174 175 if ((id = mps_find_ident(dev)) != NULL) { 176 device_set_desc(dev, id->desc); 177 return (BUS_PROBE_DEFAULT); 178 } 179 return (ENXIO); 180} 181 182static int 183mps_pci_attach(device_t dev) 184{ 185 bus_dma_template_t t; 186 struct mps_softc *sc; 187 struct mps_ident *m; 188 int error; 189 190 sc = device_get_softc(dev); 191 bzero(sc, sizeof(*sc)); 192 sc->mps_dev = dev; 193 m = mps_find_ident(dev); 194 sc->mps_flags = m->flags; 195 196 mps_get_tunables(sc); 197 198 /* Twiddle basic PCI config bits for a sanity check */ 199 pci_enable_busmaster(dev); 200 201 /* Allocate the System Interface Register Set */ 202 sc->mps_regs_rid = PCIR_BAR(1); 203 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, 204 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { 205 mps_printf(sc, "Cannot allocate PCI registers\n"); 206 return (ENXIO); 207 } 208 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); 209 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); 210 211 /* Allocate the parent DMA tag */ 212 bus_dma_template_init(&t, bus_get_dma_tag(dev)); 213 if (bus_dma_template_tag(&t, &sc->mps_parent_dmat)) { 214 mps_printf(sc, "Cannot allocate parent DMA tag\n"); 215 mps_pci_free(sc); 216 return (ENOMEM); 217 } 218 219 if (((error = mps_pci_alloc_interrupts(sc)) != 0) || 220 ((error = mps_attach(sc)) != 0)) 221 mps_pci_free(sc); 222 223 return (error); 224} 225 226/* 227 * Allocate, but don't assign interrupts early. Doing it before requesting 228 * the IOCFacts message informs the firmware that we want to do MSI-X 229 * multiqueue. We might not use all of the available messages, but there's 230 * no reason to re-alloc if we don't. 231 */ 232static int 233mps_pci_alloc_interrupts(struct mps_softc *sc) 234{ 235 device_t dev; 236 int error, msgs; 237 238 dev = sc->mps_dev; 239 error = 0; 240 msgs = 0; 241 242 if (sc->disable_msix == 0) { 243 msgs = pci_msix_count(dev); 244 mps_dprint(sc, MPS_INIT, "Counted %d MSI-X messages\n", msgs); 245 msgs = min(msgs, sc->max_msix); 246 msgs = min(msgs, MPS_MSIX_MAX); 247 msgs = min(msgs, 1); /* XXX */ 248 if (msgs != 0) { 249 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 250 "MSI-X messages\n", msgs); 251 error = mps_alloc_msix(sc, msgs); 252 } 253 } 254 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) { 255 msgs = pci_msi_count(dev); 256 mps_dprint(sc, MPS_INIT, "Counted %d MSI messages\n", msgs); 257 msgs = min(msgs, MPS_MSI_MAX); 258 if (msgs != 0) { 259 mps_dprint(sc, MPS_INIT, "Attempting to allocate %d " 260 "MSI messages\n", MPS_MSI_MAX); 261 error = mps_alloc_msi(sc, MPS_MSI_MAX); 262 } 263 } 264 if ((error != 0) || (msgs == 0)) { 265 /* 266 * If neither MSI or MSI-X are avaiable, assume legacy INTx. 267 * This also implies that there will be only 1 queue. 268 */ 269 mps_dprint(sc, MPS_INIT, "Falling back to legacy INTx\n"); 270 sc->mps_flags |= MPS_FLAGS_INTX; 271 msgs = 1; 272 } else 273 sc->mps_flags |= MPS_FLAGS_MSI; 274 275 sc->msi_msgs = msgs; 276 mps_dprint(sc, MPS_INIT, "Allocated %d interrupts\n", msgs); 277 278 return (error); 279} 280 281int 282mps_pci_setup_interrupts(struct mps_softc *sc) 283{ 284 device_t dev; 285 struct mps_queue *q; 286 void *ihandler; 287 int i, error, rid, initial_rid; 288 289 dev = sc->mps_dev; 290 error = ENXIO; 291 292 if (sc->mps_flags & MPS_FLAGS_INTX) { 293 initial_rid = 0; 294 ihandler = mps_intr; 295 } else if (sc->mps_flags & MPS_FLAGS_MSI) { 296 initial_rid = 1; 297 ihandler = mps_intr_msi; 298 } else { 299 mps_dprint(sc, MPS_ERROR|MPS_INIT, 300 "Unable to set up interrupts\n"); 301 return (EINVAL); 302 } 303 304 for (i = 0; i < sc->msi_msgs; i++) { 305 q = &sc->queues[i]; 306 rid = i + initial_rid; 307 q->irq_rid = rid; 308 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 309 &q->irq_rid, RF_ACTIVE); 310 if (q->irq == NULL) { 311 mps_dprint(sc, MPS_ERROR|MPS_INIT, 312 "Cannot allocate interrupt RID %d\n", rid); 313 sc->msi_msgs = i; 314 break; 315 } 316 error = bus_setup_intr(dev, q->irq, 317 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler, 318 sc, &q->intrhand); 319 if (error) { 320 mps_dprint(sc, MPS_ERROR|MPS_INIT, 321 "Cannot setup interrupt RID %d\n", rid); 322 sc->msi_msgs = i; 323 break; 324 } 325 } 326 327 mps_dprint(sc, MPS_INIT, "Set up %d interrupts\n", sc->msi_msgs); 328 329 return (error); 330} 331 332static int 333mps_pci_detach(device_t dev) 334{ 335 struct mps_softc *sc; 336 int error; 337 338 sc = device_get_softc(dev); 339 340 if ((error = mps_free(sc)) != 0) 341 return (error); 342 343 mps_pci_free(sc); 344 return (0); 345} 346 347void 348mps_pci_free_interrupts(struct mps_softc *sc) 349{ 350 struct mps_queue *q; 351 int i; 352 353 if (sc->queues == NULL) 354 return; 355 356 for (i = 0; i < sc->msi_msgs; i++) { 357 q = &sc->queues[i]; 358 if (q->irq != NULL) { 359 bus_teardown_intr(sc->mps_dev, q->irq, 360 q->intrhand); 361 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 362 q->irq_rid, q->irq); 363 } 364 } 365} 366 367static void 368mps_pci_free(struct mps_softc *sc) 369{ 370 371 if (sc->mps_parent_dmat != NULL) { 372 bus_dma_tag_destroy(sc->mps_parent_dmat); 373 } 374 375 mps_pci_free_interrupts(sc); 376 377 if (sc->mps_flags & MPS_FLAGS_MSI) 378 pci_release_msi(sc->mps_dev); 379 380 if (sc->mps_regs_resource != NULL) { 381 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, 382 sc->mps_regs_rid, sc->mps_regs_resource); 383 } 384 385 return; 386} 387 388static int 389mps_pci_suspend(device_t dev) 390{ 391 return (EINVAL); 392} 393 394static int 395mps_pci_resume(device_t dev) 396{ 397 return (EINVAL); 398} 399 400static int 401mps_alloc_msix(struct mps_softc *sc, int msgs) 402{ 403 int error; 404 405 error = pci_alloc_msix(sc->mps_dev, &msgs); 406 return (error); 407} 408 409static int 410mps_alloc_msi(struct mps_softc *sc, int msgs) 411{ 412 int error; 413 414 error = pci_alloc_msi(sc->mps_dev, &msgs); 415 return (error); 416} 417 418int 419mps_pci_restore(struct mps_softc *sc) 420{ 421 struct pci_devinfo *dinfo; 422 423 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 424 425 dinfo = device_get_ivars(sc->mps_dev); 426 if (dinfo == NULL) { 427 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__); 428 return (EINVAL); 429 } 430 431 pci_cfg_restore(sc->mps_dev, dinfo); 432 return (0); 433} 434