1/*-
2 *  Copyright 2000-2020 Broadcom Inc. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 * 3. Neither the name of the author nor the names of any co-contributors
13 *    may be used to endorse or promote products derived from this software
14 *    without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD
29 */
30
31/*
32 *  Copyright 2000-2020 Broadcom Inc. All rights reserved.
33 *
34 *
35 *           Name:  mpi2_pci.h
36 *          Title:  MPI PCIe Attached Devices structures and definitions.
37 *  Creation Date:  October 9, 2012
38 *
39 *  mpi2_pci.h Version:  02.00.03
40 *
41 *  NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
42 *        prefix are for use only on MPI v2.5 products, and must not be used
43 *        with MPI v2.0 products. Unless otherwise noted, names beginning with
44 *        MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
45 *
46 *  Version History
47 *  ---------------
48 *
49 *  Date      Version   Description
50 *  --------  --------  ------------------------------------------------------
51 *  03-16-15  02.00.00  Initial version.
52 *  02-17-16  02.00.01  Removed AHCI support.
53 *                      Removed SOP support.
54 *  07-01-16  02.00.02  Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to
55 *                      NVME Encapsulated Request.
56 *  07-22-18  02.00.03  Updted flags field for NVME Encapsulated req
57 *  --------------------------------------------------------------------------
58 */
59
60#ifndef MPI2_PCI_H
61#define MPI2_PCI_H
62
63/*
64 * Values for the PCIe DeviceInfo field used in PCIe Device Status Change Event
65 * data and PCIe Configuration pages.
66 */
67#define MPI26_PCIE_DEVINFO_DIRECT_ATTACH        (0x00000010)
68
69#define MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE     (0x0000000F)
70#define MPI26_PCIE_DEVINFO_NO_DEVICE            (0x00000000)
71#define MPI26_PCIE_DEVINFO_PCI_SWITCH           (0x00000001)
72#define MPI26_PCIE_DEVINFO_NVME                 (0x00000003)
73
74/****************************************************************************
75*  NVMe Encapsulated message
76****************************************************************************/
77
78/* NVME Encapsulated Request Message */
79typedef struct _MPI26_NVME_ENCAPSULATED_REQUEST
80{
81    U16                     DevHandle;                      /* 0x00 */
82    U8                      ChainOffset;                    /* 0x02 */
83    U8                      Function;                       /* 0x03 */
84    U16                     EncapsulatedCommandLength;      /* 0x04 */
85    U8                      Reserved1;                      /* 0x06 */
86    U8                      MsgFlags;                       /* 0x07 */
87    U8                      VP_ID;                          /* 0x08 */
88    U8                      VF_ID;                          /* 0x09 */
89    U16                     Reserved2;                      /* 0x0A */
90    U32                     Reserved3;                      /* 0x0C */
91    U64                     ErrorResponseBaseAddress;       /* 0x10 */
92    U16                     ErrorResponseAllocationLength;  /* 0x18 */
93    U16                     Flags;                          /* 0x1A */
94    U32                     DataLength;                     /* 0x1C */
95    U8                      NVMe_Command[4];                /* 0x20 */ /* variable length */
96
97} MPI26_NVME_ENCAPSULATED_REQUEST, MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_REQUEST,
98  Mpi26NVMeEncapsulatedRequest_t, MPI2_POINTER pMpi26NVMeEncapsulatedRequest_t;
99
100/* defines for the Flags field */
101#define MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP       (0x0020)
102/* Submission Queue Type*/
103#define MPI26_NVME_FLAGS_SUBMISSIONQ_MASK           (0x0010)
104#define MPI26_NVME_FLAGS_SUBMISSIONQ_IO             (0x0000)
105#define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN          (0x0010)
106/* Error Response Address Space */
107#define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR        (0x000C)
108#define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR_MASK   (0x000C)
109#define MPI26_NVME_FLAGS_SYSTEM_RSP_ADDR            (0x0000)
110#define MPI26_NVME_FLAGS_IOCCTL_RSP_ADDR            (0x0008)
111/* Data Direction*/
112#define MPI26_NVME_FLAGS_DATADIRECTION_MASK         (0x0003)
113#define MPI26_NVME_FLAGS_NODATATRANSFER             (0x0000)
114#define MPI26_NVME_FLAGS_WRITE                      (0x0001)
115#define MPI26_NVME_FLAGS_READ                       (0x0002)
116#define MPI26_NVME_FLAGS_BIDIRECTIONAL              (0x0003)
117
118/* NVMe Encapuslated Reply Message */
119typedef struct _MPI26_NVME_ENCAPSULATED_ERROR_REPLY
120{
121    U16                     DevHandle;                      /* 0x00 */
122    U8                      MsgLength;                      /* 0x02 */
123    U8                      Function;                       /* 0x03 */
124    U16                     EncapsulatedCommandLength;      /* 0x04 */
125    U8                      Reserved1;                      /* 0x06 */
126    U8                      MsgFlags;                       /* 0x07 */
127    U8                      VP_ID;                          /* 0x08 */
128    U8                      VF_ID;                          /* 0x09 */
129    U16                     Reserved2;                      /* 0x0A */
130    U16                     Reserved3;                      /* 0x0C */
131    U16                     IOCStatus;                      /* 0x0E */
132    U32                     IOCLogInfo;                     /* 0x10 */
133    U16                     ErrorResponseCount;             /* 0x14 */
134    U16                     Reserved4;                      /* 0x16 */
135} MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
136  MPI2_POINTER PTR_MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
137  Mpi26NVMeEncapsulatedErrorReply_t,
138  MPI2_POINTER pMpi26NVMeEncapsulatedErrorReply_t;
139
140#endif
141