1/*-
2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31#ifndef DEV_MMC_HOST_DWMMC_VAR_H
32#define DEV_MMC_HOST_DWMMC_VAR_H
33
34#include <dev/clk/clk.h>
35#include <dev/hwreset/hwreset.h>
36#include <dev/regulator/regulator.h>
37
38#include "opt_mmccam.h"
39
40#include <cam/mmc/mmc_sim.h>
41
42enum {
43	HWTYPE_NONE,
44	HWTYPE_ALTERA,
45	HWTYPE_EXYNOS,
46	HWTYPE_HISILICON,
47	HWTYPE_ROCKCHIP,
48};
49
50struct dwmmc_softc {
51	struct resource		*res[2];
52	device_t		dev;
53	void			*intr_cookie;
54	struct mmc_host		host;
55	struct mmc_helper	mmc_helper;
56	struct mtx		sc_mtx;
57#ifdef MMCCAM
58	union ccb *		ccb;
59	struct mmc_sim		mmc_sim;
60#else
61	struct mmc_request	*req;
62#endif
63	struct mmc_command	*curcmd;
64	uint32_t		flags;
65	uint32_t		hwtype;
66	uint32_t		use_auto_stop;
67	uint32_t		use_pio;
68	device_t		child;
69	struct task		card_task;	/* Card presence check task */
70	struct timeout_task	card_delayed_task;/* Card insert delayed task */
71
72	int			(*update_ios)(struct dwmmc_softc *sc, struct mmc_ios *ios);
73
74	bus_dma_tag_t		desc_tag;
75	bus_dmamap_t		desc_map;
76	struct idmac_desc	*desc_ring;
77	bus_addr_t		desc_ring_paddr;
78	bus_dma_tag_t		buf_tag;
79	bus_dmamap_t		buf_map;
80
81	uint32_t		bus_busy;
82	uint32_t		dto_rcvd;
83	uint32_t		acd_rcvd;
84	uint32_t		cmd_done;
85	uint64_t		bus_hz;
86	uint32_t		fifo_depth;
87	uint32_t		num_slots;
88	uint32_t		sdr_timing;
89	uint32_t		ddr_timing;
90
91	clk_t			biu;
92	clk_t			ciu;
93	hwreset_t		hwreset;
94	regulator_t		vmmc;
95	regulator_t		vqmmc;
96};
97
98DECLARE_CLASS(dwmmc_driver);
99
100int dwmmc_attach(device_t);
101int dwmmc_detach(device_t);
102
103#endif
104