1/* 2 * Copyright 2017 Emmanuel Vadot <manu@freebsd.org> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are 6 * met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE 18 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 21 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 24 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/param.h> 28#include <sys/kernel.h> 29#include <sys/bus.h> 30#include <sys/module.h> 31#include <sys/queue.h> 32#include <sys/taskqueue.h> 33 34#include <machine/bus.h> 35 36#include <dev/mmc/bridge.h> 37#include <dev/mmc/mmc_fdt_helpers.h> 38 39#include <dev/ofw/ofw_bus_subr.h> 40 41#include <dev/clk/clk.h> 42 43#include <dev/mmc/host/dwmmc_var.h> 44 45#include "opt_mmccam.h" 46 47enum RKTYPE { 48 RK2928 = 1, 49 RK3288, 50}; 51 52static struct ofw_compat_data compat_data[] = { 53 {"rockchip,rk2928-dw-mshc", RK2928}, 54 {"rockchip,rk3288-dw-mshc", RK3288}, 55 {NULL, 0}, 56}; 57 58static int dwmmc_rockchip_update_ios(struct dwmmc_softc *sc, struct mmc_ios *ios); 59 60static int 61rockchip_dwmmc_probe(device_t dev) 62{ 63 64 if (!ofw_bus_status_okay(dev)) 65 return (ENXIO); 66 67 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 68 return (ENXIO); 69 70 device_set_desc(dev, "Synopsys DesignWare Mobile " 71 "Storage Host Controller (RockChip)"); 72 73 return (BUS_PROBE_VENDOR); 74} 75 76static int 77rockchip_dwmmc_attach(device_t dev) 78{ 79 struct dwmmc_softc *sc; 80 int type; 81 82 sc = device_get_softc(dev); 83 sc->hwtype = HWTYPE_ROCKCHIP; 84 type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 85 86 switch (type) { 87 case RK2928: 88 sc->use_pio = 1; 89 break; 90 } 91 92 sc->update_ios = &dwmmc_rockchip_update_ios; 93 94 return (dwmmc_attach(dev)); 95} 96 97static int 98dwmmc_rockchip_update_ios(struct dwmmc_softc *sc, struct mmc_ios *ios) 99{ 100 unsigned int clock; 101 int error; 102 103 if (ios->clock && ios->clock != sc->bus_hz) { 104 sc->bus_hz = clock = ios->clock; 105 /* Set the MMC clock. */ 106 if (sc->ciu) { 107 /* 108 * Apparently you need to set the ciu clock to 109 * the double of bus_hz 110 */ 111 error = clk_set_freq(sc->ciu, clock * 2, 112 CLK_SET_ROUND_DOWN); 113 if (error != 0) { 114 device_printf(sc->dev, 115 "failed to set frequency to %u Hz: %d\n", 116 clock, error); 117 return (error); 118 } 119 } 120 } 121 return (0); 122} 123 124static device_method_t rockchip_dwmmc_methods[] = { 125 /* bus interface */ 126 DEVMETHOD(device_probe, rockchip_dwmmc_probe), 127 DEVMETHOD(device_attach, rockchip_dwmmc_attach), 128 DEVMETHOD(device_detach, dwmmc_detach), 129 130 DEVMETHOD_END 131}; 132 133DEFINE_CLASS_1(rockchip_dwmmc, rockchip_dwmmc_driver, rockchip_dwmmc_methods, 134 sizeof(struct dwmmc_softc), dwmmc_driver); 135 136DRIVER_MODULE(rockchip_dwmmc, simplebus, rockchip_dwmmc_driver, 0, 0); 137DRIVER_MODULE(rockchip_dwmmc, ofwbus, rockchip_dwmmc_driver, NULL, NULL); 138#ifndef MMCCAM 139MMC_DECLARE_BRIDGE(rockchip_dwmmc); 140#endif 141