1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 5 * Copyright (c) 2007 Marvell Semiconductor, Inc. 6 * Copyright (c) 2007 Sam Leffler, Errno Consulting 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer, 14 * without modification. 15 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 16 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 17 * redistribution must be conditioned upon including a substantially 18 * similar Disclaimer requirement for further binary redistribution. 19 * 20 * NO WARRANTY 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 24 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 25 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 26 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 29 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGES. 32 */ 33 34#include "opt_malo.h" 35 36#include <sys/param.h> 37#include <sys/endian.h> 38#include <sys/kernel.h> 39#include <sys/malloc.h> 40#include <sys/socket.h> 41#include <sys/sockio.h> 42#include <sys/sysctl.h> 43#include <sys/taskqueue.h> 44 45#include <machine/bus.h> 46#include <sys/bus.h> 47 48#include <net/if.h> 49#include <net/if_var.h> 50#include <net/if_dl.h> 51#include <net/if_media.h> 52#include <net/if_types.h> 53#include <net/ethernet.h> 54 55#include <net80211/ieee80211_var.h> 56#include <net80211/ieee80211_regdomain.h> 57 58#include <net/bpf.h> 59 60#include <dev/malo/if_malo.h> 61 62SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 63 "Marvell 88w8335 driver parameters"); 64 65static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 66SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce, 67 0, "tx buffers to send at once"); 68static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 69SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf, 70 0, "rx buffers allocated"); 71static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 72SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota, 73 0, "max rx buffers to process per interrupt"); 74static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 75SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf, 76 0, "tx buffers allocated"); 77 78#ifdef MALO_DEBUG 79static int malo_debug = 0; 80SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug, 81 0, "control debugging printfs"); 82enum { 83 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 84 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 85 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 86 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 87 MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 88 MALO_DEBUG_INTR = 0x00000040, /* ISR */ 89 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 90 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 91 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 92 MALO_DEBUG_NODE = 0x00000800, /* node management */ 93 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 94 MALO_DEBUG_FW = 0x00008000, /* firmware */ 95 MALO_DEBUG_ANY = 0xffffffff 96}; 97#define IS_BEACON(wh) \ 98 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 99 IEEE80211_FC0_SUBTYPE_MASK)) == \ 100 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 101#define IFF_DUMPPKTS_RECV(sc, wh) \ 102 (((sc->malo_debug & MALO_DEBUG_RECV) && \ 103 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh)))) 104#define IFF_DUMPPKTS_XMIT(sc) \ 105 (sc->malo_debug & MALO_DEBUG_XMIT) 106#define DPRINTF(sc, m, fmt, ...) do { \ 107 if (sc->malo_debug & (m)) \ 108 printf(fmt, __VA_ARGS__); \ 109} while (0) 110#else 111#define DPRINTF(sc, m, fmt, ...) do { \ 112 (void) sc; \ 113} while (0) 114#endif 115 116static MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 117 118static struct ieee80211vap *malo_vap_create(struct ieee80211com *, 119 const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 120 const uint8_t [IEEE80211_ADDR_LEN], 121 const uint8_t [IEEE80211_ADDR_LEN]); 122static void malo_vap_delete(struct ieee80211vap *); 123static int malo_dma_setup(struct malo_softc *); 124static int malo_setup_hwdma(struct malo_softc *); 125static void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 126static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 127static void malo_parent(struct ieee80211com *); 128static int malo_transmit(struct ieee80211com *, struct mbuf *); 129static void malo_start(struct malo_softc *); 130static void malo_watchdog(void *); 131static void malo_updateslot(struct ieee80211com *); 132static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 133static void malo_scan_start(struct ieee80211com *); 134static void malo_scan_end(struct ieee80211com *); 135static void malo_set_channel(struct ieee80211com *); 136static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 137 const struct ieee80211_bpf_params *); 138static void malo_sysctlattach(struct malo_softc *); 139static void malo_announce(struct malo_softc *); 140static void malo_dma_cleanup(struct malo_softc *); 141static void malo_stop(struct malo_softc *); 142static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 143static int malo_mode_init(struct malo_softc *); 144static void malo_tx_proc(void *, int); 145static void malo_rx_proc(void *, int); 146static void malo_init(void *); 147 148/* 149 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 150 * operations are done in the "hal" except getting H/W MAC address at 151 * malo_attach and there should be no reference to them here. 152 */ 153static uint32_t 154malo_bar0_read4(struct malo_softc *sc, bus_size_t off) 155{ 156 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 157} 158 159static void 160malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 161{ 162 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n", 163 __func__, (uintmax_t)off, val); 164 165 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 166} 167 168int 169malo_attach(uint16_t devid, struct malo_softc *sc) 170{ 171 struct ieee80211com *ic = &sc->malo_ic; 172 struct malo_hal *mh; 173 int error; 174 uint8_t bands[IEEE80211_MODE_BYTES]; 175 176 MALO_LOCK_INIT(sc); 177 callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0); 178 mbufq_init(&sc->malo_snd, ifqmaxlen); 179 180 mh = malo_hal_attach(sc->malo_dev, devid, 181 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 182 if (mh == NULL) { 183 device_printf(sc->malo_dev, "unable to attach HAL\n"); 184 error = EIO; 185 goto bad; 186 } 187 sc->malo_mh = mh; 188 189 /* 190 * Load firmware so we can get setup. We arbitrarily pick station 191 * firmware; we'll re-load firmware as needed so setting up 192 * the wrong mode isn't a big deal. 193 */ 194 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 195 if (error != 0) { 196 device_printf(sc->malo_dev, "unable to setup firmware\n"); 197 goto bad1; 198 } 199 /* XXX gethwspecs() extracts correct informations? not maybe! */ 200 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 201 if (error != 0) { 202 device_printf(sc->malo_dev, "unable to fetch h/w specs\n"); 203 goto bad1; 204 } 205 206 DPRINTF(sc, MALO_DEBUG_FW, 207 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 208 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 209 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 210 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 211 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 212 sc->malo_hwspecs.hwversion, 213 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 214 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 215 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 216 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 217 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 218 sc->malo_hwspecs.ul_fw_awakecookie, 219 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 220 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 221 222 /* NB: firmware looks that it does not export regdomain info API. */ 223 memset(bands, 0, sizeof(bands)); 224 setbit(bands, IEEE80211_MODE_11B); 225 setbit(bands, IEEE80211_MODE_11G); 226 ieee80211_init_channels(ic, NULL, bands); 227 228 sc->malo_txantenna = 0x2; /* h/w default */ 229 sc->malo_rxantenna = 0xffff; /* h/w default */ 230 231 /* 232 * Allocate tx + rx descriptors and populate the lists. 233 * We immediately push the information to the firmware 234 * as otherwise it gets upset. 235 */ 236 error = malo_dma_setup(sc); 237 if (error != 0) { 238 device_printf(sc->malo_dev, 239 "failed to setup descriptors: %d\n", error); 240 goto bad1; 241 } 242 error = malo_setup_hwdma(sc); /* push to firmware */ 243 if (error != 0) /* NB: malo_setupdma prints msg */ 244 goto bad2; 245 246 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 247 taskqueue_thread_enqueue, &sc->malo_tq); 248 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 249 "%s taskq", device_get_nameunit(sc->malo_dev)); 250 251 NET_TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 252 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 253 254 ic->ic_softc = sc; 255 ic->ic_name = device_get_nameunit(sc->malo_dev); 256 /* XXX not right but it's not used anywhere important */ 257 ic->ic_phytype = IEEE80211_T_OFDM; 258 ic->ic_opmode = IEEE80211_M_STA; 259 ic->ic_caps = 260 IEEE80211_C_STA /* station mode supported */ 261 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 262 | IEEE80211_C_MONITOR /* monitor mode */ 263 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 264 | IEEE80211_C_SHSLOT /* short slot time supported */ 265 | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 266 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 267 ; 268 IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->malo_hwspecs.macaddr); 269 270 /* 271 * Transmit requires space in the packet for a special format transmit 272 * record and optional padding between this record and the payload. 273 * Ask the net80211 layer to arrange this when encapsulating 274 * packets so we can add it efficiently. 275 */ 276 ic->ic_headroom = sizeof(struct malo_txrec) - 277 sizeof(struct ieee80211_frame); 278 279 /* call MI attach routine. */ 280 ieee80211_ifattach(ic); 281 /* override default methods */ 282 ic->ic_vap_create = malo_vap_create; 283 ic->ic_vap_delete = malo_vap_delete; 284 ic->ic_raw_xmit = malo_raw_xmit; 285 ic->ic_updateslot = malo_updateslot; 286 ic->ic_scan_start = malo_scan_start; 287 ic->ic_scan_end = malo_scan_end; 288 ic->ic_set_channel = malo_set_channel; 289 ic->ic_parent = malo_parent; 290 ic->ic_transmit = malo_transmit; 291 292 sc->malo_invalid = 0; /* ready to go, enable int handling */ 293 294 ieee80211_radiotap_attach(ic, 295 &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th), 296 MALO_TX_RADIOTAP_PRESENT, 297 &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th), 298 MALO_RX_RADIOTAP_PRESENT); 299 300 /* 301 * Setup dynamic sysctl's. 302 */ 303 malo_sysctlattach(sc); 304 305 if (bootverbose) 306 ieee80211_announce(ic); 307 malo_announce(sc); 308 309 return 0; 310bad2: 311 malo_dma_cleanup(sc); 312bad1: 313 malo_hal_detach(mh); 314bad: 315 sc->malo_invalid = 1; 316 317 return error; 318} 319 320static struct ieee80211vap * 321malo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 322 enum ieee80211_opmode opmode, int flags, 323 const uint8_t bssid[IEEE80211_ADDR_LEN], 324 const uint8_t mac[IEEE80211_ADDR_LEN]) 325{ 326 struct malo_softc *sc = ic->ic_softc; 327 struct malo_vap *mvp; 328 struct ieee80211vap *vap; 329 330 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 331 device_printf(sc->malo_dev, "multiple vaps not supported\n"); 332 return NULL; 333 } 334 switch (opmode) { 335 case IEEE80211_M_STA: 336 if (opmode == IEEE80211_M_STA) 337 flags |= IEEE80211_CLONE_NOBEACONS; 338 /* fall thru... */ 339 case IEEE80211_M_MONITOR: 340 break; 341 default: 342 device_printf(sc->malo_dev, "%s mode not supported\n", 343 ieee80211_opmode_name[opmode]); 344 return NULL; /* unsupported */ 345 } 346 mvp = malloc(sizeof(struct malo_vap), M_80211_VAP, M_WAITOK | M_ZERO); 347 vap = &mvp->malo_vap; 348 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 349 350 /* override state transition machine */ 351 mvp->malo_newstate = vap->iv_newstate; 352 vap->iv_newstate = malo_newstate; 353 354 /* complete setup */ 355 ieee80211_vap_attach(vap, 356 ieee80211_media_change, ieee80211_media_status, mac); 357 ic->ic_opmode = opmode; 358 return vap; 359} 360 361static void 362malo_vap_delete(struct ieee80211vap *vap) 363{ 364 struct malo_vap *mvp = MALO_VAP(vap); 365 366 ieee80211_vap_detach(vap); 367 free(mvp, M_80211_VAP); 368} 369 370int 371malo_intr(void *arg) 372{ 373 struct malo_softc *sc = arg; 374 struct malo_hal *mh = sc->malo_mh; 375 uint32_t status; 376 377 if (sc->malo_invalid) { 378 /* 379 * The hardware is not ready/present, don't touch anything. 380 * Note this can happen early on if the IRQ is shared. 381 */ 382 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 383 return (FILTER_STRAY); 384 } 385 386 /* 387 * Figure out the reason(s) for the interrupt. 388 */ 389 malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 390 if (status == 0) /* must be a shared irq */ 391 return (FILTER_STRAY); 392 393 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 394 __func__, status, sc->malo_imask); 395 396 if (status & MALO_A2HRIC_BIT_RX_RDY) 397 taskqueue_enqueue(sc->malo_tq, &sc->malo_rxtask); 398 if (status & MALO_A2HRIC_BIT_TX_DONE) 399 taskqueue_enqueue(sc->malo_tq, &sc->malo_txtask); 400 if (status & MALO_A2HRIC_BIT_OPC_DONE) 401 malo_hal_cmddone(mh); 402 if (status & MALO_A2HRIC_BIT_MAC_EVENT) 403 ; 404 if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 405 ; 406 if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 407 /* TKIP ICV error */ 408 sc->malo_stats.mst_rx_badtkipicv++; 409 } 410#ifdef MALO_DEBUG 411 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 412 DPRINTF(sc, MALO_DEBUG_INTR, 413 "%s: can't handle interrupt status 0x%x\n", 414 __func__, status); 415#endif 416 return (FILTER_HANDLED); 417} 418 419static void 420malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 421{ 422 bus_addr_t *paddr = (bus_addr_t*) arg; 423 424 KASSERT(error == 0, ("error %u on bus_dma callback", error)); 425 426 *paddr = segs->ds_addr; 427} 428 429static int 430malo_desc_setup(struct malo_softc *sc, const char *name, 431 struct malo_descdma *dd, 432 int nbuf, size_t bufsize, int ndesc, size_t descsize) 433{ 434 int error; 435 uint8_t *ds; 436 437 DPRINTF(sc, MALO_DEBUG_RESET, 438 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 439 __func__, name, nbuf, (uintmax_t) bufsize, 440 ndesc, (uintmax_t) descsize); 441 442 dd->dd_name = name; 443 dd->dd_desc_len = nbuf * ndesc * descsize; 444 445 /* 446 * Setup DMA descriptor area. 447 */ 448 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 449 PAGE_SIZE, 0, /* alignment, bounds */ 450 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 451 BUS_SPACE_MAXADDR, /* highaddr */ 452 NULL, NULL, /* filter, filterarg */ 453 dd->dd_desc_len, /* maxsize */ 454 1, /* nsegments */ 455 dd->dd_desc_len, /* maxsegsize */ 456 BUS_DMA_ALLOCNOW, /* flags */ 457 NULL, /* lockfunc */ 458 NULL, /* lockarg */ 459 &dd->dd_dmat); 460 if (error != 0) { 461 device_printf(sc->malo_dev, "cannot allocate %s DMA tag\n", 462 dd->dd_name); 463 return error; 464 } 465 466 /* allocate descriptors */ 467 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 468 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 469 if (error != 0) { 470 device_printf(sc->malo_dev, 471 "unable to alloc memory for %u %s descriptors, " 472 "error %u\n", nbuf * ndesc, dd->dd_name, error); 473 goto fail1; 474 } 475 476 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 477 dd->dd_desc, dd->dd_desc_len, 478 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 479 if (error != 0) { 480 device_printf(sc->malo_dev, 481 "unable to map %s descriptors, error %u\n", 482 dd->dd_name, error); 483 goto fail2; 484 } 485 486 ds = dd->dd_desc; 487 memset(ds, 0, dd->dd_desc_len); 488 DPRINTF(sc, MALO_DEBUG_RESET, 489 "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n", 490 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 491 (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 492 493 return 0; 494fail2: 495 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 496fail1: 497 bus_dma_tag_destroy(dd->dd_dmat); 498 memset(dd, 0, sizeof(*dd)); 499 return error; 500} 501 502#define DS2PHYS(_dd, _ds) \ 503 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 504 505static int 506malo_rxdma_setup(struct malo_softc *sc) 507{ 508 int error, bsize, i; 509 struct malo_rxbuf *bf; 510 struct malo_rxdesc *ds; 511 512 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 513 malo_rxbuf, sizeof(struct malo_rxbuf), 514 1, sizeof(struct malo_rxdesc)); 515 if (error != 0) 516 return error; 517 518 /* 519 * Allocate rx buffers and set them up. 520 */ 521 bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 522 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 523 if (bf == NULL) { 524 device_printf(sc->malo_dev, 525 "malloc of %u rx buffers failed\n", bsize); 526 return error; 527 } 528 sc->malo_rxdma.dd_bufptr = bf; 529 530 STAILQ_INIT(&sc->malo_rxbuf); 531 ds = sc->malo_rxdma.dd_desc; 532 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 533 bf->bf_desc = ds; 534 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 535 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 536 &bf->bf_dmamap); 537 if (error != 0) { 538 device_printf(sc->malo_dev, 539 "%s: unable to dmamap for rx buffer, error %d\n", 540 __func__, error); 541 return error; 542 } 543 /* NB: tail is intentional to preserve descriptor order */ 544 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 545 } 546 return 0; 547} 548 549static int 550malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 551{ 552 int error, bsize, i; 553 struct malo_txbuf *bf; 554 struct malo_txdesc *ds; 555 556 error = malo_desc_setup(sc, "tx", &txq->dma, 557 malo_txbuf, sizeof(struct malo_txbuf), 558 MALO_TXDESC, sizeof(struct malo_txdesc)); 559 if (error != 0) 560 return error; 561 562 /* allocate and setup tx buffers */ 563 bsize = malo_txbuf * sizeof(struct malo_txbuf); 564 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 565 if (bf == NULL) { 566 device_printf(sc->malo_dev, "malloc of %u tx buffers failed\n", 567 malo_txbuf); 568 return ENOMEM; 569 } 570 txq->dma.dd_bufptr = bf; 571 572 STAILQ_INIT(&txq->free); 573 txq->nfree = 0; 574 ds = txq->dma.dd_desc; 575 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 576 bf->bf_desc = ds; 577 bf->bf_daddr = DS2PHYS(&txq->dma, ds); 578 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 579 &bf->bf_dmamap); 580 if (error != 0) { 581 device_printf(sc->malo_dev, 582 "unable to create dmamap for tx " 583 "buffer %u, error %u\n", i, error); 584 return error; 585 } 586 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 587 txq->nfree++; 588 } 589 590 return 0; 591} 592 593static void 594malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 595{ 596 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 597 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 598 bus_dma_tag_destroy(dd->dd_dmat); 599 600 memset(dd, 0, sizeof(*dd)); 601} 602 603static void 604malo_rxdma_cleanup(struct malo_softc *sc) 605{ 606 struct malo_rxbuf *bf; 607 608 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 609 if (bf->bf_m != NULL) { 610 m_freem(bf->bf_m); 611 bf->bf_m = NULL; 612 } 613 if (bf->bf_dmamap != NULL) { 614 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 615 bf->bf_dmamap = NULL; 616 } 617 } 618 STAILQ_INIT(&sc->malo_rxbuf); 619 if (sc->malo_rxdma.dd_bufptr != NULL) { 620 free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 621 sc->malo_rxdma.dd_bufptr = NULL; 622 } 623 if (sc->malo_rxdma.dd_desc_len != 0) 624 malo_desc_cleanup(sc, &sc->malo_rxdma); 625} 626 627static void 628malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 629{ 630 struct malo_txbuf *bf; 631 struct ieee80211_node *ni; 632 633 STAILQ_FOREACH(bf, &txq->free, bf_list) { 634 if (bf->bf_m != NULL) { 635 m_freem(bf->bf_m); 636 bf->bf_m = NULL; 637 } 638 ni = bf->bf_node; 639 bf->bf_node = NULL; 640 if (ni != NULL) { 641 /* 642 * Reclaim node reference. 643 */ 644 ieee80211_free_node(ni); 645 } 646 if (bf->bf_dmamap != NULL) { 647 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 648 bf->bf_dmamap = NULL; 649 } 650 } 651 STAILQ_INIT(&txq->free); 652 txq->nfree = 0; 653 if (txq->dma.dd_bufptr != NULL) { 654 free(txq->dma.dd_bufptr, M_MALODEV); 655 txq->dma.dd_bufptr = NULL; 656 } 657 if (txq->dma.dd_desc_len != 0) 658 malo_desc_cleanup(sc, &txq->dma); 659} 660 661static void 662malo_dma_cleanup(struct malo_softc *sc) 663{ 664 int i; 665 666 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 667 malo_txdma_cleanup(sc, &sc->malo_txq[i]); 668 669 malo_rxdma_cleanup(sc); 670} 671 672static int 673malo_dma_setup(struct malo_softc *sc) 674{ 675 int error, i; 676 677 /* rxdma initializing. */ 678 error = malo_rxdma_setup(sc); 679 if (error != 0) 680 return error; 681 682 /* NB: we just have 1 tx queue now. */ 683 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 684 error = malo_txdma_setup(sc, &sc->malo_txq[i]); 685 if (error != 0) { 686 malo_dma_cleanup(sc); 687 688 return error; 689 } 690 691 malo_txq_init(sc, &sc->malo_txq[i], i); 692 } 693 694 return 0; 695} 696 697static void 698malo_hal_set_rxtxdma(struct malo_softc *sc) 699{ 700 int i; 701 702 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 703 sc->malo_hwdma.rxdesc_read); 704 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 705 sc->malo_hwdma.rxdesc_read); 706 707 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 708 malo_bar0_write4(sc, 709 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 710 } 711} 712 713/* 714 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 715 * for compatibility with older firmware. For current firmware we send 716 * this information with a cmd block via malo_hal_sethwdma. 717 */ 718static int 719malo_setup_hwdma(struct malo_softc *sc) 720{ 721 int i; 722 struct malo_txq *txq; 723 724 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 725 726 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 727 txq = &sc->malo_txq[i]; 728 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 729 } 730 sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 731 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 732 733 malo_hal_set_rxtxdma(sc); 734 735 return 0; 736} 737 738static void 739malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 740{ 741 struct malo_txbuf *bf, *bn; 742 struct malo_txdesc *ds; 743 744 MALO_TXQ_LOCK_INIT(sc, txq); 745 txq->qnum = qnum; 746 txq->txpri = 0; /* XXX */ 747 748 STAILQ_FOREACH(bf, &txq->free, bf_list) { 749 bf->bf_txq = txq; 750 751 ds = bf->bf_desc; 752 bn = STAILQ_NEXT(bf, bf_list); 753 if (bn == NULL) 754 bn = STAILQ_FIRST(&txq->free); 755 ds->physnext = htole32(bn->bf_daddr); 756 } 757 STAILQ_INIT(&txq->active); 758} 759 760/* 761 * Reclaim resources for a setup queue. 762 */ 763static void 764malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 765{ 766 /* XXX hal work? */ 767 MALO_TXQ_LOCK_DESTROY(txq); 768} 769 770/* 771 * Allocate a tx buffer for sending a frame. 772 */ 773static struct malo_txbuf * 774malo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 775{ 776 struct malo_txbuf *bf; 777 778 MALO_TXQ_LOCK(txq); 779 bf = STAILQ_FIRST(&txq->free); 780 if (bf != NULL) { 781 STAILQ_REMOVE_HEAD(&txq->free, bf_list); 782 txq->nfree--; 783 } 784 MALO_TXQ_UNLOCK(txq); 785 if (bf == NULL) { 786 DPRINTF(sc, MALO_DEBUG_XMIT, 787 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 788 sc->malo_stats.mst_tx_qstop++; 789 } 790 return bf; 791} 792 793static int 794malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 795{ 796 struct mbuf *m; 797 int error; 798 799 /* 800 * Load the DMA map so any coalescing is done. This also calculates 801 * the number of descriptors we need. 802 */ 803 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 804 bf->bf_segs, &bf->bf_nseg, 805 BUS_DMA_NOWAIT); 806 if (error == EFBIG) { 807 /* XXX packet requires too many descriptors */ 808 bf->bf_nseg = MALO_TXDESC + 1; 809 } else if (error != 0) { 810 sc->malo_stats.mst_tx_busdma++; 811 m_freem(m0); 812 return error; 813 } 814 /* 815 * Discard null packets and check for packets that require too many 816 * TX descriptors. We try to convert the latter to a cluster. 817 */ 818 if (error == EFBIG) { /* too many desc's, linearize */ 819 sc->malo_stats.mst_tx_linear++; 820 m = m_defrag(m0, M_NOWAIT); 821 if (m == NULL) { 822 m_freem(m0); 823 sc->malo_stats.mst_tx_nombuf++; 824 return ENOMEM; 825 } 826 m0 = m; 827 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 828 bf->bf_segs, &bf->bf_nseg, 829 BUS_DMA_NOWAIT); 830 if (error != 0) { 831 sc->malo_stats.mst_tx_busdma++; 832 m_freem(m0); 833 return error; 834 } 835 KASSERT(bf->bf_nseg <= MALO_TXDESC, 836 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 837 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 838 sc->malo_stats.mst_tx_nodata++; 839 m_freem(m0); 840 return EIO; 841 } 842 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 843 __func__, m0, m0->m_pkthdr.len); 844 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 845 bf->bf_m = m0; 846 847 return 0; 848} 849 850#ifdef MALO_DEBUG 851static void 852malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 853{ 854 const struct malo_rxdesc *ds = bf->bf_desc; 855 uint32_t status = le32toh(ds->status); 856 857 printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n" 858 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 859 " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr, 860 le32toh(ds->physnext), le32toh(ds->physbuffdata), 861 ds->rxcontrol, 862 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 863 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 864 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 865 ds->rate, le16toh(ds->qosctrl)); 866} 867 868static void 869malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 870{ 871 const struct malo_txdesc *ds = bf->bf_desc; 872 uint32_t status = le32toh(ds->status); 873 874 printf("Q%u[%3u]", qnum, ix); 875 printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr); 876 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 877 le32toh(ds->physnext), 878 le32toh(ds->pktptr), le16toh(ds->pktlen), status, 879 status & MALO_TXD_STATUS_USED ? 880 "" : (status & 3) != 0 ? " *" : " !"); 881 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 882 ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 883 le32toh(ds->sap_pktinfo), le16toh(ds->format)); 884#if 0 885 { 886 const uint8_t *cp = (const uint8_t *) ds; 887 int i; 888 for (i = 0; i < sizeof(struct malo_txdesc); i++) { 889 printf("%02x ", cp[i]); 890 if (((i+1) % 16) == 0) 891 printf("\n"); 892 } 893 printf("\n"); 894 } 895#endif 896} 897#endif /* MALO_DEBUG */ 898 899static __inline void 900malo_updatetxrate(struct ieee80211_node *ni, int rix) 901{ 902 static const int ieeerates[] = 903 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 904 if (rix < nitems(ieeerates)) 905 ni->ni_txrate = ieeerates[rix]; 906} 907 908static int 909malo_fix2rate(int fix_rate) 910{ 911 static const int rates[] = 912 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 913 return (fix_rate < nitems(rates) ? rates[fix_rate] : 0); 914} 915 916/* 917 * Process completed xmit descriptors from the specified queue. 918 */ 919static int 920malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 921{ 922 struct malo_txbuf *bf; 923 struct malo_txdesc *ds; 924 struct ieee80211_node *ni; 925 int nreaped; 926 uint32_t status; 927 928 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 929 __func__, txq->qnum); 930 for (nreaped = 0;; nreaped++) { 931 MALO_TXQ_LOCK(txq); 932 bf = STAILQ_FIRST(&txq->active); 933 if (bf == NULL) { 934 MALO_TXQ_UNLOCK(txq); 935 break; 936 } 937 ds = bf->bf_desc; 938 MALO_TXDESC_SYNC(txq, ds, 939 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 940 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 941 MALO_TXQ_UNLOCK(txq); 942 break; 943 } 944 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 945 MALO_TXQ_UNLOCK(txq); 946 947#ifdef MALO_DEBUG 948 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 949 malo_printtxbuf(bf, txq->qnum, nreaped); 950#endif 951 ni = bf->bf_node; 952 if (ni != NULL) { 953 status = le32toh(ds->status); 954 if (status & MALO_TXD_STATUS_OK) { 955 uint16_t format = le16toh(ds->format); 956 uint8_t txant =_IEEE80211_MASKSHIFT( 957 format, MALO_TXD_ANTENNA); 958 959 sc->malo_stats.mst_ant_tx[txant]++; 960 if (status & MALO_TXD_STATUS_OK_RETRY) 961 sc->malo_stats.mst_tx_retries++; 962 if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 963 sc->malo_stats.mst_tx_mretries++; 964 malo_updatetxrate(ni, ds->datarate); 965 sc->malo_stats.mst_tx_rate = ds->datarate; 966 } else { 967 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 968 sc->malo_stats.mst_tx_linkerror++; 969 if (status & MALO_TXD_STATUS_FAILED_XRETRY) 970 sc->malo_stats.mst_tx_xretries++; 971 if (status & MALO_TXD_STATUS_FAILED_AGING) 972 sc->malo_stats.mst_tx_aging++; 973 } 974 /* XXX strip fw len in case header inspected */ 975 m_adj(bf->bf_m, sizeof(uint16_t)); 976 ieee80211_tx_complete(ni, bf->bf_m, 977 (status & MALO_TXD_STATUS_OK) == 0); 978 } else 979 m_freem(bf->bf_m); 980 981 ds->status = htole32(MALO_TXD_STATUS_IDLE); 982 ds->pktlen = htole32(0); 983 984 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 985 BUS_DMASYNC_POSTWRITE); 986 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 987 bf->bf_m = NULL; 988 bf->bf_node = NULL; 989 990 MALO_TXQ_LOCK(txq); 991 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 992 txq->nfree++; 993 MALO_TXQ_UNLOCK(txq); 994 } 995 return nreaped; 996} 997 998/* 999 * Deferred processing of transmit interrupt. 1000 */ 1001static void 1002malo_tx_proc(void *arg, int npending) 1003{ 1004 struct malo_softc *sc = arg; 1005 int i, nreaped; 1006 1007 /* 1008 * Process each active queue. 1009 */ 1010 nreaped = 0; 1011 MALO_LOCK(sc); 1012 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1013 if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1014 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1015 } 1016 1017 if (nreaped != 0) { 1018 sc->malo_timer = 0; 1019 malo_start(sc); 1020 } 1021 MALO_UNLOCK(sc); 1022} 1023 1024static int 1025malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1026 struct malo_txbuf *bf, struct mbuf *m0) 1027{ 1028#define IS_DATA_FRAME(wh) \ 1029 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1030 int error, iswep; 1031 int hdrlen, pktlen; 1032 struct ieee80211_frame *wh; 1033 struct ieee80211com *ic = &sc->malo_ic; 1034 struct ieee80211vap *vap = ni->ni_vap; 1035 struct malo_txdesc *ds; 1036 struct malo_txrec *tr; 1037 struct malo_txq *txq; 1038 uint16_t qos; 1039 1040 wh = mtod(m0, struct ieee80211_frame *); 1041 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1042 hdrlen = ieee80211_anyhdrsize(wh); 1043 pktlen = m0->m_pkthdr.len; 1044 if (IEEE80211_QOS_HAS_SEQ(wh)) { 1045 qos = *(uint16_t *)ieee80211_getqos(wh); 1046 } else 1047 qos = 0; 1048 1049 if (iswep) { 1050 struct ieee80211_key *k; 1051 1052 /* 1053 * Construct the 802.11 header+trailer for an encrypted 1054 * frame. The only reason this can fail is because of an 1055 * unknown or unsupported cipher/key type. 1056 * 1057 * NB: we do this even though the firmware will ignore 1058 * what we've done for WEP and TKIP as we need the 1059 * ExtIV filled in for CCMP and this also adjusts 1060 * the headers which simplifies our work below. 1061 */ 1062 k = ieee80211_crypto_encap(ni, m0); 1063 if (k == NULL) { 1064 /* 1065 * This can happen when the key is yanked after the 1066 * frame was queued. Just discard the frame; the 1067 * 802.11 layer counts failures and provides 1068 * debugging/diagnostics. 1069 */ 1070 m_freem(m0); 1071 return EIO; 1072 } 1073 1074 /* 1075 * Adjust the packet length for the crypto additions 1076 * done during encap and any other bits that the f/w 1077 * will add later on. 1078 */ 1079 pktlen = m0->m_pkthdr.len; 1080 1081 /* packet header may have moved, reset our local pointer */ 1082 wh = mtod(m0, struct ieee80211_frame *); 1083 } 1084 1085 if (ieee80211_radiotap_active_vap(vap)) { 1086 sc->malo_tx_th.wt_flags = 0; /* XXX */ 1087 if (iswep) 1088 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1089 sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1090 sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1091 1092 ieee80211_radiotap_tx(vap, m0); 1093 } 1094 1095 /* 1096 * Copy up/down the 802.11 header; the firmware requires 1097 * we present a 2-byte payload length followed by a 1098 * 4-address header (w/o QoS), followed (optionally) by 1099 * any WEP/ExtIV header (but only filled in for CCMP). 1100 * We are assured the mbuf has sufficient headroom to 1101 * prepend in-place by the setup of ic_headroom in 1102 * malo_attach. 1103 */ 1104 if (hdrlen < sizeof(struct malo_txrec)) { 1105 const int space = sizeof(struct malo_txrec) - hdrlen; 1106 if (M_LEADINGSPACE(m0) < space) { 1107 /* NB: should never happen */ 1108 device_printf(sc->malo_dev, 1109 "not enough headroom, need %d found %zd, " 1110 "m_flags 0x%x m_len %d\n", 1111 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1112 ieee80211_dump_pkt(ic, 1113 mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1114 m_freem(m0); 1115 /* XXX stat */ 1116 return EIO; 1117 } 1118 M_PREPEND(m0, space, M_NOWAIT); 1119 } 1120 tr = mtod(m0, struct malo_txrec *); 1121 if (wh != (struct ieee80211_frame *) &tr->wh) 1122 ovbcopy(wh, &tr->wh, hdrlen); 1123 /* 1124 * Note: the "firmware length" is actually the length of the fully 1125 * formed "802.11 payload". That is, it's everything except for 1126 * the 802.11 header. In particular this includes all crypto 1127 * material including the MIC! 1128 */ 1129 tr->fwlen = htole16(pktlen - hdrlen); 1130 1131 /* 1132 * Load the DMA map so any coalescing is done. This 1133 * also calculates the number of descriptors we need. 1134 */ 1135 error = malo_tx_dmasetup(sc, bf, m0); 1136 if (error != 0) 1137 return error; 1138 bf->bf_node = ni; /* NB: held reference */ 1139 m0 = bf->bf_m; /* NB: may have changed */ 1140 tr = mtod(m0, struct malo_txrec *); 1141 wh = (struct ieee80211_frame *)&tr->wh; 1142 1143 /* 1144 * Formulate tx descriptor. 1145 */ 1146 ds = bf->bf_desc; 1147 txq = bf->bf_txq; 1148 1149 ds->qosctrl = qos; /* NB: already little-endian */ 1150 ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1151 ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1152 /* NB: pPhysNext setup once, don't touch */ 1153 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1154 ds->sap_pktinfo = 0; 1155 ds->format = 0; 1156 1157 /* 1158 * Select transmit rate. 1159 */ 1160 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1161 case IEEE80211_FC0_TYPE_MGT: 1162 sc->malo_stats.mst_tx_mgmt++; 1163 /* fall thru... */ 1164 case IEEE80211_FC0_TYPE_CTL: 1165 ds->txpriority = 1; 1166 break; 1167 case IEEE80211_FC0_TYPE_DATA: 1168 ds->txpriority = txq->qnum; 1169 break; 1170 default: 1171 device_printf(sc->malo_dev, "bogus frame type 0x%x (%s)\n", 1172 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1173 /* XXX statistic */ 1174 m_freem(m0); 1175 return EIO; 1176 } 1177 1178#ifdef MALO_DEBUG 1179 if (IFF_DUMPPKTS_XMIT(sc)) 1180 ieee80211_dump_pkt(ic, 1181 mtod(m0, const uint8_t *)+sizeof(uint16_t), 1182 m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1183#endif 1184 1185 MALO_TXQ_LOCK(txq); 1186 if (!IS_DATA_FRAME(wh)) 1187 ds->status |= htole32(1); 1188 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1189 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1190 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1191 1192 sc->malo_timer = 5; 1193 MALO_TXQ_UNLOCK(txq); 1194 return 0; 1195} 1196 1197static int 1198malo_transmit(struct ieee80211com *ic, struct mbuf *m) 1199{ 1200 struct malo_softc *sc = ic->ic_softc; 1201 int error; 1202 1203 MALO_LOCK(sc); 1204 if (!sc->malo_running) { 1205 MALO_UNLOCK(sc); 1206 return (ENXIO); 1207 } 1208 error = mbufq_enqueue(&sc->malo_snd, m); 1209 if (error) { 1210 MALO_UNLOCK(sc); 1211 return (error); 1212 } 1213 malo_start(sc); 1214 MALO_UNLOCK(sc); 1215 return (0); 1216} 1217 1218static void 1219malo_start(struct malo_softc *sc) 1220{ 1221 struct ieee80211_node *ni; 1222 struct malo_txq *txq = &sc->malo_txq[0]; 1223 struct malo_txbuf *bf = NULL; 1224 struct mbuf *m; 1225 int nqueued = 0; 1226 1227 MALO_LOCK_ASSERT(sc); 1228 1229 if (!sc->malo_running || sc->malo_invalid) 1230 return; 1231 1232 while ((m = mbufq_dequeue(&sc->malo_snd)) != NULL) { 1233 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1234 bf = malo_getbuf(sc, txq); 1235 if (bf == NULL) { 1236 mbufq_prepend(&sc->malo_snd, m); 1237 sc->malo_stats.mst_tx_qstop++; 1238 break; 1239 } 1240 /* 1241 * Pass the frame to the h/w for transmission. 1242 */ 1243 if (malo_tx_start(sc, ni, bf, m)) { 1244 if_inc_counter(ni->ni_vap->iv_ifp, 1245 IFCOUNTER_OERRORS, 1); 1246 if (bf != NULL) { 1247 bf->bf_m = NULL; 1248 bf->bf_node = NULL; 1249 MALO_TXQ_LOCK(txq); 1250 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1251 MALO_TXQ_UNLOCK(txq); 1252 } 1253 ieee80211_free_node(ni); 1254 continue; 1255 } 1256 nqueued++; 1257 1258 if (nqueued >= malo_txcoalesce) { 1259 /* 1260 * Poke the firmware to process queued frames; 1261 * see below about (lack of) locking. 1262 */ 1263 nqueued = 0; 1264 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1265 } 1266 } 1267 1268 if (nqueued) { 1269 /* 1270 * NB: We don't need to lock against tx done because 1271 * this just prods the firmware to check the transmit 1272 * descriptors. The firmware will also start fetching 1273 * descriptors by itself if it notices new ones are 1274 * present when it goes to deliver a tx done interrupt 1275 * to the host. So if we race with tx done processing 1276 * it's ok. Delivering the kick here rather than in 1277 * malo_tx_start is an optimization to avoid poking the 1278 * firmware for each packet. 1279 * 1280 * NB: the queue id isn't used so 0 is ok. 1281 */ 1282 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1283 } 1284} 1285 1286static void 1287malo_watchdog(void *arg) 1288{ 1289 struct malo_softc *sc = arg; 1290 1291 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1292 if (sc->malo_timer == 0 || --sc->malo_timer > 0) 1293 return; 1294 1295 if (sc->malo_running && !sc->malo_invalid) { 1296 device_printf(sc->malo_dev, "watchdog timeout\n"); 1297 1298 /* XXX no way to reset h/w. now */ 1299 1300 counter_u64_add(sc->malo_ic.ic_oerrors, 1); 1301 sc->malo_stats.mst_watchdog++; 1302 } 1303} 1304 1305static int 1306malo_hal_reset(struct malo_softc *sc) 1307{ 1308 static int first = 0; 1309 struct ieee80211com *ic = &sc->malo_ic; 1310 struct malo_hal *mh = sc->malo_mh; 1311 1312 if (first == 0) { 1313 /* 1314 * NB: when the device firstly is initialized, sometimes 1315 * firmware could override rx/tx dma registers so we re-set 1316 * these values once. 1317 */ 1318 malo_hal_set_rxtxdma(sc); 1319 first = 1; 1320 } 1321 1322 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1323 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1324 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1325 malo_chan_set(sc, ic->ic_curchan); 1326 1327 /* XXX needs other stuffs? */ 1328 1329 return 1; 1330} 1331 1332static __inline struct mbuf * 1333malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1334{ 1335 struct mbuf *m; 1336 bus_addr_t paddr; 1337 int error; 1338 1339 /* XXX don't need mbuf, just dma buffer */ 1340 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1341 if (m == NULL) { 1342 sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1343 return NULL; 1344 } 1345 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1346 mtod(m, caddr_t), MJUMPAGESIZE, 1347 malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1348 if (error != 0) { 1349 device_printf(sc->malo_dev, 1350 "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1351 m_freem(m); 1352 return NULL; 1353 } 1354 bf->bf_data = paddr; 1355 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1356 1357 return m; 1358} 1359 1360static int 1361malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1362{ 1363 struct malo_rxdesc *ds; 1364 1365 ds = bf->bf_desc; 1366 if (bf->bf_m == NULL) { 1367 bf->bf_m = malo_getrxmbuf(sc, bf); 1368 if (bf->bf_m == NULL) { 1369 /* mark descriptor to be skipped */ 1370 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1371 /* NB: don't need PREREAD */ 1372 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1373 return ENOMEM; 1374 } 1375 } 1376 1377 /* 1378 * Setup descriptor. 1379 */ 1380 ds->qosctrl = 0; 1381 ds->snr = 0; 1382 ds->status = MALO_RXD_STATUS_IDLE; 1383 ds->channel = 0; 1384 ds->pktlen = htole16(MALO_RXSIZE); 1385 ds->nf = 0; 1386 ds->physbuffdata = htole32(bf->bf_data); 1387 /* NB: don't touch pPhysNext, set once */ 1388 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1389 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1390 1391 return 0; 1392} 1393 1394/* 1395 * Setup the rx data structures. This should only be done once or we may get 1396 * out of sync with the firmware. 1397 */ 1398static int 1399malo_startrecv(struct malo_softc *sc) 1400{ 1401 struct malo_rxbuf *bf, *prev; 1402 struct malo_rxdesc *ds; 1403 1404 if (sc->malo_recvsetup == 1) { 1405 malo_mode_init(sc); /* set filters, etc. */ 1406 return 0; 1407 } 1408 1409 prev = NULL; 1410 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1411 int error = malo_rxbuf_init(sc, bf); 1412 if (error != 0) { 1413 DPRINTF(sc, MALO_DEBUG_RECV, 1414 "%s: malo_rxbuf_init failed %d\n", 1415 __func__, error); 1416 return error; 1417 } 1418 if (prev != NULL) { 1419 ds = prev->bf_desc; 1420 ds->physnext = htole32(bf->bf_daddr); 1421 } 1422 prev = bf; 1423 } 1424 if (prev != NULL) { 1425 ds = prev->bf_desc; 1426 ds->physnext = 1427 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1428 } 1429 1430 sc->malo_recvsetup = 1; 1431 1432 malo_mode_init(sc); /* set filters, etc. */ 1433 1434 return 0; 1435} 1436 1437static void 1438malo_init_locked(struct malo_softc *sc) 1439{ 1440 struct malo_hal *mh = sc->malo_mh; 1441 int error; 1442 1443 MALO_LOCK_ASSERT(sc); 1444 1445 /* 1446 * Stop anything previously setup. This is safe whether this is 1447 * the first time through or not. 1448 */ 1449 malo_stop(sc); 1450 1451 /* 1452 * Push state to the firmware. 1453 */ 1454 if (!malo_hal_reset(sc)) { 1455 device_printf(sc->malo_dev, 1456 "%s: unable to reset hardware\n", __func__); 1457 return; 1458 } 1459 1460 /* 1461 * Setup recv (once); transmit is already good to go. 1462 */ 1463 error = malo_startrecv(sc); 1464 if (error != 0) { 1465 device_printf(sc->malo_dev, 1466 "%s: unable to start recv logic, error %d\n", 1467 __func__, error); 1468 return; 1469 } 1470 1471 /* 1472 * Enable interrupts. 1473 */ 1474 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1475 | MALO_A2HRIC_BIT_TX_DONE 1476 | MALO_A2HRIC_BIT_OPC_DONE 1477 | MALO_A2HRIC_BIT_MAC_EVENT 1478 | MALO_A2HRIC_BIT_RX_PROBLEM 1479 | MALO_A2HRIC_BIT_ICV_ERROR 1480 | MALO_A2HRIC_BIT_RADAR_DETECT 1481 | MALO_A2HRIC_BIT_CHAN_SWITCH; 1482 1483 sc->malo_running = 1; 1484 malo_hal_intrset(mh, sc->malo_imask); 1485 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1486} 1487 1488static void 1489malo_init(void *arg) 1490{ 1491 struct malo_softc *sc = (struct malo_softc *) arg; 1492 struct ieee80211com *ic = &sc->malo_ic; 1493 1494 MALO_LOCK(sc); 1495 malo_init_locked(sc); 1496 MALO_UNLOCK(sc); 1497 1498 if (sc->malo_running) 1499 ieee80211_start_all(ic); /* start all vap's */ 1500} 1501 1502struct malo_copy_maddr_ctx { 1503 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1504 int nmc; 1505}; 1506 1507static u_int 1508malo_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int nmc) 1509{ 1510 struct malo_copy_maddr_ctx *ctx = arg; 1511 1512 if (ctx->nmc == MALO_HAL_MCAST_MAX) 1513 return (0); 1514 1515 IEEE80211_ADDR_COPY(ctx->macs + (ctx->nmc * IEEE80211_ADDR_LEN), 1516 LLADDR(sdl)); 1517 ctx->nmc++; 1518 1519 return (1); 1520} 1521 1522/* 1523 * Set the multicast filter contents into the hardware. 1524 */ 1525static void 1526malo_setmcastfilter(struct malo_softc *sc) 1527{ 1528 struct malo_copy_maddr_ctx ctx; 1529 struct ieee80211com *ic = &sc->malo_ic; 1530 struct ieee80211vap *vap; 1531 1532 1533 if (ic->ic_opmode == IEEE80211_M_MONITOR || ic->ic_allmulti > 0 || 1534 ic->ic_promisc > 0) 1535 goto all; 1536 1537 ctx.nmc = 0; 1538 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) 1539 if_foreach_llmaddr(vap->iv_ifp, malo_copy_maddr, &ctx); 1540 1541 malo_hal_setmcast(sc->malo_mh, ctx.nmc, ctx.macs); 1542 1543all: 1544 /* 1545 * XXX we don't know how to set the f/w for supporting 1546 * IFF_ALLMULTI | IFF_PROMISC cases 1547 */ 1548 return; 1549} 1550 1551static int 1552malo_mode_init(struct malo_softc *sc) 1553{ 1554 struct ieee80211com *ic = &sc->malo_ic; 1555 struct malo_hal *mh = sc->malo_mh; 1556 1557 malo_hal_setpromisc(mh, ic->ic_promisc > 0); 1558 malo_setmcastfilter(sc); 1559 1560 return ENXIO; 1561} 1562 1563static void 1564malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1565{ 1566 struct ieee80211_node *ni; 1567 struct malo_txbuf *bf; 1568 u_int ix __unused; 1569 1570 /* 1571 * NB: this assumes output has been stopped and 1572 * we do not need to block malo_tx_tasklet 1573 */ 1574 for (ix = 0;; ix++) { 1575 MALO_TXQ_LOCK(txq); 1576 bf = STAILQ_FIRST(&txq->active); 1577 if (bf == NULL) { 1578 MALO_TXQ_UNLOCK(txq); 1579 break; 1580 } 1581 STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1582 MALO_TXQ_UNLOCK(txq); 1583#ifdef MALO_DEBUG 1584 if (sc->malo_debug & MALO_DEBUG_RESET) { 1585 struct ieee80211com *ic = &sc->malo_ic; 1586 const struct malo_txrec *tr = 1587 mtod(bf->bf_m, const struct malo_txrec *); 1588 malo_printtxbuf(bf, txq->qnum, ix); 1589 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1590 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1591 } 1592#endif /* MALO_DEBUG */ 1593 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1594 ni = bf->bf_node; 1595 bf->bf_node = NULL; 1596 if (ni != NULL) { 1597 /* 1598 * Reclaim node reference. 1599 */ 1600 ieee80211_free_node(ni); 1601 } 1602 m_freem(bf->bf_m); 1603 bf->bf_m = NULL; 1604 1605 MALO_TXQ_LOCK(txq); 1606 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1607 txq->nfree++; 1608 MALO_TXQ_UNLOCK(txq); 1609 } 1610} 1611 1612static void 1613malo_stop(struct malo_softc *sc) 1614{ 1615 struct malo_hal *mh = sc->malo_mh; 1616 int i; 1617 1618 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u running %u\n", 1619 __func__, sc->malo_invalid, sc->malo_running); 1620 1621 MALO_LOCK_ASSERT(sc); 1622 1623 if (!sc->malo_running) 1624 return; 1625 1626 /* 1627 * Shutdown the hardware and driver: 1628 * disable interrupts 1629 * turn off the radio 1630 * drain and release tx queues 1631 * 1632 * Note that some of this work is not possible if the hardware 1633 * is gone (invalid). 1634 */ 1635 sc->malo_running = 0; 1636 callout_stop(&sc->malo_watchdog_timer); 1637 sc->malo_timer = 0; 1638 /* disable interrupt. */ 1639 malo_hal_intrset(mh, 0); 1640 /* turn off the radio. */ 1641 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1642 1643 /* drain and release tx queues. */ 1644 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1645 malo_tx_draintxq(sc, &sc->malo_txq[i]); 1646} 1647 1648static void 1649malo_parent(struct ieee80211com *ic) 1650{ 1651 struct malo_softc *sc = ic->ic_softc; 1652 int startall = 0; 1653 1654 MALO_LOCK(sc); 1655 if (ic->ic_nrunning > 0) { 1656 /* 1657 * Beware of being called during attach/detach 1658 * to reset promiscuous mode. In that case we 1659 * will still be marked UP but not RUNNING. 1660 * However trying to re-init the interface 1661 * is the wrong thing to do as we've already 1662 * torn down much of our state. There's 1663 * probably a better way to deal with this. 1664 */ 1665 if (!sc->malo_running && !sc->malo_invalid) { 1666 malo_init(sc); 1667 startall = 1; 1668 } 1669 /* 1670 * To avoid rescanning another access point, 1671 * do not call malo_init() here. Instead, 1672 * only reflect promisc mode settings. 1673 */ 1674 malo_mode_init(sc); 1675 } else if (sc->malo_running) 1676 malo_stop(sc); 1677 MALO_UNLOCK(sc); 1678 if (startall) 1679 ieee80211_start_all(ic); 1680} 1681 1682/* 1683 * Callback from the 802.11 layer to update the slot time 1684 * based on the current setting. We use it to notify the 1685 * firmware of ERP changes and the f/w takes care of things 1686 * like slot time and preamble. 1687 */ 1688static void 1689malo_updateslot(struct ieee80211com *ic) 1690{ 1691 struct malo_softc *sc = ic->ic_softc; 1692 struct malo_hal *mh = sc->malo_mh; 1693 int error; 1694 1695 /* NB: can be called early; suppress needless cmds */ 1696 if (!sc->malo_running) 1697 return; 1698 1699 DPRINTF(sc, MALO_DEBUG_RESET, 1700 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1701 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1702 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1703 1704 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1705 error = malo_hal_set_slot(mh, 1); 1706 else 1707 error = malo_hal_set_slot(mh, 0); 1708 1709 if (error != 0) 1710 device_printf(sc->malo_dev, "setting %s slot failed\n", 1711 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1712} 1713 1714static int 1715malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1716{ 1717 struct ieee80211com *ic = vap->iv_ic; 1718 struct malo_softc *sc = ic->ic_softc; 1719 struct malo_hal *mh = sc->malo_mh; 1720 int error; 1721 1722 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1723 ieee80211_state_name[vap->iv_state], 1724 ieee80211_state_name[nstate]); 1725 1726 /* 1727 * Invoke the net80211 layer first so iv_bss is setup. 1728 */ 1729 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1730 if (error != 0) 1731 return error; 1732 1733 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1734 struct ieee80211_node *ni = vap->iv_bss; 1735 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1736 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1737 1738 DPRINTF(sc, MALO_DEBUG_STATE, 1739 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1740 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1741 if_name(vap->iv_ifp), __func__, vap->iv_flags, 1742 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1743 ieee80211_chan2ieee(ic, ic->ic_curchan), 1744 ni->ni_associd, mode, tp->ucastrate); 1745 1746 malo_hal_setradio(mh, 1, 1747 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1748 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1749 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1750 malo_hal_set_rate(mh, mode, 1751 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1752 0 : malo_fix2rate(tp->ucastrate)); 1753 } 1754 return 0; 1755} 1756 1757static int 1758malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1759 const struct ieee80211_bpf_params *params) 1760{ 1761 struct ieee80211com *ic = ni->ni_ic; 1762 struct malo_softc *sc = ic->ic_softc; 1763 struct malo_txbuf *bf; 1764 struct malo_txq *txq; 1765 1766 if (!sc->malo_running || sc->malo_invalid) { 1767 m_freem(m); 1768 return ENETDOWN; 1769 } 1770 1771 /* 1772 * Grab a TX buffer and associated resources. Note that we depend 1773 * on the classification by the 802.11 layer to get to the right h/w 1774 * queue. Management frames must ALWAYS go on queue 1 but we 1775 * cannot just force that here because we may receive non-mgt frames. 1776 */ 1777 txq = &sc->malo_txq[0]; 1778 bf = malo_getbuf(sc, txq); 1779 if (bf == NULL) { 1780 m_freem(m); 1781 return ENOBUFS; 1782 } 1783 1784 /* 1785 * Pass the frame to the h/w for transmission. 1786 */ 1787 if (malo_tx_start(sc, ni, bf, m) != 0) { 1788 bf->bf_m = NULL; 1789 bf->bf_node = NULL; 1790 MALO_TXQ_LOCK(txq); 1791 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1792 txq->nfree++; 1793 MALO_TXQ_UNLOCK(txq); 1794 1795 return EIO; /* XXX */ 1796 } 1797 1798 /* 1799 * NB: We don't need to lock against tx done because this just 1800 * prods the firmware to check the transmit descriptors. The firmware 1801 * will also start fetching descriptors by itself if it notices 1802 * new ones are present when it goes to deliver a tx done interrupt 1803 * to the host. So if we race with tx done processing it's ok. 1804 * Delivering the kick here rather than in malo_tx_start is 1805 * an optimization to avoid poking the firmware for each packet. 1806 * 1807 * NB: the queue id isn't used so 0 is ok. 1808 */ 1809 malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1810 1811 return 0; 1812} 1813 1814static void 1815malo_sysctlattach(struct malo_softc *sc) 1816{ 1817#ifdef MALO_DEBUG 1818 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1819 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1820 1821 sc->malo_debug = malo_debug; 1822 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1823 "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1824 "control debugging printfs"); 1825#endif 1826} 1827 1828static void 1829malo_announce(struct malo_softc *sc) 1830{ 1831 1832 device_printf(sc->malo_dev, 1833 "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1834 sc->malo_hwspecs.hwversion, 1835 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1836 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1837 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1838 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1839 sc->malo_hwspecs.regioncode); 1840 1841 if (bootverbose || malo_rxbuf != MALO_RXBUF) 1842 device_printf(sc->malo_dev, 1843 "using %u rx buffers\n", malo_rxbuf); 1844 if (bootverbose || malo_txbuf != MALO_TXBUF) 1845 device_printf(sc->malo_dev, 1846 "using %u tx buffers\n", malo_txbuf); 1847} 1848 1849/* 1850 * Convert net80211 channel to a HAL channel. 1851 */ 1852static void 1853malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1854{ 1855 hc->channel = chan->ic_ieee; 1856 1857 *(uint32_t *)&hc->flags = 0; 1858 if (IEEE80211_IS_CHAN_2GHZ(chan)) 1859 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1860} 1861 1862/* 1863 * Set/change channels. If the channel is really being changed, 1864 * it's done by reseting the chip. To accomplish this we must 1865 * first cleanup any pending DMA, then restart stuff after a la 1866 * malo_init. 1867 */ 1868static int 1869malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1870{ 1871 struct malo_hal *mh = sc->malo_mh; 1872 struct malo_hal_channel hchan; 1873 1874 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1875 __func__, chan->ic_freq, chan->ic_flags); 1876 1877 /* 1878 * Convert to a HAL channel description with the flags constrained 1879 * to reflect the current operating mode. 1880 */ 1881 malo_mapchan(&hchan, chan); 1882 malo_hal_intrset(mh, 0); /* disable interrupts */ 1883 malo_hal_setchannel(mh, &hchan); 1884 malo_hal_settxpower(mh, &hchan); 1885 1886 /* 1887 * Update internal state. 1888 */ 1889 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 1890 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 1891 if (IEEE80211_IS_CHAN_ANYG(chan)) { 1892 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 1893 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 1894 } else { 1895 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 1896 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 1897 } 1898 sc->malo_curchan = hchan; 1899 malo_hal_intrset(mh, sc->malo_imask); 1900 1901 return 0; 1902} 1903 1904static void 1905malo_scan_start(struct ieee80211com *ic) 1906{ 1907 struct malo_softc *sc = ic->ic_softc; 1908 1909 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 1910} 1911 1912static void 1913malo_scan_end(struct ieee80211com *ic) 1914{ 1915 struct malo_softc *sc = ic->ic_softc; 1916 1917 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 1918} 1919 1920static void 1921malo_set_channel(struct ieee80211com *ic) 1922{ 1923 struct malo_softc *sc = ic->ic_softc; 1924 1925 (void) malo_chan_set(sc, ic->ic_curchan); 1926} 1927 1928static void 1929malo_rx_proc(void *arg, int npending) 1930{ 1931 struct malo_softc *sc = arg; 1932 struct ieee80211com *ic = &sc->malo_ic; 1933 struct malo_rxbuf *bf; 1934 struct malo_rxdesc *ds; 1935 struct mbuf *m, *mnew; 1936 struct ieee80211_qosframe *wh; 1937 struct ieee80211_node *ni; 1938 int off, len, hdrlen, pktlen, rssi, ntodo; 1939 uint8_t *data, status; 1940 uint32_t readptr, writeptr; 1941 1942 DPRINTF(sc, MALO_DEBUG_RX_PROC, 1943 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 1944 __func__, npending, 1945 sc->malo_hwspecs.rxdesc_read, 1946 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 1947 sc->malo_hwspecs.rxdesc_write, 1948 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 1949 1950 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 1951 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 1952 if (readptr == writeptr) 1953 return; 1954 1955 bf = sc->malo_rxnext; 1956 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 1957 if (bf == NULL) { 1958 bf = STAILQ_FIRST(&sc->malo_rxbuf); 1959 break; 1960 } 1961 ds = bf->bf_desc; 1962 if (bf->bf_m == NULL) { 1963 /* 1964 * If data allocation failed previously there 1965 * will be no buffer; try again to re-populate it. 1966 * Note the firmware will not advance to the next 1967 * descriptor with a dma buffer so we must mimic 1968 * this or we'll get out of sync. 1969 */ 1970 DPRINTF(sc, MALO_DEBUG_ANY, 1971 "%s: rx buf w/o dma memory\n", __func__); 1972 (void)malo_rxbuf_init(sc, bf); 1973 break; 1974 } 1975 MALO_RXDESC_SYNC(sc, ds, 1976 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1977 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 1978 break; 1979 1980 readptr = le32toh(ds->physnext); 1981 1982#ifdef MALO_DEBUG 1983 if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 1984 malo_printrxbuf(bf, 0); 1985#endif 1986 status = ds->status; 1987 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 1988 counter_u64_add(ic->ic_ierrors, 1); 1989 goto rx_next; 1990 } 1991 /* 1992 * Sync the data buffer. 1993 */ 1994 len = le16toh(ds->pktlen); 1995 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1996 BUS_DMASYNC_POSTREAD); 1997 /* 1998 * The 802.11 header is provided all or in part at the front; 1999 * use it to calculate the true size of the header that we'll 2000 * construct below. We use this to figure out where to copy 2001 * payload prior to constructing the header. 2002 */ 2003 m = bf->bf_m; 2004 data = mtod(m, uint8_t *); 2005 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2006 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2007 2008 /* 2009 * Calculate RSSI. XXX wrong 2010 */ 2011 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2012 if (rssi > 100) 2013 rssi = 100; 2014 2015 pktlen = hdrlen + (len - off); 2016 /* 2017 * NB: we know our frame is at least as large as 2018 * IEEE80211_MIN_LEN because there is a 4-address frame at 2019 * the front. Hence there's no need to vet the packet length. 2020 * If the frame in fact is too small it should be discarded 2021 * at the net80211 layer. 2022 */ 2023 2024 /* XXX don't need mbuf, just dma buffer */ 2025 mnew = malo_getrxmbuf(sc, bf); 2026 if (mnew == NULL) { 2027 counter_u64_add(ic->ic_ierrors, 1); 2028 goto rx_next; 2029 } 2030 /* 2031 * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2032 * re-setup the rx descriptor using the replacement dma 2033 * buffer we just installed above. 2034 */ 2035 bf->bf_m = mnew; 2036 m->m_data += off - hdrlen; 2037 m->m_pkthdr.len = m->m_len = pktlen; 2038 2039 /* 2040 * Piece 802.11 header together. 2041 */ 2042 wh = mtod(m, struct ieee80211_qosframe *); 2043 /* NB: don't need to do this sometimes but ... */ 2044 /* XXX special case so we can memcpy after m_devget? */ 2045 ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2046 if (IEEE80211_QOS_HAS_SEQ(wh)) 2047 *(uint16_t *)ieee80211_getqos(wh) = ds->qosctrl; 2048 if (ieee80211_radiotap_active(ic)) { 2049 sc->malo_rx_th.wr_flags = 0; 2050 sc->malo_rx_th.wr_rate = ds->rate; 2051 sc->malo_rx_th.wr_antsignal = rssi; 2052 sc->malo_rx_th.wr_antnoise = ds->nf; 2053 } 2054#ifdef MALO_DEBUG 2055 if (IFF_DUMPPKTS_RECV(sc, wh)) { 2056 ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2057 len, ds->rate, rssi); 2058 } 2059#endif 2060 /* dispatch */ 2061 ni = ieee80211_find_rxnode(ic, 2062 (struct ieee80211_frame_min *)wh); 2063 if (ni != NULL) { 2064 (void) ieee80211_input(ni, m, rssi, ds->nf); 2065 ieee80211_free_node(ni); 2066 } else 2067 (void) ieee80211_input_all(ic, m, rssi, ds->nf); 2068rx_next: 2069 /* NB: ignore ENOMEM so we process more descriptors */ 2070 (void) malo_rxbuf_init(sc, bf); 2071 bf = STAILQ_NEXT(bf, bf_list); 2072 } 2073 2074 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2075 sc->malo_rxnext = bf; 2076 2077 if (mbufq_first(&sc->malo_snd) != NULL) 2078 malo_start(sc); 2079} 2080 2081/* 2082 * Reclaim all tx queue resources. 2083 */ 2084static void 2085malo_tx_cleanup(struct malo_softc *sc) 2086{ 2087 int i; 2088 2089 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2090 malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2091} 2092 2093int 2094malo_detach(struct malo_softc *sc) 2095{ 2096 struct ieee80211com *ic = &sc->malo_ic; 2097 2098 malo_stop(sc); 2099 2100 if (sc->malo_tq != NULL) { 2101 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2102 taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2103 taskqueue_free(sc->malo_tq); 2104 sc->malo_tq = NULL; 2105 } 2106 2107 /* 2108 * NB: the order of these is important: 2109 * o call the 802.11 layer before detaching the hal to 2110 * insure callbacks into the driver to delete global 2111 * key cache entries can be handled 2112 * o reclaim the tx queue data structures after calling 2113 * the 802.11 layer as we'll get called back to reclaim 2114 * node state and potentially want to use them 2115 * o to cleanup the tx queues the hal is called, so detach 2116 * it last 2117 * Other than that, it's straightforward... 2118 */ 2119 ieee80211_ifdetach(ic); 2120 callout_drain(&sc->malo_watchdog_timer); 2121 malo_dma_cleanup(sc); 2122 malo_tx_cleanup(sc); 2123 malo_hal_detach(sc->malo_mh); 2124 mbufq_drain(&sc->malo_snd); 2125 MALO_LOCK_DESTROY(sc); 2126 2127 return 0; 2128} 2129 2130void 2131malo_shutdown(struct malo_softc *sc) 2132{ 2133 2134 malo_stop(sc); 2135} 2136 2137void 2138malo_suspend(struct malo_softc *sc) 2139{ 2140 2141 malo_stop(sc); 2142} 2143 2144void 2145malo_resume(struct malo_softc *sc) 2146{ 2147 2148 if (sc->malo_ic.ic_nrunning > 0) 2149 malo_init(sc); 2150} 2151