1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009 Oleksandr Tymoshenko. All rights reserved. 5 * Copyright (c) 2018 Ian Lepore. All rights reserved. 6 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30#include "opt_platform.h" 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bio.h> 35#include <sys/bus.h> 36#include <sys/conf.h> 37#include <sys/kernel.h> 38#include <sys/kthread.h> 39#include <sys/lock.h> 40#include <sys/mbuf.h> 41#include <sys/malloc.h> 42#include <sys/module.h> 43#include <sys/mutex.h> 44#include <geom/geom_disk.h> 45 46#ifdef FDT 47#include <dev/fdt/fdt_common.h> 48#include <dev/ofw/ofw_bus_subr.h> 49#include <dev/ofw/openfirm.h> 50#endif 51 52#include <dev/spibus/spi.h> 53#include "spibus_if.h" 54 55#include <dev/flash/mx25lreg.h> 56 57#define FL_NONE 0x00 58#define FL_ERASE_4K 0x01 59#define FL_ERASE_32K 0x02 60#define FL_ENABLE_4B_ADDR 0x04 61#define FL_DISABLE_4B_ADDR 0x08 62 63/* 64 * Define the sectorsize to be a smaller size rather than the flash 65 * sector size. Trying to run FFS off of a 64k flash sector size 66 * results in a completely un-usable system. 67 */ 68#define MX25L_SECTORSIZE 512 69 70struct mx25l_flash_ident 71{ 72 const char *name; 73 uint8_t manufacturer_id; 74 uint16_t device_id; 75 unsigned int sectorsize; 76 unsigned int sectorcount; 77 unsigned int flags; 78}; 79 80struct mx25l_softc 81{ 82 device_t sc_dev; 83 device_t sc_parent; 84 uint8_t sc_manufacturer_id; 85 uint16_t sc_device_id; 86 unsigned int sc_erasesize; 87 struct mtx sc_mtx; 88 struct disk *sc_disk; 89 struct proc *sc_p; 90 struct bio_queue_head sc_bio_queue; 91 unsigned int sc_flags; 92 unsigned int sc_taskstate; 93 uint8_t sc_dummybuf[FLASH_PAGE_SIZE]; 94}; 95 96#define TSTATE_STOPPED 0 97#define TSTATE_STOPPING 1 98#define TSTATE_RUNNING 2 99 100#define M25PXX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 101#define M25PXX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 102#define M25PXX_LOCK_INIT(_sc) \ 103 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 104 "mx25l", MTX_DEF) 105#define M25PXX_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 106#define M25PXX_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 107#define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 108 109/* disk routines */ 110static int mx25l_open(struct disk *dp); 111static int mx25l_close(struct disk *dp); 112static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *); 113static void mx25l_strategy(struct bio *bp); 114static int mx25l_getattr(struct bio *bp); 115static void mx25l_task(void *arg); 116 117static struct mx25l_flash_ident flash_devices[] = { 118 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 119 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 120 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 121 { "en25q32", 0x1c, 0x3016, 64 * 1024, 64, FL_NONE }, 122 { "en25q64", 0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 123 { "m25p32", 0x20, 0x2016, 64 * 1024, 64, FL_NONE }, 124 { "m25p64", 0x20, 0x2017, 64 * 1024, 128, FL_NONE }, 125 { "mx25l1606e", 0xc2, 0x2015, 64 * 1024, 32, FL_ERASE_4K}, 126 { "mx25ll32", 0xc2, 0x2016, 64 * 1024, 64, FL_NONE }, 127 { "mx25ll64", 0xc2, 0x2017, 64 * 1024, 128, FL_NONE }, 128 { "mx25ll128", 0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K }, 129 { "mx25ll256", 0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR }, 130 { "n25q64", 0x20, 0xba17, 64 * 1024, 128, FL_ERASE_4K }, 131 { "s25fl032", 0x01, 0x0215, 64 * 1024, 64, FL_NONE }, 132 { "s25fl064", 0x01, 0x0216, 64 * 1024, 128, FL_NONE }, 133 { "s25fl128", 0x01, 0x2018, 64 * 1024, 256, FL_NONE }, 134 { "s25fl256s", 0x01, 0x0219, 64 * 1024, 512, FL_NONE }, 135 { "s25fl512s", 0x01, 0x0220, 64 * 1024, 1024, FL_NONE }, 136 { "SST25VF010A", 0xbf, 0x2549, 4 * 1024, 32, FL_ERASE_4K | FL_ERASE_32K }, 137 { "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K }, 138 139 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 140 { "w25x32", 0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K }, 141 { "w25x64", 0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 142 { "w25q32", 0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K }, 143 { "w25q64", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 144 { "w25q64bv", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 145 { "w25q128", 0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 146 { "w25q256", 0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K }, 147 148 /* Atmel */ 149 { "at25df641", 0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K }, 150 151 /* GigaDevice */ 152 { "gd25q64", 0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 153 { "gd25q128", 0xc8, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 154 155 /* Integrated Silicon Solution */ 156 { "is25wp256", 0x9d, 0x7019, 64 * 1024, 512, FL_ERASE_4K | FL_ENABLE_4B_ADDR}, 157}; 158 159static int 160mx25l_wait_for_device_ready(struct mx25l_softc *sc) 161{ 162 uint8_t txBuf[2], rxBuf[2]; 163 struct spi_command cmd; 164 int err; 165 166 memset(&cmd, 0, sizeof(cmd)); 167 168 do { 169 txBuf[0] = CMD_READ_STATUS; 170 cmd.tx_cmd = txBuf; 171 cmd.rx_cmd = rxBuf; 172 cmd.rx_cmd_sz = 2; 173 cmd.tx_cmd_sz = 2; 174 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 175 } while (err == 0 && (rxBuf[1] & STATUS_WIP)); 176 177 return (err); 178} 179 180static struct mx25l_flash_ident* 181mx25l_get_device_ident(struct mx25l_softc *sc) 182{ 183 uint8_t txBuf[8], rxBuf[8]; 184 struct spi_command cmd; 185 uint8_t manufacturer_id; 186 uint16_t dev_id; 187 int err, i; 188 189 memset(&cmd, 0, sizeof(cmd)); 190 memset(txBuf, 0, sizeof(txBuf)); 191 memset(rxBuf, 0, sizeof(rxBuf)); 192 193 txBuf[0] = CMD_READ_IDENT; 194 cmd.tx_cmd = &txBuf; 195 cmd.rx_cmd = &rxBuf; 196 /* 197 * Some compatible devices has extended two-bytes ID 198 * We'll use only manufacturer/deviceid atm 199 */ 200 cmd.tx_cmd_sz = 4; 201 cmd.rx_cmd_sz = 4; 202 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 203 if (err) 204 return (NULL); 205 206 manufacturer_id = rxBuf[1]; 207 dev_id = (rxBuf[2] << 8) | (rxBuf[3]); 208 209 for (i = 0; i < nitems(flash_devices); i++) { 210 if ((flash_devices[i].manufacturer_id == manufacturer_id) && 211 (flash_devices[i].device_id == dev_id)) 212 return &flash_devices[i]; 213 } 214 215 device_printf(sc->sc_dev, 216 "Unknown SPI flash device. Vendor: %02x, device id: %04x\n", 217 manufacturer_id, dev_id); 218 return (NULL); 219} 220 221static int 222mx25l_set_writable(struct mx25l_softc *sc, int writable) 223{ 224 uint8_t txBuf[1], rxBuf[1]; 225 struct spi_command cmd; 226 int err; 227 228 memset(&cmd, 0, sizeof(cmd)); 229 memset(txBuf, 0, sizeof(txBuf)); 230 memset(rxBuf, 0, sizeof(rxBuf)); 231 232 txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE; 233 cmd.tx_cmd = txBuf; 234 cmd.rx_cmd = rxBuf; 235 cmd.rx_cmd_sz = 1; 236 cmd.tx_cmd_sz = 1; 237 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 238 return (err); 239} 240 241static int 242mx25l_erase_cmd(struct mx25l_softc *sc, off_t sector) 243{ 244 uint8_t txBuf[5], rxBuf[5]; 245 struct spi_command cmd; 246 int err; 247 248 if ((err = mx25l_set_writable(sc, 1)) != 0) 249 return (err); 250 251 memset(&cmd, 0, sizeof(cmd)); 252 memset(txBuf, 0, sizeof(txBuf)); 253 memset(rxBuf, 0, sizeof(rxBuf)); 254 255 cmd.tx_cmd = txBuf; 256 cmd.rx_cmd = rxBuf; 257 258 if (sc->sc_flags & FL_ERASE_4K) 259 txBuf[0] = CMD_BLOCK_4K_ERASE; 260 else if (sc->sc_flags & FL_ERASE_32K) 261 txBuf[0] = CMD_BLOCK_32K_ERASE; 262 else 263 txBuf[0] = CMD_SECTOR_ERASE; 264 265 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 266 cmd.rx_cmd_sz = 5; 267 cmd.tx_cmd_sz = 5; 268 txBuf[1] = ((sector >> 24) & 0xff); 269 txBuf[2] = ((sector >> 16) & 0xff); 270 txBuf[3] = ((sector >> 8) & 0xff); 271 txBuf[4] = (sector & 0xff); 272 } else { 273 cmd.rx_cmd_sz = 4; 274 cmd.tx_cmd_sz = 4; 275 txBuf[1] = ((sector >> 16) & 0xff); 276 txBuf[2] = ((sector >> 8) & 0xff); 277 txBuf[3] = (sector & 0xff); 278 } 279 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) != 0) 280 return (err); 281 err = mx25l_wait_for_device_ready(sc); 282 return (err); 283} 284 285static int 286mx25l_write(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 287{ 288 uint8_t txBuf[8], rxBuf[8]; 289 struct spi_command cmd; 290 off_t bytes_to_write; 291 int err = 0; 292 293 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 294 cmd.tx_cmd_sz = 5; 295 cmd.rx_cmd_sz = 5; 296 } else { 297 cmd.tx_cmd_sz = 4; 298 cmd.rx_cmd_sz = 4; 299 } 300 301 /* 302 * Writes must be aligned to the erase sectorsize, since blocks are 303 * fully erased before they're written to. 304 */ 305 if (count % sc->sc_erasesize != 0 || offset % sc->sc_erasesize != 0) 306 return (EIO); 307 308 /* 309 * Maximum write size for CMD_PAGE_PROGRAM is FLASH_PAGE_SIZE, so loop 310 * to write chunks of FLASH_PAGE_SIZE bytes each. 311 */ 312 while (count != 0) { 313 /* If we crossed a sector boundary, erase the next sector. */ 314 if (((offset) % sc->sc_erasesize) == 0) { 315 err = mx25l_erase_cmd(sc, offset); 316 if (err) 317 break; 318 } 319 320 txBuf[0] = CMD_PAGE_PROGRAM; 321 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 322 txBuf[1] = (offset >> 24) & 0xff; 323 txBuf[2] = (offset >> 16) & 0xff; 324 txBuf[3] = (offset >> 8) & 0xff; 325 txBuf[4] = offset & 0xff; 326 } else { 327 txBuf[1] = (offset >> 16) & 0xff; 328 txBuf[2] = (offset >> 8) & 0xff; 329 txBuf[3] = offset & 0xff; 330 } 331 332 bytes_to_write = MIN(FLASH_PAGE_SIZE, count); 333 cmd.tx_cmd = txBuf; 334 cmd.rx_cmd = rxBuf; 335 cmd.tx_data = data; 336 cmd.rx_data = sc->sc_dummybuf; 337 cmd.tx_data_sz = (uint32_t)bytes_to_write; 338 cmd.rx_data_sz = (uint32_t)bytes_to_write; 339 340 /* 341 * Each completed write operation resets WEL (write enable 342 * latch) to disabled state, so we re-enable it here. 343 */ 344 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 345 break; 346 if ((err = mx25l_set_writable(sc, 1)) != 0) 347 break; 348 349 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 350 if (err != 0) 351 break; 352 err = mx25l_wait_for_device_ready(sc); 353 if (err) 354 break; 355 356 data += bytes_to_write; 357 offset += bytes_to_write; 358 count -= bytes_to_write; 359 } 360 361 return (err); 362} 363 364static int 365mx25l_read(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 366{ 367 uint8_t txBuf[8], rxBuf[8]; 368 struct spi_command cmd; 369 int err = 0; 370 371 /* 372 * Enforce that reads are aligned to the disk sectorsize, not the 373 * erase sectorsize. In this way, smaller read IO is possible, 374 * dramatically speeding up filesystem/geom_compress access. 375 */ 376 if (count % sc->sc_disk->d_sectorsize != 0 || 377 offset % sc->sc_disk->d_sectorsize != 0) 378 return (EIO); 379 380 txBuf[0] = CMD_FAST_READ; 381 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 382 cmd.tx_cmd_sz = 6; 383 cmd.rx_cmd_sz = 6; 384 385 txBuf[1] = (offset >> 24) & 0xff; 386 txBuf[2] = (offset >> 16) & 0xff; 387 txBuf[3] = (offset >> 8) & 0xff; 388 txBuf[4] = offset & 0xff; 389 /* Dummy byte */ 390 txBuf[5] = 0; 391 } else { 392 cmd.tx_cmd_sz = 5; 393 cmd.rx_cmd_sz = 5; 394 395 txBuf[1] = (offset >> 16) & 0xff; 396 txBuf[2] = (offset >> 8) & 0xff; 397 txBuf[3] = offset & 0xff; 398 /* Dummy byte */ 399 txBuf[4] = 0; 400 } 401 402 cmd.tx_cmd = txBuf; 403 cmd.rx_cmd = rxBuf; 404 cmd.tx_data = data; 405 cmd.rx_data = data; 406 cmd.tx_data_sz = count; 407 cmd.rx_data_sz = count; 408 409 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 410 return (err); 411} 412 413static int 414mx25l_set_4b_mode(struct mx25l_softc *sc, uint8_t command) 415{ 416 uint8_t txBuf[1], rxBuf[1]; 417 struct spi_command cmd; 418 int err; 419 420 memset(&cmd, 0, sizeof(cmd)); 421 memset(txBuf, 0, sizeof(txBuf)); 422 memset(rxBuf, 0, sizeof(rxBuf)); 423 424 cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1; 425 426 cmd.tx_cmd = txBuf; 427 cmd.rx_cmd = rxBuf; 428 429 txBuf[0] = command; 430 431 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) == 0) 432 err = mx25l_wait_for_device_ready(sc); 433 434 return (err); 435} 436 437#ifdef FDT 438static struct ofw_compat_data compat_data[] = { 439 { "st,m25p", 1 }, 440 { "jedec,spi-nor", 1 }, 441 { NULL, 0 }, 442}; 443#endif 444 445static int 446mx25l_probe(device_t dev) 447{ 448#ifdef FDT 449 int i; 450 451 if (!ofw_bus_status_okay(dev)) 452 return (ENXIO); 453 454 /* First try to match the compatible property to the compat_data */ 455 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1) 456 goto found; 457 458 /* 459 * Next, try to find a compatible device using the names in the 460 * flash_devices structure 461 */ 462 for (i = 0; i < nitems(flash_devices); i++) 463 if (ofw_bus_is_compatible(dev, flash_devices[i].name)) 464 goto found; 465 466 return (ENXIO); 467found: 468#endif 469 device_set_desc(dev, "M25Pxx Flash Family"); 470 471 return (0); 472} 473 474static int 475mx25l_attach(device_t dev) 476{ 477 struct mx25l_softc *sc; 478 struct mx25l_flash_ident *ident; 479 int err; 480 481 sc = device_get_softc(dev); 482 sc->sc_dev = dev; 483 sc->sc_parent = device_get_parent(sc->sc_dev); 484 485 M25PXX_LOCK_INIT(sc); 486 487 ident = mx25l_get_device_ident(sc); 488 if (ident == NULL) 489 return (ENXIO); 490 491 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 492 return (err); 493 494 sc->sc_flags = ident->flags; 495 496 if (sc->sc_flags & FL_ERASE_4K) 497 sc->sc_erasesize = 4 * 1024; 498 else if (sc->sc_flags & FL_ERASE_32K) 499 sc->sc_erasesize = 32 * 1024; 500 else 501 sc->sc_erasesize = ident->sectorsize; 502 503 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 504 if ((err = mx25l_set_4b_mode(sc, CMD_ENTER_4B_MODE)) != 0) 505 return (err); 506 } else if (sc->sc_flags & FL_DISABLE_4B_ADDR) { 507 if ((err = mx25l_set_4b_mode(sc, CMD_EXIT_4B_MODE)) != 0) 508 return (err); 509 } 510 511 sc->sc_disk = disk_alloc(); 512 sc->sc_disk->d_open = mx25l_open; 513 sc->sc_disk->d_close = mx25l_close; 514 sc->sc_disk->d_strategy = mx25l_strategy; 515 sc->sc_disk->d_getattr = mx25l_getattr; 516 sc->sc_disk->d_ioctl = mx25l_ioctl; 517 sc->sc_disk->d_name = "flash/spi"; 518 sc->sc_disk->d_drv1 = sc; 519 sc->sc_disk->d_maxsize = DFLTPHYS; 520 sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE; 521 sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount; 522 sc->sc_disk->d_stripesize = sc->sc_erasesize; 523 sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); 524 sc->sc_disk->d_dump = NULL; /* NB: no dumps */ 525 strlcpy(sc->sc_disk->d_descr, ident->name, 526 sizeof(sc->sc_disk->d_descr)); 527 528 disk_create(sc->sc_disk, DISK_VERSION); 529 bioq_init(&sc->sc_bio_queue); 530 531 kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); 532 sc->sc_taskstate = TSTATE_RUNNING; 533 534 device_printf(sc->sc_dev, 535 "device type %s, size %dK in %d sectors of %dK, erase size %dK\n", 536 ident->name, 537 ident->sectorcount * ident->sectorsize / 1024, 538 ident->sectorcount, ident->sectorsize / 1024, 539 sc->sc_erasesize / 1024); 540 541 return (0); 542} 543 544static int 545mx25l_detach(device_t dev) 546{ 547 struct mx25l_softc *sc; 548 int err; 549 550 sc = device_get_softc(dev); 551 err = 0; 552 553 M25PXX_LOCK(sc); 554 if (sc->sc_taskstate == TSTATE_RUNNING) { 555 sc->sc_taskstate = TSTATE_STOPPING; 556 wakeup(sc); 557 while (err == 0 && sc->sc_taskstate != TSTATE_STOPPED) { 558 err = msleep(sc, &sc->sc_mtx, 0, "mx25dt", hz * 3); 559 if (err != 0) { 560 sc->sc_taskstate = TSTATE_RUNNING; 561 device_printf(sc->sc_dev, 562 "Failed to stop queue task\n"); 563 } 564 } 565 } 566 M25PXX_UNLOCK(sc); 567 568 if (err == 0 && sc->sc_taskstate == TSTATE_STOPPED) { 569 disk_destroy(sc->sc_disk); 570 bioq_flush(&sc->sc_bio_queue, NULL, ENXIO); 571 M25PXX_LOCK_DESTROY(sc); 572 } 573 return (err); 574} 575 576static int 577mx25l_open(struct disk *dp) 578{ 579 return (0); 580} 581 582static int 583mx25l_close(struct disk *dp) 584{ 585 586 return (0); 587} 588 589static int 590mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, 591 struct thread *td) 592{ 593 594 return (EINVAL); 595} 596 597static void 598mx25l_strategy(struct bio *bp) 599{ 600 struct mx25l_softc *sc; 601 602 sc = (struct mx25l_softc *)bp->bio_disk->d_drv1; 603 M25PXX_LOCK(sc); 604 bioq_disksort(&sc->sc_bio_queue, bp); 605 wakeup(sc); 606 M25PXX_UNLOCK(sc); 607} 608 609static int 610mx25l_getattr(struct bio *bp) 611{ 612 struct mx25l_softc *sc; 613 device_t dev; 614 615 if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) 616 return (ENXIO); 617 618 sc = bp->bio_disk->d_drv1; 619 dev = sc->sc_dev; 620 621 if (strcmp(bp->bio_attribute, "SPI::device") == 0) { 622 if (bp->bio_length != sizeof(dev)) 623 return (EFAULT); 624 bcopy(&dev, bp->bio_data, sizeof(dev)); 625 } else 626 return (-1); 627 return (0); 628} 629 630static void 631mx25l_task(void *arg) 632{ 633 struct mx25l_softc *sc = (struct mx25l_softc*)arg; 634 struct bio *bp; 635 636 for (;;) { 637 M25PXX_LOCK(sc); 638 do { 639 if (sc->sc_taskstate == TSTATE_STOPPING) { 640 sc->sc_taskstate = TSTATE_STOPPED; 641 M25PXX_UNLOCK(sc); 642 wakeup(sc); 643 kproc_exit(0); 644 } 645 bp = bioq_first(&sc->sc_bio_queue); 646 if (bp == NULL) 647 msleep(sc, &sc->sc_mtx, PRIBIO, "mx25jq", 0); 648 } while (bp == NULL); 649 bioq_remove(&sc->sc_bio_queue, bp); 650 M25PXX_UNLOCK(sc); 651 652 switch (bp->bio_cmd) { 653 case BIO_READ: 654 bp->bio_error = mx25l_read(sc, bp->bio_offset, 655 bp->bio_data, bp->bio_bcount); 656 break; 657 case BIO_WRITE: 658 bp->bio_error = mx25l_write(sc, bp->bio_offset, 659 bp->bio_data, bp->bio_bcount); 660 break; 661 default: 662 bp->bio_error = EOPNOTSUPP; 663 } 664 665 666 biodone(bp); 667 } 668} 669 670static device_method_t mx25l_methods[] = { 671 /* Device interface */ 672 DEVMETHOD(device_probe, mx25l_probe), 673 DEVMETHOD(device_attach, mx25l_attach), 674 DEVMETHOD(device_detach, mx25l_detach), 675 676 { 0, 0 } 677}; 678 679static driver_t mx25l_driver = { 680 "mx25l", 681 mx25l_methods, 682 sizeof(struct mx25l_softc), 683}; 684 685DRIVER_MODULE(mx25l, spibus, mx25l_driver, 0, 0); 686MODULE_DEPEND(mx25l, spibus, 1, 1, 1); 687#ifdef FDT 688MODULE_DEPEND(mx25l, fdt_slicer, 1, 1, 1); 689SPIBUS_FDT_PNP_INFO(compat_data); 690#endif 691