1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2022 Soren Schmidt <sos@deepcore.dk>
5 * Copyright (c) 2022 Jared McNeill <jmcneill@invisible.ca>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $Id: eqos_var.h 1009 2022-11-15 20:17:35Z sos $
30 */
31
32/*
33 * DesignWare Ethernet Quality-of-Service controller
34 */
35
36#ifndef _EQOS_VAR_H
37#define	_EQOS_VAR_H
38
39#include <dev/eqos/if_eqos_reg.h>
40
41#define	EQOS_DMA_DESC_COUNT	256
42
43#define	EQOS_RES_MEM		0
44#define	EQOS_RES_IRQ0		1
45#define	EQOS_RES_COUNT		2
46
47#define	EQOS_INTR_FLAGS		(INTR_TYPE_NET | INTR_MPSAFE)
48
49struct eqos_dma_desc {
50	uint32_t	des0;
51	uint32_t	des1;
52	uint32_t	des2;
53	uint32_t	des3;
54} __packed;
55
56struct eqos_bufmap {
57	bus_dmamap_t		map;
58	struct mbuf		*mbuf;
59};
60
61struct eqos_ring {
62	bus_dma_tag_t		desc_tag;
63	bus_dmamap_t		desc_map;
64	struct eqos_dma_desc	*desc_ring;
65	bus_addr_t		desc_ring_paddr;
66
67	bus_dma_tag_t		buf_tag;
68	struct eqos_bufmap	buf_map[EQOS_DMA_DESC_COUNT];
69
70	u_int			head;
71	u_int			tail;
72};
73
74struct eqos_softc {
75	device_t		dev;
76	struct resource 	*res[EQOS_RES_COUNT];
77	void			*irq_handle;
78#ifdef FDT
79	struct syscon		*grf;
80	int			grf_offset;
81#endif
82	uint32_t		csr_clock;
83	uint32_t		csr_clock_range;
84	uint32_t		hw_feature[4];
85	bool			link_up;
86	int			tx_watchdog;
87
88	struct ifnet		*ifp;
89	device_t		miibus;
90	struct mtx		lock;
91	struct callout		callout;
92
93	struct eqos_ring	tx;
94	struct eqos_ring	rx;
95};
96
97DECLARE_CLASS(eqos_driver);
98
99#endif
100