1/*-
2 * Copyright (c) 2012 Semihalf.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include "opt_platform.h"
28
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/kernel.h>
32#include <sys/bus.h>
33#include <sys/lock.h>
34#include <sys/module.h>
35#include <sys/mutex.h>
36#include <sys/proc.h>
37#include <sys/pcpu.h>
38#include <sys/sched.h>
39
40#include <machine/bus.h>
41#include <machine/tlb.h>
42
43#include <dev/ofw/ofw_bus.h>
44#include <dev/ofw/ofw_bus_subr.h>
45
46#include <powerpc/mpc85xx/mpc85xx.h>
47
48#include "bman.h"
49#include "portals.h"
50
51t_Handle bman_portal_setup(struct bman_softc *);
52
53struct dpaa_portals_softc *bp_sc;
54
55int
56bman_portals_attach(device_t dev)
57{
58	struct dpaa_portals_softc *sc;
59
60	sc = bp_sc = device_get_softc(dev);
61
62	/* Map bman portal to physical address space */
63	if (law_enable(OCP85XX_TGTIF_BMAN, sc->sc_dp_pa, sc->sc_dp_size)) {
64		bman_portals_detach(dev);
65		return (ENXIO);
66	}
67	/* Set portal properties for XX_VirtToPhys() */
68	XX_PortalSetInfo(dev);
69
70	return (bus_generic_attach(dev));
71}
72
73int
74bman_portals_detach(device_t dev)
75{
76	struct dpaa_portals_softc *sc;
77	int i;
78
79	bp_sc = NULL;
80	sc = device_get_softc(dev);
81
82	for (i = 0; i < ARRAY_SIZE(sc->sc_dp); i++) {
83		if (sc->sc_dp[i].dp_ph != NULL) {
84			thread_lock(curthread);
85			sched_bind(curthread, i);
86			thread_unlock(curthread);
87
88			BM_PORTAL_Free(sc->sc_dp[i].dp_ph);
89
90			thread_lock(curthread);
91			sched_unbind(curthread);
92			thread_unlock(curthread);
93		}
94
95		if (sc->sc_dp[i].dp_ires != NULL) {
96			XX_DeallocIntr((uintptr_t)sc->sc_dp[i].dp_ires);
97			bus_release_resource(dev, SYS_RES_IRQ,
98			    sc->sc_dp[i].dp_irid, sc->sc_dp[i].dp_ires);
99		}
100	}
101	for (i = 0; i < ARRAY_SIZE(sc->sc_rres); i++) {
102		if (sc->sc_rres[i] != NULL)
103			bus_release_resource(dev, SYS_RES_MEMORY,
104			    sc->sc_rrid[i],
105			    sc->sc_rres[i]);
106	}
107
108	return (0);
109}
110
111t_Handle
112bman_portal_setup(struct bman_softc *bsc)
113{
114	struct dpaa_portals_softc *sc;
115	t_BmPortalParam bpp;
116	t_Handle portal;
117	unsigned int cpu;
118	uintptr_t p;
119
120	/* Return NULL if we're not ready or while detach */
121	if (bp_sc == NULL)
122		return (NULL);
123
124	sc = bp_sc;
125
126	sched_pin();
127	portal = NULL;
128	cpu = PCPU_GET(cpuid);
129
130	/* Check if portal is ready */
131	while (atomic_cmpset_acq_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph,
132	    0, -1) == 0) {
133		p = atomic_load_acq_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph);
134
135		/* Return if portal is already initialized */
136		if (p != 0 && p != -1) {
137			sched_unpin();
138			return ((t_Handle)p);
139		}
140
141		/* Not inititialized and "owned" by another thread */
142		sched_relinquish(curthread);
143	}
144
145	/* Map portal registers */
146	dpaa_portal_map_registers(sc);
147
148	/* Configure and initialize portal */
149	bpp.ceBaseAddress = rman_get_bushandle(sc->sc_rres[0]);
150	bpp.ciBaseAddress = rman_get_bushandle(sc->sc_rres[1]);
151	bpp.h_Bm = bsc->sc_bh;
152	bpp.swPortalId = cpu;
153	bpp.irq = (uintptr_t)sc->sc_dp[cpu].dp_ires;
154
155	portal = BM_PORTAL_Config(&bpp);
156	if (portal == NULL)
157		goto err;
158
159	if (BM_PORTAL_Init(portal) != E_OK)
160		goto err;
161
162	atomic_store_rel_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph, (uintptr_t)portal);
163
164	sched_unpin();
165
166	return (portal);
167
168err:
169	if (portal != NULL)
170		BM_PORTAL_Free(portal);
171
172	atomic_store_rel_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph, 0);
173	sched_unpin();
174
175	return (NULL);
176}
177