1/*-
2 * Copyright 2016 Michal Meloun <mmel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28#include "opt_platform.h"
29#include <sys/param.h>
30#include <sys/conf.h>
31#include <sys/bus.h>
32#include <sys/kernel.h>
33#include <sys/kobj.h>
34#include <sys/malloc.h>
35#include <sys/mutex.h>
36#include <sys/module.h>
37#include <sys/rman.h>
38#include <sys/systm.h>
39
40#include <machine/bus.h>
41
42#ifdef FDT
43#include <dev/ofw/ofw_bus.h>
44#include <dev/ofw/ofw_bus_subr.h>
45#endif
46
47#include <dev/clk/clk_fixed.h>
48
49#define	CLK_TYPE_FIXED		1
50#define	CLK_TYPE_FIXED_FACTOR	2
51
52static int clknode_fixed_init(struct clknode *clk, device_t dev);
53static int clknode_fixed_recalc(struct clknode *clk, uint64_t *freq);
54static int clknode_fixed_set_freq(struct clknode *clk, uint64_t fin,
55    uint64_t *fout, int flags, int *stop);
56
57struct clknode_fixed_sc {
58	int		fixed_flags;
59	uint64_t	freq;
60	uint32_t	mult;
61	uint32_t	div;
62};
63
64static clknode_method_t clknode_fixed_methods[] = {
65	/* Device interface */
66	CLKNODEMETHOD(clknode_init,	   clknode_fixed_init),
67	CLKNODEMETHOD(clknode_recalc_freq, clknode_fixed_recalc),
68	CLKNODEMETHOD(clknode_set_freq,    clknode_fixed_set_freq),
69	CLKNODEMETHOD_END
70};
71DEFINE_CLASS_1(clknode_fixed, clknode_fixed_class, clknode_fixed_methods,
72   sizeof(struct clknode_fixed_sc), clknode_class);
73
74static int
75clknode_fixed_init(struct clknode *clk, device_t dev)
76{
77	struct clknode_fixed_sc *sc;
78
79	sc = clknode_get_softc(clk);
80	if (sc->freq == 0)
81		clknode_init_parent_idx(clk, 0);
82	return(0);
83}
84
85static int
86clknode_fixed_recalc(struct clknode *clk, uint64_t *freq)
87{
88	struct clknode_fixed_sc *sc;
89
90	sc = clknode_get_softc(clk);
91
92	if ((sc->mult != 0) && (sc->div != 0))
93		*freq = (*freq / sc->div) * sc->mult;
94	else
95		*freq = sc->freq;
96	return (0);
97}
98
99static int
100clknode_fixed_set_freq(struct clknode *clk, uint64_t fin, uint64_t *fout,
101    int flags, int *stop)
102{
103	struct clknode_fixed_sc *sc;
104
105	sc = clknode_get_softc(clk);
106	if (sc->mult == 0 || sc->div == 0) {
107		/* Fixed frequency clock. */
108		*stop = 1;
109		if (*fout != sc->freq)
110			return (ERANGE);
111		return (0);
112	}
113	/* Fixed factor clock. */
114	*stop = 0;
115	*fout = (*fout / sc->mult) *  sc->div;
116	return (0);
117}
118
119int
120clknode_fixed_register(struct clkdom *clkdom, struct clk_fixed_def *clkdef)
121{
122	struct clknode *clk;
123	struct clknode_fixed_sc *sc;
124
125	clk = clknode_create(clkdom, &clknode_fixed_class, &clkdef->clkdef);
126	if (clk == NULL)
127		return (1);
128
129	sc = clknode_get_softc(clk);
130	sc->fixed_flags = clkdef->fixed_flags;
131	sc->freq = clkdef->freq;
132	sc->mult = clkdef->mult;
133	sc->div = clkdef->div;
134
135	clknode_register(clkdom, clk);
136	return (0);
137}
138
139#ifdef FDT
140
141static struct ofw_compat_data compat_data[] = {
142	{"fixed-clock",		CLK_TYPE_FIXED},
143	{"fixed-factor-clock",  CLK_TYPE_FIXED_FACTOR},
144	{NULL,		 	0},
145};
146
147struct clk_fixed_softc {
148	device_t	dev;
149	struct clkdom	*clkdom;
150};
151
152static int
153clk_fixed_probe(device_t dev)
154{
155	intptr_t clk_type;
156
157	clk_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
158	switch (clk_type) {
159	case CLK_TYPE_FIXED:
160		if (OF_hasprop(ofw_bus_get_node(dev), "clock-frequency") == 0) {
161			device_printf(dev,
162			    "clock-fixed has no clock-frequency\n");
163			return (ENXIO);
164		}
165		device_set_desc(dev, "Fixed clock");
166		break;
167	case CLK_TYPE_FIXED_FACTOR:
168		device_set_desc(dev, "Fixed factor clock");
169		break;
170	default:
171		return (ENXIO);
172	}
173
174	if (!bootverbose)
175		device_quiet(dev);
176
177	return (BUS_PROBE_DEFAULT);
178}
179
180static int
181clk_fixed_init_fixed(struct clk_fixed_softc *sc, phandle_t node,
182    struct clk_fixed_def *def)
183{
184	uint32_t freq;
185	int rv;
186
187	def->clkdef.id = 1;
188	rv = OF_getencprop(node, "clock-frequency", &freq,  sizeof(freq));
189	if (rv <= 0)
190		return (ENXIO);
191	def->freq = freq;
192	return (0);
193}
194
195static int
196clk_fixed_init_fixed_factor(struct clk_fixed_softc *sc, phandle_t node,
197    struct clk_fixed_def *def)
198{
199	int rv;
200	clk_t  parent;
201
202	def->clkdef.id = 1;
203	rv = OF_getencprop(node, "clock-mult", &def->mult,  sizeof(def->mult));
204	if (rv <= 0)
205		return (ENXIO);
206	rv = OF_getencprop(node, "clock-div", &def->div,  sizeof(def->div));
207	if (rv <= 0)
208		return (ENXIO);
209	/* Get name of parent clock */
210	rv = clk_get_by_ofw_index(sc->dev, 0, 0, &parent);
211	if (rv != 0)
212		return (ENXIO);
213	def->clkdef.parent_names = malloc(sizeof(char *), M_OFWPROP, M_WAITOK);
214	def->clkdef.parent_names[0] = clk_get_name(parent);
215	def->clkdef.parent_cnt  = 1;
216	clk_release(parent);
217	return (0);
218}
219
220static int
221clk_fixed_attach(device_t dev)
222{
223	struct clk_fixed_softc *sc;
224	intptr_t clk_type;
225	phandle_t node;
226	struct clk_fixed_def def;
227	int rv;
228
229	sc = device_get_softc(dev);
230	sc->dev = dev;
231	node  = ofw_bus_get_node(dev);
232	clk_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
233
234	bzero(&def, sizeof(def));
235	if (clk_type == CLK_TYPE_FIXED)
236		rv = clk_fixed_init_fixed(sc, node, &def);
237	else if (clk_type == CLK_TYPE_FIXED_FACTOR)
238		rv = clk_fixed_init_fixed_factor(sc, node, &def);
239	else
240		rv = ENXIO;
241	if (rv != 0) {
242		device_printf(sc->dev, "Cannot FDT parameters.\n");
243		goto fail;
244	}
245	rv = clk_parse_ofw_clk_name(dev, node, &def.clkdef.name);
246	if (rv != 0) {
247		device_printf(sc->dev, "Cannot parse clock name.\n");
248		goto fail;
249	}
250	sc->clkdom = clkdom_create(dev);
251	KASSERT(sc->clkdom != NULL, ("Clock domain is NULL"));
252
253	rv = clknode_fixed_register(sc->clkdom, &def);
254	if (rv != 0) {
255		device_printf(sc->dev, "Cannot register fixed clock.\n");
256		rv = ENXIO;
257		goto fail;
258	}
259
260	rv = clkdom_finit(sc->clkdom);
261	if (rv != 0) {
262		device_printf(sc->dev, "Clk domain finit fails.\n");
263		rv = ENXIO;
264		goto fail;
265	}
266
267	if (bootverbose)
268		clkdom_dump(sc->clkdom);
269
270	OF_prop_free(__DECONST(char *, def.clkdef.name));
271	OF_prop_free(def.clkdef.parent_names);
272	return (bus_generic_attach(dev));
273
274fail:
275	OF_prop_free(__DECONST(char *, def.clkdef.name));
276	OF_prop_free(def.clkdef.parent_names);
277	return (rv);
278}
279
280static device_method_t clk_fixed_methods[] = {
281	/* Device interface */
282	DEVMETHOD(device_probe,		clk_fixed_probe),
283	DEVMETHOD(device_attach,	clk_fixed_attach),
284
285	DEVMETHOD_END
286};
287
288DEFINE_CLASS_0(clk_fixed, clk_fixed_driver, clk_fixed_methods,
289    sizeof(struct clk_fixed_softc));
290EARLY_DRIVER_MODULE(clk_fixed, simplebus, clk_fixed_driver, 0, 0,
291    BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
292MODULE_VERSION(clk_fixed, 1);
293
294#endif
295