1/*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer,
12 *    without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 *    redistribution must be conditioned upon including a substantially
16 *    similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 */
31
32#include <sys/cdefs.h>
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39
40#include "opt_inet.h"
41#include "opt_ath.h"
42/*
43 * This is needed for register operations which are performed
44 * by the driver - eg, calls to ath_hal_gettsf32().
45 *
46 * It's also required for any AH_DEBUG checks in here, eg the
47 * module dependencies.
48 */
49#include "opt_ah.h"
50#include "opt_wlan.h"
51
52#include <sys/param.h>
53#include <sys/systm.h>
54#include <sys/sysctl.h>
55#include <sys/mbuf.h>
56#include <sys/malloc.h>
57#include <sys/lock.h>
58#include <sys/mutex.h>
59#include <sys/kernel.h>
60#include <sys/socket.h>
61#include <sys/sockio.h>
62#include <sys/errno.h>
63#include <sys/callout.h>
64#include <sys/bus.h>
65#include <sys/endian.h>
66#include <sys/kthread.h>
67#include <sys/taskqueue.h>
68#include <sys/priv.h>
69#include <sys/module.h>
70#include <sys/ktr.h>
71#include <sys/smp.h>	/* for mp_ncpus */
72
73#include <machine/bus.h>
74
75#include <net/if.h>
76#include <net/if_var.h>
77#include <net/if_dl.h>
78#include <net/if_media.h>
79#include <net/if_types.h>
80#include <net/if_arp.h>
81#include <net/ethernet.h>
82#include <net/if_llc.h>
83
84#include <net80211/ieee80211_var.h>
85#include <net80211/ieee80211_regdomain.h>
86#ifdef IEEE80211_SUPPORT_SUPERG
87#include <net80211/ieee80211_superg.h>
88#endif
89#ifdef IEEE80211_SUPPORT_TDMA
90#include <net80211/ieee80211_tdma.h>
91#endif
92
93#include <net/bpf.h>
94
95#ifdef INET
96#include <netinet/in.h>
97#include <netinet/if_ether.h>
98#endif
99
100#include <dev/ath/if_athvar.h>
101#include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
102#include <dev/ath/ath_hal/ah_diagcodes.h>
103
104#include <dev/ath/if_ath_debug.h>
105#include <dev/ath/if_ath_misc.h>
106#include <dev/ath/if_ath_tsf.h>
107#include <dev/ath/if_ath_tx.h>
108#include <dev/ath/if_ath_sysctl.h>
109#include <dev/ath/if_ath_led.h>
110#include <dev/ath/if_ath_keycache.h>
111#include <dev/ath/if_ath_rx.h>
112#include <dev/ath/if_ath_beacon.h>
113#include <dev/ath/if_athdfs.h>
114
115#ifdef ATH_TX99_DIAG
116#include <dev/ath/ath_tx99/ath_tx99.h>
117#endif
118
119#ifdef	ATH_DEBUG_ALQ
120#include <dev/ath/if_ath_alq.h>
121#endif
122
123#ifdef IEEE80211_SUPPORT_TDMA
124#include <dev/ath/if_ath_tdma.h>
125
126static void	ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
127		    u_int32_t bintval);
128static void	ath_tdma_bintvalsetup(struct ath_softc *sc,
129		    const struct ieee80211_tdma_state *tdma);
130#endif /* IEEE80211_SUPPORT_TDMA */
131
132#ifdef IEEE80211_SUPPORT_TDMA
133static void
134ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
135{
136	struct ath_hal *ah = sc->sc_ah;
137	HAL_BEACON_TIMERS bt;
138
139	bt.bt_intval = bintval | HAL_BEACON_ENA;
140	bt.bt_nexttbtt = nexttbtt;
141	bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
142	bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
143	bt.bt_nextatim = nexttbtt+1;
144	/* Enables TBTT, DBA, SWBA timers by default */
145	bt.bt_flags = 0;
146#if 0
147	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
148	    "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n",
149	    __func__,
150	    bt.bt_intval,
151	    bt.bt_intval,
152	    bt.bt_nexttbtt,
153	    bt.bt_nexttbtt,
154	    bt.bt_nextdba,
155	    bt.bt_nextdba,
156	    bt.bt_nextswba,
157	    bt.bt_nextswba,
158	    bt.bt_nextatim,
159	    bt.bt_nextatim);
160#endif
161
162#ifdef	ATH_DEBUG_ALQ
163	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) {
164		struct if_ath_alq_tdma_timer_set t;
165		t.bt_intval = htobe32(bt.bt_intval);
166		t.bt_nexttbtt = htobe32(bt.bt_nexttbtt);
167		t.bt_nextdba = htobe32(bt.bt_nextdba);
168		t.bt_nextswba = htobe32(bt.bt_nextswba);
169		t.bt_nextatim = htobe32(bt.bt_nextatim);
170		t.bt_flags = htobe32(bt.bt_flags);
171		t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep);
172		t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep);
173		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET,
174		    sizeof(t), (char *) &t);
175	}
176#endif
177
178	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
179	    "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n",
180	    __func__,
181	    bt.bt_nexttbtt,
182	    bt.bt_nexttbtt,
183	    (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10),
184	    (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10));
185	ath_hal_beaconsettimers(ah, &bt);
186}
187
188/*
189 * Calculate the beacon interval.  This is periodic in the
190 * superframe for the bss.  We assume each station is configured
191 * identically wrt transmit rate so the guard time we calculate
192 * above will be the same on all stations.  Note we need to
193 * factor in the xmit time because the hardware will schedule
194 * a frame for transmit if the start of the frame is within
195 * the burst time.  When we get hardware that properly kills
196 * frames in the PCU we can reduce/eliminate the guard time.
197 *
198 * Roundup to 1024 is so we have 1 TU buffer in the guard time
199 * to deal with the granularity of the nexttbtt timer.  11n MAC's
200 * with 1us timer granularity should allow us to reduce/eliminate
201 * this.
202 */
203static void
204ath_tdma_bintvalsetup(struct ath_softc *sc,
205	const struct ieee80211_tdma_state *tdma)
206{
207	/* copy from vap state (XXX check all vaps have same value?) */
208	sc->sc_tdmaslotlen = tdma->tdma_slotlen;
209
210	sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
211		tdma->tdma_slotcnt, 1024);
212	sc->sc_tdmabintval >>= 10;		/* TSF -> TU */
213	if (sc->sc_tdmabintval & 1)
214		sc->sc_tdmabintval++;
215
216	if (tdma->tdma_slot == 0) {
217		/*
218		 * Only slot 0 beacons; other slots respond.
219		 */
220		sc->sc_imask |= HAL_INT_SWBA;
221		sc->sc_tdmaswba = 0;		/* beacon immediately */
222	} else {
223		/* XXX all vaps must be slot 0 or slot !0 */
224		sc->sc_imask &= ~HAL_INT_SWBA;
225	}
226}
227
228/*
229 * Max 802.11 overhead.  This assumes no 4-address frames and
230 * the encapsulation done by ieee80211_encap (llc).  We also
231 * include potential crypto overhead.
232 */
233#define	IEEE80211_MAXOVERHEAD \
234	(sizeof(struct ieee80211_qosframe) \
235	 + sizeof(struct llc) \
236	 + IEEE80211_ADDR_LEN \
237	 + IEEE80211_WEP_IVLEN \
238	 + IEEE80211_WEP_KIDLEN \
239	 + IEEE80211_WEP_CRCLEN \
240	 + IEEE80211_WEP_MICLEN \
241	 + IEEE80211_CRC_LEN)
242
243/*
244 * Setup initially for tdma operation.  Start the beacon
245 * timers and enable SWBA if we are slot 0.  Otherwise
246 * we wait for slot 0 to arrive so we can sync up before
247 * starting to transmit.
248 */
249void
250ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
251{
252	struct ath_hal *ah = sc->sc_ah;
253	struct ieee80211com *ic = &sc->sc_ic;
254	const struct ieee80211_txparam *tp;
255	const struct ieee80211_tdma_state *tdma = NULL;
256	int rix;
257
258	if (vap == NULL) {
259		vap = TAILQ_FIRST(&ic->ic_vaps);   /* XXX */
260		if (vap == NULL) {
261			device_printf(sc->sc_dev, "%s: no vaps?\n", __func__);
262			return;
263		}
264	}
265	/* XXX should take a locked ref to iv_bss */
266	tp = vap->iv_bss->ni_txparms;
267	/*
268	 * Calculate the guard time for each slot.  This is the
269	 * time to send a maximal-size frame according to the
270	 * fixed/lowest transmit rate.  Note that the interface
271	 * mtu does not include the 802.11 overhead so we must
272	 * tack that on (ath_hal_computetxtime includes the
273	 * preamble and plcp in its calculation).
274	 */
275	tdma = vap->iv_tdma;
276	if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
277		rix = ath_tx_findrix(sc, tp->ucastrate);
278	else
279		rix = ath_tx_findrix(sc, tp->mcastrate);
280
281	/*
282	 * If the chip supports enforcing TxOP on transmission,
283	 * we can just delete the guard window.  It isn't at all required.
284	 */
285	if (sc->sc_hasenforcetxop) {
286		sc->sc_tdmaguard = 0;
287	} else {
288		/* XXX short preamble assumed */
289		/* XXX non-11n rate assumed */
290		sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
291		    if_getmtu(vap->iv_ifp) + IEEE80211_MAXOVERHEAD, rix, AH_TRUE,
292		    AH_TRUE);
293	}
294
295	ath_hal_intrset(ah, 0);
296
297	ath_beaconq_config(sc);			/* setup h/w beacon q */
298	if (sc->sc_setcca)
299		ath_hal_setcca(ah, AH_FALSE);	/* disable CCA */
300	ath_tdma_bintvalsetup(sc, tdma);	/* calculate beacon interval */
301	ath_tdma_settimers(sc, sc->sc_tdmabintval,
302		sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
303	sc->sc_syncbeacon = 0;
304
305	sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
306	sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
307
308	ath_hal_intrset(ah, sc->sc_imask);
309
310	DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
311	    "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
312	    tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
313	    tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
314	    sc->sc_tdmadbaprep);
315
316#ifdef	ATH_DEBUG_ALQ
317	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) {
318		struct if_ath_alq_tdma_timer_config t;
319
320		t.tdma_slot = htobe32(tdma->tdma_slot);
321		t.tdma_slotlen = htobe32(tdma->tdma_slotlen);
322		t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt);
323		t.tdma_bintval = htobe32(tdma->tdma_bintval);
324		t.tdma_guard = htobe32(sc->sc_tdmaguard);
325		t.tdma_scbintval = htobe32(sc->sc_tdmabintval);
326		t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep);
327
328		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG,
329		    sizeof(t), (char *) &t);
330	}
331#endif	/* ATH_DEBUG_ALQ */
332}
333
334/*
335 * Update tdma operation.  Called from the 802.11 layer
336 * when a beacon is received from the TDMA station operating
337 * in the slot immediately preceding us in the bss.  Use
338 * the rx timestamp for the beacon frame to update our
339 * beacon timers so we follow their schedule.  Note that
340 * by using the rx timestamp we implicitly include the
341 * propagation delay in our schedule.
342 *
343 * XXX TODO: since the changes for the AR5416 and later chips
344 * involved changing the TSF/TU calculations, we need to make
345 * sure that various calculations wrap consistently.
346 *
347 * A lot of the problems stemmed from the calculations wrapping
348 * at 65,535 TU.  Since a lot of the math is still being done in
349 * TU, please audit it to ensure that when the TU values programmed
350 * into the timers wrap at (2^31)-1 TSF, all the various terms
351 * wrap consistently.
352 */
353void
354ath_tdma_update(struct ieee80211_node *ni,
355	const struct ieee80211_tdma_param *tdma, int changed)
356{
357#define	TSF_TO_TU(_h,_l) \
358	((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
359#define	TU_TO_TSF(_tu)	(((u_int64_t)(_tu)) << 10)
360	struct ieee80211vap *vap = ni->ni_vap;
361	struct ieee80211com *ic = ni->ni_ic;
362	struct ath_softc *sc = ic->ic_softc;
363	struct ath_hal *ah = sc->sc_ah;
364	const HAL_RATE_TABLE *rt = sc->sc_currates;
365	u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full;
366	u_int32_t txtime, nextslottu;
367	int32_t tudelta, tsfdelta;
368	const struct ath_rx_status *rs;
369	int rix;
370
371	sc->sc_stats.ast_tdma_update++;
372
373	/*
374	 * Check for and adopt configuration changes.
375	 */
376	if (changed != 0) {
377		const struct ieee80211_tdma_state *ts = vap->iv_tdma;
378
379		ath_tdma_bintvalsetup(sc, ts);
380		if (changed & TDMA_UPDATE_SLOTLEN)
381			ath_wme_update(ic);
382
383		DPRINTF(sc, ATH_DEBUG_TDMA,
384		    "%s: adopt slot %u slotcnt %u slotlen %u us "
385		    "bintval %u TU\n", __func__,
386		    ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
387		    sc->sc_tdmabintval);
388
389		/* XXX right? */
390		ath_hal_intrset(ah, sc->sc_imask);
391		/* NB: beacon timers programmed below */
392	}
393
394	/* extend rx timestamp to 64 bits */
395	rs = sc->sc_lastrs;
396	tsf = ath_hal_gettsf64(ah);
397	rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf);
398	/*
399	 * The rx timestamp is set by the hardware on completing
400	 * reception (at the point where the rx descriptor is DMA'd
401	 * to the host).  To find the start of our next slot we
402	 * must adjust this time by the time required to send
403	 * the packet just received.
404	 */
405	rix = rt->rateCodeToIndex[rs->rs_rate];
406
407	/*
408	 * To calculate the packet duration for legacy rates, we
409	 * only need the rix and preamble.
410	 *
411	 * For 11n non-aggregate frames, we also need the channel
412	 * width and short/long guard interval.
413	 *
414	 * For 11n aggregate frames, the required hacks are a little
415	 * more subtle.  You need to figure out the frame duration
416	 * for each frame, including the delimiters.  However, when
417	 * a frame isn't received successfully, we won't hear it
418	 * (unless you enable reception of CRC errored frames), so
419	 * your duration calculation is going to be off.
420	 *
421	 * However, we can assume that the beacon frames won't be
422	 * transmitted as aggregate frames, so we should be okay.
423	 * Just add a check to ensure that we aren't handed something
424	 * bad.
425	 *
426	 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is
427	 * actually short guard interval. For legacy rates,
428	 * it's short preamble.
429	 */
430	txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen,
431	    rix,
432	    !! (rs->rs_flags & HAL_RX_2040),
433	    (rix & 0x80) ?
434	      (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble,
435	    AH_TRUE);
436	/* NB: << 9 is to cvt to TU and /2 */
437	nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
438
439	/*
440	 * For 802.11n chips: nextslottu needs to be the full TSF space,
441	 * not just 0..65535 TU.
442	 */
443	nextslottu = TSF_TO_TU(nextslot>>32, nextslot);
444	/*
445	 * Retrieve the hardware NextTBTT in usecs
446	 * and calculate the difference between what the
447	 * other station thinks and what we have programmed.  This
448	 * lets us figure how to adjust our timers to match.  The
449	 * adjustments are done by pulling the TSF forward and possibly
450	 * rewriting the beacon timers.
451	 */
452	/*
453	 * The logic here assumes the nexttbtt counter is in TSF
454	 * but the prr-11n NICs are in TU.  The HAL shifts them
455	 * to TSF but there's two important differences:
456	 *
457	 * + The TU->TSF values have 0's for the low 9 bits, and
458	 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for
459	 *   the pre-11n NICs, but not for the 11n NICs.
460	 *
461	 * So for now, just make sure the nexttbtt value we get
462	 * matches the second issue or once nexttbtt exceeds this
463	 * value, tsfdelta ends up becoming very negative and all
464	 * of the adjustments get very messed up.
465	 */
466
467	/*
468	 * We need to track the full nexttbtt rather than having it
469	 * truncated at HAL_BEACON_PERIOD, as programming the
470	 * nexttbtt (and related) registers for the 11n chips is
471	 * actually going to take the full 32 bit space, rather than
472	 * just 0..65535 TU.
473	 */
474	nexttbtt_full = ath_hal_getnexttbtt(ah);
475	nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1));
476	tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt);
477
478	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
479	    "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, "
480	    "nextslottu %d, nextslottume %d\n",
481	    (unsigned long long) rs->rs_tstamp,
482	    (unsigned long long) rstamp,
483	    (unsigned long long) tsf, txtime,
484	    (unsigned long long) nextslot,
485	    nextslottu, TSF_TO_TU(nextslot >> 32, nextslot));
486	DPRINTF(sc, ATH_DEBUG_TDMA,
487	    "  beacon tstamp: %llu (0x%016llx)\n",
488	    (unsigned long long) le64toh(ni->ni_tstamp.tsf),
489	    (unsigned long long) le64toh(ni->ni_tstamp.tsf));
490
491	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
492	    "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n",
493	    (unsigned long long) nexttbtt,
494	    (long long) nexttbtt,
495	    tsfdelta,
496	    TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
497
498	if (tsfdelta < 0) {
499		TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
500		TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
501		tsfdelta = -tsfdelta % 1024;
502		nextslottu++;
503	} else if (tsfdelta > 0) {
504		TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
505		TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
506		tsfdelta = 1024 - (tsfdelta % 1024);
507		nextslottu++;
508	} else {
509		TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
510		TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
511	}
512	tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full);
513
514#ifdef	ATH_DEBUG_ALQ
515	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) {
516		struct if_ath_alq_tdma_beacon_state t;
517		t.rx_tsf = htobe64(rstamp);
518		t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf));
519		t.tsf64 = htobe64(tsf);
520		t.nextslot_tsf = htobe64(nextslot);
521		t.nextslot_tu = htobe32(nextslottu);
522		t.txtime = htobe32(txtime);
523		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE,
524		    sizeof(t), (char *) &t);
525	}
526
527	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) {
528		struct if_ath_alq_tdma_slot_calc t;
529
530		t.nexttbtt = htobe64(nexttbtt_full);
531		t.next_slot = htobe64(nextslot);
532		t.tsfdelta = htobe32(tsfdelta);
533		t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap));
534		t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam));
535
536		if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC,
537		    sizeof(t), (char *) &t);
538	}
539#endif
540
541	/*
542	 * Copy sender's timetstamp into tdma ie so they can
543	 * calculate roundtrip time.  We submit a beacon frame
544	 * below after any timer adjustment.  The frame goes out
545	 * at the next TBTT so the sender can calculate the
546	 * roundtrip by inspecting the tdma ie in our beacon frame.
547	 *
548	 * NB: This tstamp is subtlely preserved when
549	 *     IEEE80211_BEACON_TDMA is marked (e.g. when the
550	 *     slot position changes) because ieee80211_add_tdma
551	 *     skips over the data.
552	 */
553	memcpy(vap->iv_bcn_off.bo_tdma +
554		__offsetof(struct ieee80211_tdma_param, tdma_tstamp),
555		&ni->ni_tstamp.data, 8);
556#if 0
557	DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
558	    "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n",
559	    (unsigned long long) tsf, (unsigned long long) nextslot,
560	    (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta);
561#endif
562	/*
563	 * Adjust the beacon timers only when pulling them forward
564	 * or when going back by less than the beacon interval.
565	 * Negative jumps larger than the beacon interval seem to
566	 * cause the timers to stop and generally cause instability.
567	 * This basically filters out jumps due to missed beacons.
568	 */
569	if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
570		DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
571		    "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n",
572		    __func__,
573		    nextslottu,
574		    sc->sc_tdmabintval);
575		ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
576		sc->sc_stats.ast_tdma_timers++;
577	}
578	if (tsfdelta > 0) {
579		uint64_t tsf;
580
581		/* XXX should just teach ath_hal_adjusttsf() to do this */
582		tsf = ath_hal_gettsf64(ah);
583		ath_hal_settsf64(ah, tsf + tsfdelta);
584		DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
585		    "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n",
586		    __func__,
587		    (unsigned long long) tsf,
588		    tsfdelta);
589
590#ifdef	ATH_DEBUG_ALQ
591		if (if_ath_alq_checkdebug(&sc->sc_alq,
592		    ATH_ALQ_TDMA_TSF_ADJUST)) {
593			struct if_ath_alq_tdma_tsf_adjust t;
594
595			t.tsfdelta = htobe32(tsfdelta);
596			t.tsf64_old = htobe64(tsf);
597			t.tsf64_new = htobe64(tsf + tsfdelta);
598			if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST,
599			    sizeof(t), (char *) &t);
600		}
601#endif	/* ATH_DEBUG_ALQ */
602		sc->sc_stats.ast_tdma_tsf++;
603	}
604	ath_tdma_beacon_send(sc, vap);		/* prepare response */
605#undef TU_TO_TSF
606#undef TSF_TO_TU
607}
608
609/*
610 * Transmit a beacon frame at SWBA.  Dynamic updates
611 * to the frame contents are done as needed.
612 */
613void
614ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
615{
616	struct ath_hal *ah = sc->sc_ah;
617	struct ath_buf *bf;
618	int otherant;
619
620	/*
621	 * Check if the previous beacon has gone out.  If
622	 * not don't try to post another, skip this period
623	 * and wait for the next.  Missed beacons indicate
624	 * a problem and should not occur.  If we miss too
625	 * many consecutive beacons reset the device.
626	 */
627	if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
628		sc->sc_bmisscount++;
629		DPRINTF(sc, ATH_DEBUG_BEACON,
630			"%s: missed %u consecutive beacons\n",
631			__func__, sc->sc_bmisscount);
632		if (sc->sc_bmisscount >= ath_bstuck_threshold)
633			taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
634		return;
635	}
636	if (sc->sc_bmisscount != 0) {
637		DPRINTF(sc, ATH_DEBUG_BEACON,
638			"%s: resume beacon xmit after %u misses\n",
639			__func__, sc->sc_bmisscount);
640		sc->sc_bmisscount = 0;
641	}
642
643	/*
644	 * Check recent per-antenna transmit statistics and flip
645	 * the default antenna if noticeably more frames went out
646	 * on the non-default antenna.
647	 * XXX assumes 2 anntenae
648	 */
649	if (!sc->sc_diversity) {
650		otherant = sc->sc_defant & 1 ? 2 : 1;
651		if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
652			ath_setdefantenna(sc, otherant);
653		sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
654	}
655
656	bf = ath_beacon_generate(sc, vap);
657	/* XXX We don't do cabq traffic, but just for completeness .. */
658	ATH_TXQ_LOCK(sc->sc_cabq);
659	ath_beacon_cabq_start(sc);
660	ATH_TXQ_UNLOCK(sc->sc_cabq);
661
662	if (bf != NULL) {
663		/*
664		 * Stop any current dma and put the new frame on the queue.
665		 * This should never fail since we check above that no frames
666		 * are still pending on the queue.
667		 */
668		if ((! sc->sc_isedma) &&
669		    (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) {
670			DPRINTF(sc, ATH_DEBUG_ANY,
671				"%s: beacon queue %u did not stop?\n",
672				__func__, sc->sc_bhalq);
673			/* NB: the HAL still stops DMA, so proceed */
674		}
675		ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
676		ath_hal_txstart(ah, sc->sc_bhalq);
677
678		sc->sc_stats.ast_be_xmit++;		/* XXX per-vap? */
679
680		/*
681		 * Record local TSF for our last send for use
682		 * in arbitrating slot collisions.
683		 */
684		/* XXX should take a locked ref to iv_bss */
685		vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
686	}
687}
688#endif /* IEEE80211_SUPPORT_TDMA */
689