1/****************************************************************************** 2 * xen.h 3 * 4 * Guest OS interface to Xen. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Copyright (c) 2004, K A Fraser 25 */ 26 27#ifndef __XEN_PUBLIC_XEN_H__ 28#define __XEN_PUBLIC_XEN_H__ 29 30#include "xen-compat.h" 31 32#if defined(__i386__) || defined(__x86_64__) 33#include "arch-x86/xen.h" 34#elif defined(__arm__) || defined (__aarch64__) 35#include "arch-arm.h" 36#else 37#error "Unsupported architecture" 38#endif 39 40#ifndef __ASSEMBLY__ 41/* Guest handles for primitive C types. */ 42DEFINE_XEN_GUEST_HANDLE(char); 43__DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char); 44DEFINE_XEN_GUEST_HANDLE(int); 45__DEFINE_XEN_GUEST_HANDLE(uint, unsigned int); 46#if __XEN_INTERFACE_VERSION__ < 0x00040300 47DEFINE_XEN_GUEST_HANDLE(long); 48__DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long); 49#endif 50DEFINE_XEN_GUEST_HANDLE(void); 51 52DEFINE_XEN_GUEST_HANDLE(uint64_t); 53DEFINE_XEN_GUEST_HANDLE(xen_pfn_t); 54DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); 55 56/* Define a variable length array (depends on compiler). */ 57#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L 58#define XEN_FLEX_ARRAY_DIM 59#elif defined(__GNUC__) 60#define XEN_FLEX_ARRAY_DIM 0 61#else 62#define XEN_FLEX_ARRAY_DIM 1 /* variable size */ 63#endif 64 65/* Turn a plain number into a C unsigned (long (long)) constant. */ 66#define __xen_mk_uint(x) x ## U 67#define __xen_mk_ulong(x) x ## UL 68#ifndef __xen_mk_ullong 69# define __xen_mk_ullong(x) x ## ULL 70#endif 71#define xen_mk_uint(x) __xen_mk_uint(x) 72#define xen_mk_ulong(x) __xen_mk_ulong(x) 73#define xen_mk_ullong(x) __xen_mk_ullong(x) 74 75#else 76 77/* In assembly code we cannot use C numeric constant suffixes. */ 78#define xen_mk_uint(x) x 79#define xen_mk_ulong(x) x 80#define xen_mk_ullong(x) x 81 82#endif 83 84/* 85 * HYPERCALLS 86 */ 87 88/* `incontents 100 hcalls List of hypercalls 89 * ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*() 90 */ 91 92#define __HYPERVISOR_set_trap_table 0 93#define __HYPERVISOR_mmu_update 1 94#define __HYPERVISOR_set_gdt 2 95#define __HYPERVISOR_stack_switch 3 96#define __HYPERVISOR_set_callbacks 4 97#define __HYPERVISOR_fpu_taskswitch 5 98#define __HYPERVISOR_sched_op_compat 6 /* compat since 0x00030101 */ 99#define __HYPERVISOR_platform_op 7 100#define __HYPERVISOR_set_debugreg 8 101#define __HYPERVISOR_get_debugreg 9 102#define __HYPERVISOR_update_descriptor 10 103#define __HYPERVISOR_memory_op 12 104#define __HYPERVISOR_multicall 13 105#define __HYPERVISOR_update_va_mapping 14 106#define __HYPERVISOR_set_timer_op 15 107#define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */ 108#define __HYPERVISOR_xen_version 17 109#define __HYPERVISOR_console_io 18 110#define __HYPERVISOR_physdev_op_compat 19 /* compat since 0x00030202 */ 111#define __HYPERVISOR_grant_table_op 20 112#define __HYPERVISOR_vm_assist 21 113#define __HYPERVISOR_update_va_mapping_otherdomain 22 114#define __HYPERVISOR_iret 23 /* x86 only */ 115#define __HYPERVISOR_vcpu_op 24 116#define __HYPERVISOR_set_segment_base 25 /* x86/64 only */ 117#define __HYPERVISOR_mmuext_op 26 118#define __HYPERVISOR_xsm_op 27 119#define __HYPERVISOR_nmi_op 28 120#define __HYPERVISOR_sched_op 29 121#define __HYPERVISOR_callback_op 30 122#define __HYPERVISOR_xenoprof_op 31 123#define __HYPERVISOR_event_channel_op 32 124#define __HYPERVISOR_physdev_op 33 125#define __HYPERVISOR_hvm_op 34 126#define __HYPERVISOR_sysctl 35 127#define __HYPERVISOR_domctl 36 128#define __HYPERVISOR_kexec_op 37 129#define __HYPERVISOR_tmem_op 38 130#define __HYPERVISOR_argo_op 39 131#define __HYPERVISOR_xenpmu_op 40 132#define __HYPERVISOR_dm_op 41 133#define __HYPERVISOR_hypfs_op 42 134 135/* Architecture-specific hypercall definitions. */ 136#define __HYPERVISOR_arch_0 48 137#define __HYPERVISOR_arch_1 49 138#define __HYPERVISOR_arch_2 50 139#define __HYPERVISOR_arch_3 51 140#define __HYPERVISOR_arch_4 52 141#define __HYPERVISOR_arch_5 53 142#define __HYPERVISOR_arch_6 54 143#define __HYPERVISOR_arch_7 55 144 145/* ` } */ 146 147/* 148 * HYPERCALL COMPATIBILITY. 149 */ 150 151/* New sched_op hypercall introduced in 0x00030101. */ 152#if __XEN_INTERFACE_VERSION__ < 0x00030101 153#undef __HYPERVISOR_sched_op 154#define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat 155#endif 156 157/* New event-channel and physdev hypercalls introduced in 0x00030202. */ 158#if __XEN_INTERFACE_VERSION__ < 0x00030202 159#undef __HYPERVISOR_event_channel_op 160#define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat 161#undef __HYPERVISOR_physdev_op 162#define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat 163#endif 164 165/* New platform_op hypercall introduced in 0x00030204. */ 166#if __XEN_INTERFACE_VERSION__ < 0x00030204 167#define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op 168#endif 169 170/* 171 * VIRTUAL INTERRUPTS 172 * 173 * Virtual interrupts that a guest OS may receive from Xen. 174 * 175 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a 176 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound. 177 * The latter can be allocated only once per guest: they must initially be 178 * allocated to VCPU0 but can subsequently be re-bound. 179 */ 180/* ` enum virq { */ 181#define VIRQ_TIMER 0 /* V. Timebase update, and/or requested timeout. */ 182#define VIRQ_DEBUG 1 /* V. Request guest to dump debug info. */ 183#define VIRQ_CONSOLE 2 /* G. (DOM0) Bytes received on emergency console. */ 184#define VIRQ_DOM_EXC 3 /* G. (DOM0) Exceptional event for some domain. */ 185#define VIRQ_TBUF 4 /* G. (DOM0) Trace buffer has records available. */ 186#define VIRQ_DEBUGGER 6 /* G. (DOM0) A domain has paused for debugging. */ 187#define VIRQ_XENOPROF 7 /* V. XenOprofile interrupt: new sample available */ 188#define VIRQ_CON_RING 8 /* G. (DOM0) Bytes received on console */ 189#define VIRQ_PCPU_STATE 9 /* G. (DOM0) PCPU state changed */ 190#define VIRQ_MEM_EVENT 10 /* G. (DOM0) A memory event has occurred */ 191#define VIRQ_ARGO 11 /* G. Argo interdomain message notification */ 192#define VIRQ_ENOMEM 12 /* G. (DOM0) Low on heap memory */ 193#define VIRQ_XENPMU 13 /* V. PMC interrupt */ 194 195/* Architecture-specific VIRQ definitions. */ 196#define VIRQ_ARCH_0 16 197#define VIRQ_ARCH_1 17 198#define VIRQ_ARCH_2 18 199#define VIRQ_ARCH_3 19 200#define VIRQ_ARCH_4 20 201#define VIRQ_ARCH_5 21 202#define VIRQ_ARCH_6 22 203#define VIRQ_ARCH_7 23 204/* ` } */ 205 206#define NR_VIRQS 24 207 208/* 209 * ` enum neg_errnoval 210 * ` HYPERVISOR_mmu_update(const struct mmu_update reqs[], 211 * ` unsigned count, unsigned *done_out, 212 * ` unsigned foreigndom) 213 * ` 214 * @reqs is an array of mmu_update_t structures ((ptr, val) pairs). 215 * @count is the length of the above array. 216 * @pdone is an output parameter indicating number of completed operations 217 * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this 218 * hypercall invocation. Can be DOMID_SELF. 219 * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced 220 * in this hypercall invocation. The value of this field 221 * (x) encodes the PFD as follows: 222 * x == 0 => PFD == DOMID_SELF 223 * x != 0 => PFD == x - 1 224 * 225 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command. 226 * ------------- 227 * ptr[1:0] == MMU_NORMAL_PT_UPDATE: 228 * Updates an entry in a page table belonging to PFD. If updating an L1 table, 229 * and the new table entry is valid/present, the mapped frame must belong to 230 * FD. If attempting to map an I/O page then the caller assumes the privilege 231 * of the FD. 232 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller. 233 * FD == DOMID_XEN: Map restricted areas of Xen's heap space. 234 * ptr[:2] -- Machine address of the page-table entry to modify. 235 * val -- Value to write. 236 * 237 * There also certain implicit requirements when using this hypercall. The 238 * pages that make up a pagetable must be mapped read-only in the guest. 239 * This prevents uncontrolled guest updates to the pagetable. Xen strictly 240 * enforces this, and will disallow any pagetable update which will end up 241 * mapping pagetable page RW, and will disallow using any writable page as a 242 * pagetable. In practice it means that when constructing a page table for a 243 * process, thread, etc, we MUST be very dilligient in following these rules: 244 * 1). Start with top-level page (PGD or in Xen language: L4). Fill out 245 * the entries. 246 * 2). Keep on going, filling out the upper (PUD or L3), and middle (PMD 247 * or L2). 248 * 3). Start filling out the PTE table (L1) with the PTE entries. Once 249 * done, make sure to set each of those entries to RO (so writeable bit 250 * is unset). Once that has been completed, set the PMD (L2) for this 251 * PTE table as RO. 252 * 4). When completed with all of the PMD (L2) entries, and all of them have 253 * been set to RO, make sure to set RO the PUD (L3). Do the same 254 * operation on PGD (L4) pagetable entries that have a PUD (L3) entry. 255 * 5). Now before you can use those pages (so setting the cr3), you MUST also 256 * pin them so that the hypervisor can verify the entries. This is done 257 * via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame 258 * number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op( 259 * MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be 260 * issued. 261 * For 32-bit guests, the L4 is not used (as there is less pagetables), so 262 * instead use L3. 263 * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE 264 * hypercall. Also if so desired the OS can also try to write to the PTE 265 * and be trapped by the hypervisor (as the PTE entry is RO). 266 * 267 * To deallocate the pages, the operations are the reverse of the steps 268 * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the 269 * pagetable MUST not be in use (meaning that the cr3 is not set to it). 270 * 271 * ptr[1:0] == MMU_MACHPHYS_UPDATE: 272 * Updates an entry in the machine->pseudo-physical mapping table. 273 * ptr[:2] -- Machine address within the frame whose mapping to modify. 274 * The frame must belong to the FD, if one is specified. 275 * val -- Value to write into the mapping entry. 276 * 277 * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD: 278 * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed 279 * with those in @val. 280 * 281 * ptr[1:0] == MMU_PT_UPDATE_NO_TRANSLATE: 282 * As MMU_NORMAL_PT_UPDATE above, but @val is not translated though FD 283 * page tables. 284 * 285 * @val is usually the machine frame number along with some attributes. 286 * The attributes by default follow the architecture defined bits. Meaning that 287 * if this is a X86_64 machine and four page table layout is used, the layout 288 * of val is: 289 * - 63 if set means No execute (NX) 290 * - 46-13 the machine frame number 291 * - 12 available for guest 292 * - 11 available for guest 293 * - 10 available for guest 294 * - 9 available for guest 295 * - 8 global 296 * - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages) 297 * - 6 dirty 298 * - 5 accessed 299 * - 4 page cached disabled 300 * - 3 page write through 301 * - 2 userspace accessible 302 * - 1 writeable 303 * - 0 present 304 * 305 * The one bits that does not fit with the default layout is the PAGE_PSE 306 * also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the 307 * HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB 308 * (or 2MB) instead of using the PAGE_PSE bit. 309 * 310 * The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen 311 * using it as the Page Attribute Table (PAT) bit - for details on it please 312 * refer to Intel SDM 10.12. The PAT allows to set the caching attributes of 313 * pages instead of using MTRRs. 314 * 315 * The PAT MSR is as follows (it is a 64-bit value, each entry is 8 bits): 316 * PAT4 PAT0 317 * +-----+-----+----+----+----+-----+----+----+ 318 * | UC | UC- | WC | WB | UC | UC- | WC | WB | <= Linux 319 * +-----+-----+----+----+----+-----+----+----+ 320 * | UC | UC- | WT | WB | UC | UC- | WT | WB | <= BIOS (default when machine boots) 321 * +-----+-----+----+----+----+-----+----+----+ 322 * | rsv | rsv | WP | WC | UC | UC- | WT | WB | <= Xen 323 * +-----+-----+----+----+----+-----+----+----+ 324 * 325 * The lookup of this index table translates to looking up 326 * Bit 7, Bit 4, and Bit 3 of val entry: 327 * 328 * PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3). 329 * 330 * If all bits are off, then we are using PAT0. If bit 3 turned on, 331 * then we are using PAT1, if bit 3 and bit 4, then PAT2.. 332 * 333 * As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means 334 * that if a guest that follows Linux's PAT setup and would like to set Write 335 * Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is 336 * set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the 337 * caching as: 338 * 339 * WB = none (so PAT0) 340 * WC = PWT (bit 3 on) 341 * UC = PWT | PCD (bit 3 and 4 are on). 342 * 343 * To make it work with Xen, it needs to translate the WC bit as so: 344 * 345 * PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3 346 * 347 * And to translate back it would: 348 * 349 * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7. 350 */ 351#define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */ 352#define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */ 353#define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */ 354#define MMU_PT_UPDATE_NO_TRANSLATE 3 /* checked '*ptr = val'. ptr is MA. */ 355 /* val never translated. */ 356 357/* 358 * MMU EXTENDED OPERATIONS 359 * 360 * ` enum neg_errnoval 361 * ` HYPERVISOR_mmuext_op(mmuext_op_t uops[], 362 * ` unsigned int count, 363 * ` unsigned int *pdone, 364 * ` unsigned int foreigndom) 365 */ 366/* HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures. 367 * A foreigndom (FD) can be specified (or DOMID_SELF for none). 368 * Where the FD has some effect, it is described below. 369 * 370 * cmd: MMUEXT_(UN)PIN_*_TABLE 371 * mfn: Machine frame number to be (un)pinned as a p.t. page. 372 * The frame must belong to the FD, if one is specified. 373 * 374 * cmd: MMUEXT_NEW_BASEPTR 375 * mfn: Machine frame number of new page-table base to install in MMU. 376 * 377 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only] 378 * mfn: Machine frame number of new page-table base to install in MMU 379 * when in user space. 380 * 381 * cmd: MMUEXT_TLB_FLUSH_LOCAL 382 * No additional arguments. Flushes local TLB. 383 * 384 * cmd: MMUEXT_INVLPG_LOCAL 385 * linear_addr: Linear address to be flushed from the local TLB. 386 * 387 * cmd: MMUEXT_TLB_FLUSH_MULTI 388 * vcpumask: Pointer to bitmap of VCPUs to be flushed. 389 * 390 * cmd: MMUEXT_INVLPG_MULTI 391 * linear_addr: Linear address to be flushed. 392 * vcpumask: Pointer to bitmap of VCPUs to be flushed. 393 * 394 * cmd: MMUEXT_TLB_FLUSH_ALL 395 * No additional arguments. Flushes all VCPUs' TLBs. 396 * 397 * cmd: MMUEXT_INVLPG_ALL 398 * linear_addr: Linear address to be flushed from all VCPUs' TLBs. 399 * 400 * cmd: MMUEXT_FLUSH_CACHE 401 * No additional arguments. Writes back and flushes cache contents. 402 * 403 * cmd: MMUEXT_FLUSH_CACHE_GLOBAL 404 * No additional arguments. Writes back and flushes cache contents 405 * on all CPUs in the system. 406 * 407 * cmd: MMUEXT_SET_LDT 408 * linear_addr: Linear address of LDT base (NB. must be page-aligned). 409 * nr_ents: Number of entries in LDT. 410 * 411 * cmd: MMUEXT_CLEAR_PAGE 412 * mfn: Machine frame number to be cleared. 413 * 414 * cmd: MMUEXT_COPY_PAGE 415 * mfn: Machine frame number of the destination page. 416 * src_mfn: Machine frame number of the source page. 417 * 418 * cmd: MMUEXT_[UN]MARK_SUPER 419 * mfn: Machine frame number of head of superpage to be [un]marked. 420 */ 421/* ` enum mmuext_cmd { */ 422#define MMUEXT_PIN_L1_TABLE 0 423#define MMUEXT_PIN_L2_TABLE 1 424#define MMUEXT_PIN_L3_TABLE 2 425#define MMUEXT_PIN_L4_TABLE 3 426#define MMUEXT_UNPIN_TABLE 4 427#define MMUEXT_NEW_BASEPTR 5 428#define MMUEXT_TLB_FLUSH_LOCAL 6 429#define MMUEXT_INVLPG_LOCAL 7 430#define MMUEXT_TLB_FLUSH_MULTI 8 431#define MMUEXT_INVLPG_MULTI 9 432#define MMUEXT_TLB_FLUSH_ALL 10 433#define MMUEXT_INVLPG_ALL 11 434#define MMUEXT_FLUSH_CACHE 12 435#define MMUEXT_SET_LDT 13 436#define MMUEXT_NEW_USER_BASEPTR 15 437#define MMUEXT_CLEAR_PAGE 16 438#define MMUEXT_COPY_PAGE 17 439#define MMUEXT_FLUSH_CACHE_GLOBAL 18 440#define MMUEXT_MARK_SUPER 19 441#define MMUEXT_UNMARK_SUPER 20 442/* ` } */ 443 444#ifndef __ASSEMBLY__ 445struct mmuext_op { 446 unsigned int cmd; /* => enum mmuext_cmd */ 447 union { 448 /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR 449 * CLEAR_PAGE, COPY_PAGE, [UN]MARK_SUPER */ 450 xen_pfn_t mfn; 451 /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */ 452 unsigned long linear_addr; 453 } arg1; 454 union { 455 /* SET_LDT */ 456 unsigned int nr_ents; 457 /* TLB_FLUSH_MULTI, INVLPG_MULTI */ 458#if __XEN_INTERFACE_VERSION__ >= 0x00030205 459 XEN_GUEST_HANDLE(const_void) vcpumask; 460#else 461 const void *vcpumask; 462#endif 463 /* COPY_PAGE */ 464 xen_pfn_t src_mfn; 465 } arg2; 466}; 467typedef struct mmuext_op mmuext_op_t; 468DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); 469#endif 470 471/* 472 * ` enum neg_errnoval 473 * ` HYPERVISOR_update_va_mapping(unsigned long va, u64 val, 474 * ` enum uvm_flags flags) 475 * ` 476 * ` enum neg_errnoval 477 * ` HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, u64 val, 478 * ` enum uvm_flags flags, 479 * ` domid_t domid) 480 * ` 481 * ` @va: The virtual address whose mapping we want to change 482 * ` @val: The new page table entry, must contain a machine address 483 * ` @flags: Control TLB flushes 484 */ 485/* These are passed as 'flags' to update_va_mapping. They can be ORed. */ 486/* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */ 487/* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */ 488/* ` enum uvm_flags { */ 489#define UVMF_NONE (xen_mk_ulong(0)<<0) /* No flushing at all. */ 490#define UVMF_TLB_FLUSH (xen_mk_ulong(1)<<0) /* Flush entire TLB(s). */ 491#define UVMF_INVLPG (xen_mk_ulong(2)<<0) /* Flush only one entry. */ 492#define UVMF_FLUSHTYPE_MASK (xen_mk_ulong(3)<<0) 493#define UVMF_MULTI (xen_mk_ulong(0)<<2) /* Flush subset of TLBs. */ 494#define UVMF_LOCAL (xen_mk_ulong(0)<<2) /* Flush local TLB. */ 495#define UVMF_ALL (xen_mk_ulong(1)<<2) /* Flush all TLBs. */ 496/* ` } */ 497 498/* 499 * ` int 500 * ` HYPERVISOR_console_io(unsigned int cmd, 501 * ` unsigned int count, 502 * ` char buffer[]); 503 * 504 * @cmd: Command (see below) 505 * @count: Size of the buffer to read/write 506 * @buffer: Pointer in the guest memory 507 * 508 * List of commands: 509 * 510 * * CONSOLEIO_write: Write the buffer to Xen console. 511 * For the hardware domain, all the characters in the buffer will 512 * be written. Characters will be printed directly to the console. 513 * For all the other domains, only the printable characters will be 514 * written. Characters may be buffered until a newline (i.e '\n') is 515 * found. 516 * @return 0 on success, otherwise return an error code. 517 * * CONSOLEIO_read: Attempts to read up to @count characters from Xen 518 * console. The maximum buffer size (i.e. @count) supported is 2GB. 519 * @return the number of characters read on success, otherwise return 520 * an error code. 521 */ 522#define CONSOLEIO_write 0 523#define CONSOLEIO_read 1 524 525/* 526 * Commands to HYPERVISOR_vm_assist(). 527 */ 528#define VMASST_CMD_enable 0 529#define VMASST_CMD_disable 1 530 531/* x86/32 guests: simulate full 4GB segment limits. */ 532#define VMASST_TYPE_4gb_segments 0 533 534/* x86/32 guests: trap (vector 15) whenever above vmassist is used. */ 535#define VMASST_TYPE_4gb_segments_notify 1 536 537/* 538 * x86 guests: support writes to bottom-level PTEs. 539 * NB1. Page-directory entries cannot be written. 540 * NB2. Guest must continue to remove all writable mappings of PTEs. 541 */ 542#define VMASST_TYPE_writable_pagetables 2 543 544/* x86/PAE guests: support PDPTs above 4GB. */ 545#define VMASST_TYPE_pae_extended_cr3 3 546 547/* 548 * x86 guests: Sane behaviour for virtual iopl 549 * - virtual iopl updated from do_iret() hypercalls. 550 * - virtual iopl reported in bounce frames. 551 * - guest kernels assumed to be level 0 for the purpose of iopl checks. 552 */ 553#define VMASST_TYPE_architectural_iopl 4 554 555/* 556 * All guests: activate update indicator in vcpu_runstate_info 557 * Enable setting the XEN_RUNSTATE_UPDATE flag in guest memory mapped 558 * vcpu_runstate_info during updates of the runstate information. 559 */ 560#define VMASST_TYPE_runstate_update_flag 5 561 562/* 563 * x86/64 guests: strictly hide M2P from user mode. 564 * This allows the guest to control respective hypervisor behavior: 565 * - when not set, L4 tables get created with the respective slot blank, 566 * and whenever the L4 table gets used as a kernel one the missing 567 * mapping gets inserted, 568 * - when set, L4 tables get created with the respective slot initialized 569 * as before, and whenever the L4 table gets used as a user one the 570 * mapping gets zapped. 571 */ 572#define VMASST_TYPE_m2p_strict 32 573 574#if __XEN_INTERFACE_VERSION__ < 0x00040600 575#define MAX_VMASST_TYPE 3 576#endif 577 578/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */ 579#define DOMID_FIRST_RESERVED xen_mk_uint(0x7FF0) 580 581/* DOMID_SELF is used in certain contexts to refer to oneself. */ 582#define DOMID_SELF xen_mk_uint(0x7FF0) 583 584/* 585 * DOMID_IO is used to restrict page-table updates to mapping I/O memory. 586 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO 587 * is useful to ensure that no mappings to the OS's own heap are accidentally 588 * installed. (e.g., in Linux this could cause havoc as reference counts 589 * aren't adjusted on the I/O-mapping code path). 590 * This only makes sense as HYPERVISOR_mmu_update()'s and 591 * HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument. For 592 * HYPERVISOR_mmu_update() context it can be specified by any calling domain, 593 * otherwise it's only permitted if the caller is privileged. 594 */ 595#define DOMID_IO xen_mk_uint(0x7FF1) 596 597/* 598 * DOMID_XEN is used to allow privileged domains to map restricted parts of 599 * Xen's heap space (e.g., the machine_to_phys table). 600 * This only makes sense as 601 * - HYPERVISOR_mmu_update()'s, HYPERVISOR_mmuext_op()'s, or 602 * HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument, 603 * - with XENMAPSPACE_gmfn_foreign, 604 * and is only permitted if the caller is privileged. 605 */ 606#define DOMID_XEN xen_mk_uint(0x7FF2) 607 608/* 609 * DOMID_COW is used as the owner of sharable pages */ 610#define DOMID_COW xen_mk_uint(0x7FF3) 611 612/* DOMID_INVALID is used to identify pages with unknown owner. */ 613#define DOMID_INVALID xen_mk_uint(0x7FF4) 614 615/* Idle domain. */ 616#define DOMID_IDLE xen_mk_uint(0x7FFF) 617 618/* Mask for valid domain id values */ 619#define DOMID_MASK xen_mk_uint(0x7FFF) 620 621#ifndef __ASSEMBLY__ 622 623typedef uint16_t domid_t; 624 625/* 626 * Send an array of these to HYPERVISOR_mmu_update(). 627 * NB. The fields are natural pointer/address size for this architecture. 628 */ 629struct mmu_update { 630 uint64_t ptr; /* Machine address of PTE. */ 631 uint64_t val; /* New contents of PTE. */ 632}; 633typedef struct mmu_update mmu_update_t; 634DEFINE_XEN_GUEST_HANDLE(mmu_update_t); 635 636/* 637 * ` enum neg_errnoval 638 * ` HYPERVISOR_multicall(multicall_entry_t call_list[], 639 * ` uint32_t nr_calls); 640 * 641 * NB. The fields are logically the natural register size for this 642 * architecture. In cases where xen_ulong_t is larger than this then 643 * any unused bits in the upper portion must be zero. 644 */ 645struct multicall_entry { 646 xen_ulong_t op, result; 647 xen_ulong_t args[6]; 648}; 649typedef struct multicall_entry multicall_entry_t; 650DEFINE_XEN_GUEST_HANDLE(multicall_entry_t); 651 652#if __XEN_INTERFACE_VERSION__ < 0x00040400 653/* 654 * Event channel endpoints per domain (when using the 2-level ABI): 655 * 1024 if a long is 32 bits; 4096 if a long is 64 bits. 656 */ 657#define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS 658#endif 659 660struct vcpu_time_info { 661 /* 662 * Updates to the following values are preceded and followed by an 663 * increment of 'version'. The guest can therefore detect updates by 664 * looking for changes to 'version'. If the least-significant bit of 665 * the version number is set then an update is in progress and the guest 666 * must wait to read a consistent set of values. 667 * The correct way to interact with the version number is similar to 668 * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry. 669 */ 670 uint32_t version; 671 uint32_t pad0; 672 uint64_t tsc_timestamp; /* TSC at last update of time vals. */ 673 uint64_t system_time; /* Time, in nanosecs, since boot. */ 674 /* 675 * Current system time: 676 * system_time + 677 * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32) 678 * CPU frequency (Hz): 679 * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift 680 */ 681 uint32_t tsc_to_system_mul; 682 int8_t tsc_shift; 683#if __XEN_INTERFACE_VERSION__ > 0x040600 684 uint8_t flags; 685 uint8_t pad1[2]; 686#else 687 int8_t pad1[3]; 688#endif 689}; /* 32 bytes */ 690typedef struct vcpu_time_info vcpu_time_info_t; 691 692#define XEN_PVCLOCK_TSC_STABLE_BIT (1 << 0) 693#define XEN_PVCLOCK_GUEST_STOPPED (1 << 1) 694 695struct vcpu_info { 696 /* 697 * 'evtchn_upcall_pending' is written non-zero by Xen to indicate 698 * a pending notification for a particular VCPU. It is then cleared 699 * by the guest OS /before/ checking for pending work, thus avoiding 700 * a set-and-check race. Note that the mask is only accessed by Xen 701 * on the CPU that is currently hosting the VCPU. This means that the 702 * pending and mask flags can be updated by the guest without special 703 * synchronisation (i.e., no need for the x86 LOCK prefix). 704 * This may seem suboptimal because if the pending flag is set by 705 * a different CPU then an IPI may be scheduled even when the mask 706 * is set. However, note: 707 * 1. The task of 'interrupt holdoff' is covered by the per-event- 708 * channel mask bits. A 'noisy' event that is continually being 709 * triggered can be masked at source at this very precise 710 * granularity. 711 * 2. The main purpose of the per-VCPU mask is therefore to restrict 712 * reentrant execution: whether for concurrency control, or to 713 * prevent unbounded stack usage. Whatever the purpose, we expect 714 * that the mask will be asserted only for short periods at a time, 715 * and so the likelihood of a 'spurious' IPI is suitably small. 716 * The mask is read before making an event upcall to the guest: a 717 * non-zero mask therefore guarantees that the VCPU will not receive 718 * an upcall activation. The mask is cleared when the VCPU requests 719 * to block: this avoids wakeup-waiting races. 720 */ 721 uint8_t evtchn_upcall_pending; 722#ifdef XEN_HAVE_PV_UPCALL_MASK 723 uint8_t evtchn_upcall_mask; 724#else /* XEN_HAVE_PV_UPCALL_MASK */ 725 uint8_t pad0; 726#endif /* XEN_HAVE_PV_UPCALL_MASK */ 727 xen_ulong_t evtchn_pending_sel; 728 struct arch_vcpu_info arch; 729 vcpu_time_info_t time; 730}; /* 64 bytes (x86) */ 731#ifndef __XEN__ 732typedef struct vcpu_info vcpu_info_t; 733#endif 734 735/* 736 * `incontents 200 startofday_shared Start-of-day shared data structure 737 * Xen/kernel shared data -- pointer provided in start_info. 738 * 739 * This structure is defined to be both smaller than a page, and the 740 * only data on the shared page, but may vary in actual size even within 741 * compatible Xen versions; guests should not rely on the size 742 * of this structure remaining constant. 743 */ 744struct shared_info { 745 struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS]; 746 747 /* 748 * A domain can create "event channels" on which it can send and receive 749 * asynchronous event notifications. There are three classes of event that 750 * are delivered by this mechanism: 751 * 1. Bi-directional inter- and intra-domain connections. Domains must 752 * arrange out-of-band to set up a connection (usually by allocating 753 * an unbound 'listener' port and avertising that via a storage service 754 * such as xenstore). 755 * 2. Physical interrupts. A domain with suitable hardware-access 756 * privileges can bind an event-channel port to a physical interrupt 757 * source. 758 * 3. Virtual interrupts ('events'). A domain can bind an event-channel 759 * port to a virtual interrupt source, such as the virtual-timer 760 * device or the emergency console. 761 * 762 * Event channels are addressed by a "port index". Each channel is 763 * associated with two bits of information: 764 * 1. PENDING -- notifies the domain that there is a pending notification 765 * to be processed. This bit is cleared by the guest. 766 * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING 767 * will cause an asynchronous upcall to be scheduled. This bit is only 768 * updated by the guest. It is read-only within Xen. If a channel 769 * becomes pending while the channel is masked then the 'edge' is lost 770 * (i.e., when the channel is unmasked, the guest must manually handle 771 * pending notifications as no upcall will be scheduled by Xen). 772 * 773 * To expedite scanning of pending notifications, any 0->1 pending 774 * transition on an unmasked channel causes a corresponding bit in a 775 * per-vcpu selector word to be set. Each bit in the selector covers a 776 * 'C long' in the PENDING bitfield array. 777 */ 778 xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8]; 779 xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8]; 780 781 /* 782 * Wallclock time: updated by control software or RTC emulation. 783 * Guests should base their gettimeofday() syscall on this 784 * wallclock-base value. 785 * The values of wc_sec and wc_nsec are offsets from the Unix epoch 786 * adjusted by the domain's 'time offset' (in seconds) as set either 787 * by XEN_DOMCTL_settimeoffset, or adjusted via a guest write to the 788 * emulated RTC. 789 */ 790 uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */ 791 uint32_t wc_sec; 792 uint32_t wc_nsec; 793#if !defined(__i386__) 794 uint32_t wc_sec_hi; 795# define xen_wc_sec_hi wc_sec_hi 796#elif !defined(__XEN__) && !defined(__XEN_TOOLS__) 797# define xen_wc_sec_hi arch.wc_sec_hi 798#endif 799 800 struct arch_shared_info arch; 801 802}; 803#ifndef __XEN__ 804typedef struct shared_info shared_info_t; 805#endif 806 807/* 808 * `incontents 200 startofday Start-of-day memory layout 809 * 810 * 1. The domain is started within contiguous virtual-memory region. 811 * 2. The contiguous region ends on an aligned 4MB boundary. 812 * 3. This the order of bootstrap elements in the initial virtual region: 813 * a. relocated kernel image 814 * b. initial ram disk [mod_start, mod_len] 815 * (may be omitted) 816 * c. list of allocated page frames [mfn_list, nr_pages] 817 * (unless relocated due to XEN_ELFNOTE_INIT_P2M) 818 * d. start_info_t structure [register rSI (x86)] 819 * in case of dom0 this page contains the console info, too 820 * e. unless dom0: xenstore ring page 821 * f. unless dom0: console ring page 822 * g. bootstrap page tables [pt_base and CR3 (x86)] 823 * h. bootstrap stack [register ESP (x86)] 824 * 4. Bootstrap elements are packed together, but each is 4kB-aligned. 825 * 5. The list of page frames forms a contiguous 'pseudo-physical' memory 826 * layout for the domain. In particular, the bootstrap virtual-memory 827 * region is a 1:1 mapping to the first section of the pseudo-physical map. 828 * 6. All bootstrap elements are mapped read-writable for the guest OS. The 829 * only exception is the bootstrap page table, which is mapped read-only. 830 * 7. There is guaranteed to be at least 512kB padding after the final 831 * bootstrap element. If necessary, the bootstrap virtual region is 832 * extended by an extra 4MB to ensure this. 833 * 834 * Note: Prior to 25833:bb85bbccb1c9. ("x86/32-on-64 adjust Dom0 initial page 835 * table layout") a bug caused the pt_base (3.g above) and cr3 to not point 836 * to the start of the guest page tables (it was offset by two pages). 837 * This only manifested itself on 32-on-64 dom0 kernels and not 32-on-64 domU 838 * or 64-bit kernels of any colour. The page tables for a 32-on-64 dom0 got 839 * allocated in the order: 'first L1','first L2', 'first L3', so the offset 840 * to the page table base is by two pages back. The initial domain if it is 841 * 32-bit and runs under a 64-bit hypervisor should _NOT_ use two of the 842 * pages preceding pt_base and mark them as reserved/unused. 843 */ 844#ifdef XEN_HAVE_PV_GUEST_ENTRY 845struct start_info { 846 /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */ 847 char magic[32]; /* "xen-<version>-<platform>". */ 848 unsigned long nr_pages; /* Total pages allocated to this domain. */ 849 unsigned long shared_info; /* MACHINE address of shared info struct. */ 850 uint32_t flags; /* SIF_xxx flags. */ 851 xen_pfn_t store_mfn; /* MACHINE page number of shared page. */ 852 uint32_t store_evtchn; /* Event channel for store communication. */ 853 union { 854 struct { 855 xen_pfn_t mfn; /* MACHINE page number of console page. */ 856 uint32_t evtchn; /* Event channel for console page. */ 857 } domU; 858 struct { 859 uint32_t info_off; /* Offset of console_info struct. */ 860 uint32_t info_size; /* Size of console_info struct from start.*/ 861 } dom0; 862 } console; 863 /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */ 864 unsigned long pt_base; /* VIRTUAL address of page directory. */ 865 unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */ 866 unsigned long mfn_list; /* VIRTUAL address of page-frame list. */ 867 unsigned long mod_start; /* VIRTUAL address of pre-loaded module */ 868 /* (PFN of pre-loaded module if */ 869 /* SIF_MOD_START_PFN set in flags). */ 870 unsigned long mod_len; /* Size (bytes) of pre-loaded module. */ 871#define MAX_GUEST_CMDLINE 1024 872 int8_t cmd_line[MAX_GUEST_CMDLINE]; 873 /* The pfn range here covers both page table and p->m table frames. */ 874 unsigned long first_p2m_pfn;/* 1st pfn forming initial P->M table. */ 875 unsigned long nr_p2m_frames;/* # of pfns forming initial P->M table. */ 876}; 877typedef struct start_info start_info_t; 878 879/* New console union for dom0 introduced in 0x00030203. */ 880#if __XEN_INTERFACE_VERSION__ < 0x00030203 881#define console_mfn console.domU.mfn 882#define console_evtchn console.domU.evtchn 883#endif 884#endif /* XEN_HAVE_PV_GUEST_ENTRY */ 885 886/* These flags are passed in the 'flags' field of start_info_t. */ 887#define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */ 888#define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */ 889#define SIF_MULTIBOOT_MOD (1<<2) /* Is mod_start a multiboot module? */ 890#define SIF_MOD_START_PFN (1<<3) /* Is mod_start a PFN? */ 891#define SIF_VIRT_P2M_4TOOLS (1<<4) /* Do Xen tools understand a virt. mapped */ 892 /* P->M making the 3 level tree obsolete? */ 893#define SIF_PM_MASK (0xFF<<8) /* reserve 1 byte for xen-pm options */ 894 895/* 896 * A multiboot module is a package containing modules very similar to a 897 * multiboot module array. The only differences are: 898 * - the array of module descriptors is by convention simply at the beginning 899 * of the multiboot module, 900 * - addresses in the module descriptors are based on the beginning of the 901 * multiboot module, 902 * - the number of modules is determined by a termination descriptor that has 903 * mod_start == 0. 904 * 905 * This permits to both build it statically and reference it in a configuration 906 * file, and let the PV guest easily rebase the addresses to virtual addresses 907 * and at the same time count the number of modules. 908 */ 909struct xen_multiboot_mod_list 910{ 911 /* Address of first byte of the module */ 912 uint32_t mod_start; 913 /* Address of last byte of the module (inclusive) */ 914 uint32_t mod_end; 915 /* Address of zero-terminated command line */ 916 uint32_t cmdline; 917 /* Unused, must be zero */ 918 uint32_t pad; 919}; 920/* 921 * `incontents 200 startofday_dom0_console Dom0_console 922 * 923 * The console structure in start_info.console.dom0 924 * 925 * This structure includes a variety of information required to 926 * have a working VGA/VESA console. 927 */ 928typedef struct dom0_vga_console_info { 929 uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */ 930#define XEN_VGATYPE_TEXT_MODE_3 0x03 931#define XEN_VGATYPE_VESA_LFB 0x23 932#define XEN_VGATYPE_EFI_LFB 0x70 933 934 union { 935 struct { 936 /* Font height, in pixels. */ 937 uint16_t font_height; 938 /* Cursor location (column, row). */ 939 uint16_t cursor_x, cursor_y; 940 /* Number of rows and columns (dimensions in characters). */ 941 uint16_t rows, columns; 942 } text_mode_3; 943 944 struct { 945 /* Width and height, in pixels. */ 946 uint16_t width, height; 947 /* Bytes per scan line. */ 948 uint16_t bytes_per_line; 949 /* Bits per pixel. */ 950 uint16_t bits_per_pixel; 951 /* LFB physical address, and size (in units of 64kB). */ 952 uint32_t lfb_base; 953 uint32_t lfb_size; 954 /* RGB mask offsets and sizes, as defined by VBE 1.2+ */ 955 uint8_t red_pos, red_size; 956 uint8_t green_pos, green_size; 957 uint8_t blue_pos, blue_size; 958 uint8_t rsvd_pos, rsvd_size; 959#if __XEN_INTERFACE_VERSION__ >= 0x00030206 960 /* VESA capabilities (offset 0xa, VESA command 0x4f00). */ 961 uint32_t gbl_caps; 962 /* Mode attributes (offset 0x0, VESA command 0x4f01). */ 963 uint16_t mode_attrs; 964 uint16_t pad; 965#endif 966#if __XEN_INTERFACE_VERSION__ >= 0x00040d00 967 /* high 32 bits of lfb_base */ 968 uint32_t ext_lfb_base; 969#endif 970 } vesa_lfb; 971 } u; 972} dom0_vga_console_info_t; 973#define xen_vga_console_info dom0_vga_console_info 974#define xen_vga_console_info_t dom0_vga_console_info_t 975 976typedef uint8_t xen_domain_handle_t[16]; 977 978__DEFINE_XEN_GUEST_HANDLE(uint8, uint8_t); 979__DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t); 980__DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t); 981__DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t); 982 983typedef struct { 984 uint8_t a[16]; 985} xen_uuid_t; 986 987/* 988 * XEN_DEFINE_UUID(0x00112233, 0x4455, 0x6677, 0x8899, 989 * 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff) 990 * will construct UUID 00112233-4455-6677-8899-aabbccddeeff presented as 991 * {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 992 * 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff}; 993 * 994 * NB: This is compatible with Linux kernel and with libuuid, but it is not 995 * compatible with Microsoft, as they use mixed-endian encoding (some 996 * components are little-endian, some are big-endian). 997 */ 998#define XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 999 {{((a) >> 24) & 0xFF, ((a) >> 16) & 0xFF, \ 1000 ((a) >> 8) & 0xFF, ((a) >> 0) & 0xFF, \ 1001 ((b) >> 8) & 0xFF, ((b) >> 0) & 0xFF, \ 1002 ((c) >> 8) & 0xFF, ((c) >> 0) & 0xFF, \ 1003 ((d) >> 8) & 0xFF, ((d) >> 0) & 0xFF, \ 1004 e1, e2, e3, e4, e5, e6}} 1005 1006#if defined(__STDC_VERSION__) ? __STDC_VERSION__ >= 199901L : defined(__GNUC__) 1007#define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 1008 ((xen_uuid_t)XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6)) 1009#else 1010#define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 1011 XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) 1012#endif /* __STDC_VERSION__ / __GNUC__ */ 1013 1014#endif /* !__ASSEMBLY__ */ 1015 1016/* Default definitions for macros used by domctl/sysctl. */ 1017#if defined(__XEN__) || defined(__XEN_TOOLS__) 1018 1019#ifndef int64_aligned_t 1020#define int64_aligned_t int64_t 1021#endif 1022#ifndef uint64_aligned_t 1023#define uint64_aligned_t uint64_t 1024#endif 1025#ifndef XEN_GUEST_HANDLE_64 1026#define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name) 1027#endif 1028 1029#ifndef __ASSEMBLY__ 1030struct xenctl_bitmap { 1031 XEN_GUEST_HANDLE_64(uint8) bitmap; 1032 uint32_t nr_bits; 1033}; 1034typedef struct xenctl_bitmap xenctl_bitmap_t; 1035#endif 1036 1037#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ 1038 1039#endif /* __XEN_PUBLIC_XEN_H__ */ 1040 1041/* 1042 * Local variables: 1043 * mode: C 1044 * c-file-style: "BSD" 1045 * c-basic-offset: 4 1046 * tab-width: 4 1047 * indent-tabs-mode: nil 1048 * End: 1049 */ 1050