1/* SPDX-License-Identifier: ISC */
2/*
3 * Copyright (C) 2022 MediaTek Inc.
4 */
5
6#ifndef __MT7996_MCU_H
7#define __MT7996_MCU_H
8
9#include "../mt76_connac_mcu.h"
10
11struct mt7996_mcu_rxd {
12	__le32 rxd[8];
13
14	__le16 len;
15	__le16 pkt_type_id;
16
17	u8 eid;
18	u8 seq;
19	u8 option;
20	u8 __rsv;
21
22	u8 ext_eid;
23	u8 __rsv1[2];
24	u8 s2d_index;
25};
26
27struct mt7996_mcu_uni_event {
28	u8 cid;
29	u8 __rsv[3];
30	__le32 status; /* 0: success, others: fail */
31} __packed;
32
33struct mt7996_mcu_csa_notify {
34	struct mt7996_mcu_rxd rxd;
35
36	u8 omac_idx;
37	u8 csa_count;
38	u8 band_idx;
39	u8 rsv;
40} __packed;
41
42struct mt7996_mcu_rdd_report {
43	struct mt7996_mcu_rxd rxd;
44
45	u8 __rsv1[4];
46
47	__le16 tag;
48	__le16 len;
49
50	u8 band_idx;
51	u8 long_detected;
52	u8 constant_prf_detected;
53	u8 staggered_prf_detected;
54	u8 radar_type_idx;
55	u8 periodic_pulse_num;
56	u8 long_pulse_num;
57	u8 hw_pulse_num;
58
59	u8 out_lpn;
60	u8 out_spn;
61	u8 out_crpn;
62	u8 out_crpw;
63	u8 out_crbn;
64	u8 out_stgpn;
65	u8 out_stgpw;
66
67	u8 __rsv2;
68
69	__le32 out_pri_const;
70	__le32 out_pri_stg[3];
71	__le32 out_pri_stg_dmin;
72
73	struct {
74		__le32 start;
75		__le16 pulse_width;
76		__le16 pulse_power;
77		u8 mdrdy_flag;
78		u8 rsv[3];
79	} long_pulse[32];
80
81	struct {
82		__le32 start;
83		__le16 pulse_width;
84		__le16 pulse_power;
85		u8 mdrdy_flag;
86		u8 rsv[3];
87	} periodic_pulse[32];
88
89	struct {
90		__le32 start;
91		__le16 pulse_width;
92		__le16 pulse_power;
93		u8 sc_pass;
94		u8 sw_reset;
95		u8 mdrdy_flag;
96		u8 tx_active;
97	} hw_pulse[32];
98} __packed;
99
100struct mt7996_mcu_background_chain_ctrl {
101	u8 _rsv[4];
102
103	__le16 tag;
104	__le16 len;
105
106	u8 chan;		/* primary channel */
107	u8 central_chan;	/* central channel */
108	u8 bw;
109	u8 tx_stream;
110	u8 rx_stream;
111
112	u8 monitor_chan;	/* monitor channel */
113	u8 monitor_central_chan;/* monitor central channel */
114	u8 monitor_bw;
115	u8 monitor_tx_stream;
116	u8 monitor_rx_stream;
117
118	u8 scan_mode;		/* 0: ScanStop
119				 * 1: ScanStart
120				 * 2: ScanRunning
121				 */
122	u8 band_idx;		/* DBDC */
123	u8 monitor_scan_type;
124	u8 band;		/* 0: 2.4GHz, 1: 5GHz */
125	u8 rsv[2];
126} __packed;
127
128struct mt7996_mcu_eeprom {
129	u8 _rsv[4];
130
131	__le16 tag;
132	__le16 len;
133	u8 buffer_mode;
134	u8 format;
135	__le16 buf_len;
136} __packed;
137
138struct mt7996_mcu_phy_rx_info {
139	u8 category;
140	u8 rate;
141	u8 mode;
142	u8 nsts;
143	u8 gi;
144	u8 coding;
145	u8 stbc;
146	u8 bw;
147};
148
149struct mt7996_mcu_mib {
150	__le16 tag;
151	__le16 len;
152	__le32 offs;
153	__le64 data;
154} __packed;
155
156enum mt7996_chan_mib_offs {
157	UNI_MIB_OBSS_AIRTIME = 26,
158	UNI_MIB_NON_WIFI_TIME = 27,
159	UNI_MIB_TX_TIME = 28,
160	UNI_MIB_RX_TIME = 29
161};
162
163struct edca {
164	__le16 tag;
165	__le16 len;
166
167	u8 queue;
168	u8 set;
169	u8 cw_min;
170	u8 cw_max;
171	__le16 txop;
172	u8 aifs;
173	u8 __rsv;
174};
175
176#define MCU_PQ_ID(p, q)			(((p) << 15) | ((q) << 10))
177#define MCU_PKT_ID			0xa0
178
179enum {
180	MCU_FW_LOG_WM,
181	MCU_FW_LOG_WA,
182	MCU_FW_LOG_TO_HOST,
183	MCU_FW_LOG_RELAY = 16
184};
185
186enum {
187	MCU_TWT_AGRT_ADD,
188	MCU_TWT_AGRT_MODIFY,
189	MCU_TWT_AGRT_DELETE,
190	MCU_TWT_AGRT_TEARDOWN,
191	MCU_TWT_AGRT_GET_TSF,
192};
193
194enum {
195	MCU_WA_PARAM_CMD_QUERY,
196	MCU_WA_PARAM_CMD_SET,
197	MCU_WA_PARAM_CMD_CAPABILITY,
198	MCU_WA_PARAM_CMD_DEBUG,
199};
200
201enum {
202	MCU_WA_PARAM_PDMA_RX = 0x04,
203	MCU_WA_PARAM_CPU_UTIL = 0x0b,
204	MCU_WA_PARAM_RED = 0x0e,
205	MCU_WA_PARAM_HW_PATH_HIF_VER = 0x2f,
206};
207
208enum mcu_mmps_mode {
209	MCU_MMPS_STATIC,
210	MCU_MMPS_DYNAMIC,
211	MCU_MMPS_RSV,
212	MCU_MMPS_DISABLE,
213};
214
215struct bss_rate_tlv {
216	__le16 tag;
217	__le16 len;
218	u8 __rsv1[4];
219	__le16 bc_trans;
220	__le16 mc_trans;
221	u8 short_preamble;
222	u8 bc_fixed_rate;
223	u8 mc_fixed_rate;
224	u8 __rsv2[1];
225} __packed;
226
227struct bss_ra_tlv {
228	__le16 tag;
229	__le16 len;
230	u8 short_preamble;
231	u8 force_sgi;
232	u8 force_gf;
233	u8 ht_mode;
234	u8 se_off;
235	u8 antenna_idx;
236	__le16 max_phyrate;
237	u8 force_tx_streams;
238	u8 __rsv[3];
239} __packed;
240
241struct bss_rlm_tlv {
242	__le16 tag;
243	__le16 len;
244	u8 control_channel;
245	u8 center_chan;
246	u8 center_chan2;
247	u8 bw;
248	u8 tx_streams;
249	u8 rx_streams;
250	u8 ht_op_info;
251	u8 sco;
252	u8 band;
253	u8 __rsv[3];
254} __packed;
255
256struct bss_color_tlv {
257	__le16 tag;
258	__le16 len;
259	u8 enable;
260	u8 color;
261	u8 rsv[2];
262} __packed;
263
264struct bss_inband_discovery_tlv {
265	__le16 tag;
266	__le16 len;
267	u8 tx_type;
268	u8 tx_mode;
269	u8 tx_interval;
270	u8 enable;
271	__le16 wcid;
272	__le16 prob_rsp_len;
273#define MAX_INBAND_FRAME_SIZE 512
274	u8 pkt[MAX_INBAND_FRAME_SIZE];
275} __packed;
276
277struct bss_bcn_content_tlv {
278	__le16 tag;
279	__le16 len;
280	__le16 tim_ie_pos;
281	__le16 csa_ie_pos;
282	__le16 bcc_ie_pos;
283	u8 enable;
284	u8 type;
285	__le16 pkt_len;
286#define MAX_BEACON_SIZE 512
287	u8 pkt[MAX_BEACON_SIZE];
288} __packed;
289
290struct bss_bcn_cntdwn_tlv {
291	__le16 tag;
292	__le16 len;
293	u8 cnt;
294	u8 rsv[3];
295} __packed;
296
297struct bss_bcn_mbss_tlv {
298	__le16 tag;
299	__le16 len;
300	__le32 bitmap;
301#define MAX_BEACON_NUM	32
302	__le16 offset[MAX_BEACON_NUM];
303} __packed __aligned(4);
304
305struct bss_txcmd_tlv {
306	__le16 tag;
307	__le16 len;
308	u8 txcmd_mode;
309	u8 __rsv[3];
310} __packed;
311
312struct bss_sec_tlv {
313	__le16 tag;
314	__le16 len;
315	u8 __rsv1[2];
316	u8 cipher;
317	u8 __rsv2[1];
318} __packed;
319
320struct bss_ifs_time_tlv {
321	__le16 tag;
322	__le16 len;
323	u8 slot_valid;
324	u8 sifs_valid;
325	u8 rifs_valid;
326	u8 eifs_valid;
327	__le16 slot_time;
328	__le16 sifs_time;
329	__le16 rifs_time;
330	__le16 eifs_time;
331	u8 eifs_cck_valid;
332	u8 rsv;
333	__le16 eifs_cck_time;
334} __packed;
335
336struct bss_power_save {
337	__le16 tag;
338	__le16 len;
339	u8 profile;
340	u8 _rsv[3];
341} __packed;
342
343struct bss_mld_tlv {
344	__le16 tag;
345	__le16 len;
346	u8 group_mld_id;
347	u8 own_mld_id;
348	u8 mac_addr[ETH_ALEN];
349	u8 remap_idx;
350	u8 __rsv[3];
351} __packed;
352
353struct sta_rec_ba_uni {
354	__le16 tag;
355	__le16 len;
356	u8 tid;
357	u8 ba_type;
358	u8 amsdu;
359	u8 ba_en;
360	__le16 ssn;
361	__le16 winsize;
362	u8 ba_rdd_rro;
363	u8 __rsv[3];
364} __packed;
365
366struct sta_rec_eht {
367	__le16 tag;
368	__le16 len;
369	u8 tid_bitmap;
370	u8 _rsv;
371	__le16 mac_cap;
372	__le64 phy_cap;
373	__le64 phy_cap_ext;
374	u8 mcs_map_bw20[4];
375	u8 mcs_map_bw80[3];
376	u8 mcs_map_bw160[3];
377	u8 mcs_map_bw320[3];
378	u8 _rsv2[3];
379} __packed;
380
381struct sec_key_uni {
382	__le16 wlan_idx;
383	u8 mgmt_prot;
384	u8 cipher_id;
385	u8 cipher_len;
386	u8 key_id;
387	u8 key_len;
388	u8 need_resp;
389	u8 key[32];
390} __packed;
391
392struct sta_rec_sec_uni {
393	__le16 tag;
394	__le16 len;
395	u8 add;
396	u8 n_cipher;
397	u8 rsv[2];
398
399	struct sec_key_uni key[2];
400} __packed;
401
402struct sta_rec_hdrt {
403	__le16 tag;
404	__le16 len;
405	u8 hdrt_mode;
406	u8 rsv[3];
407} __packed;
408
409struct sta_rec_hdr_trans {
410	__le16 tag;
411	__le16 len;
412	u8 from_ds;
413	u8 to_ds;
414	u8 dis_rx_hdr_tran;
415	u8 mesh;
416} __packed;
417
418struct hdr_trans_en {
419	__le16 tag;
420	__le16 len;
421	u8 enable;
422	u8 check_bssid;
423	u8 mode;
424	u8 __rsv;
425} __packed;
426
427struct hdr_trans_vlan {
428	__le16 tag;
429	__le16 len;
430	u8 insert_vlan;
431	u8 remove_vlan;
432	u8 tid;
433	u8 __rsv;
434} __packed;
435
436struct hdr_trans_blacklist {
437	__le16 tag;
438	__le16 len;
439	u8 idx;
440	u8 enable;
441	__le16 type;
442} __packed;
443
444struct uni_header {
445	u8 __rsv[4];
446} __packed;
447
448struct vow_rx_airtime {
449	__le16 tag;
450	__le16 len;
451
452	u8 enable;
453	u8 band;
454	u8 __rsv[2];
455} __packed;
456
457struct bf_sounding_on {
458	__le16 tag;
459	__le16 len;
460
461	u8 snd_mode;
462	u8 sta_num;
463	u8 __rsv[2];
464	__le16 wlan_id[4];
465	__le32 snd_period;
466} __packed;
467
468struct bf_hw_en_status_update {
469	__le16 tag;
470	__le16 len;
471
472	bool ebf;
473	bool ibf;
474	u8 __rsv[2];
475} __packed;
476
477struct bf_mod_en_ctrl {
478	__le16 tag;
479	__le16 len;
480
481	u8 bf_num;
482	u8 bf_bitmap;
483	u8 bf_sel[8];
484	u8 __rsv[2];
485} __packed;
486
487union bf_tag_tlv {
488	struct bf_sounding_on bf_snd;
489	struct bf_hw_en_status_update bf_hw_en;
490	struct bf_mod_en_ctrl bf_mod_en;
491};
492
493struct ra_rate {
494	__le16 wlan_idx;
495	u8 mode;
496	u8 stbc;
497	__le16 gi;
498	u8 bw;
499	u8 ldpc;
500	u8 mcs;
501	u8 nss;
502	__le16 ltf;
503	u8 spe;
504	u8 preamble;
505	u8 __rsv[2];
506} __packed;
507
508struct ra_fixed_rate {
509	__le16 tag;
510	__le16 len;
511
512	__le16 version;
513	struct ra_rate rate;
514} __packed;
515
516enum {
517	UNI_RA_FIXED_RATE = 0xf,
518};
519
520#define MT7996_HDR_TRANS_MAX_SIZE	(sizeof(struct hdr_trans_en) +	 \
521					 sizeof(struct hdr_trans_vlan) + \
522					 sizeof(struct hdr_trans_blacklist))
523
524enum {
525	UNI_HDR_TRANS_EN,
526	UNI_HDR_TRANS_VLAN,
527	UNI_HDR_TRANS_BLACKLIST,
528};
529
530enum {
531	RATE_PARAM_FIXED = 3,
532	RATE_PARAM_MMPS_UPDATE = 5,
533	RATE_PARAM_FIXED_HE_LTF = 7,
534	RATE_PARAM_FIXED_MCS,
535	RATE_PARAM_FIXED_GI = 11,
536	RATE_PARAM_AUTO = 20,
537};
538
539enum {
540	BF_SOUNDING_ON = 1,
541	BF_HW_EN_UPDATE = 17,
542	BF_MOD_EN_CTRL = 20,
543};
544
545enum {
546	CMD_BAND_NONE,
547	CMD_BAND_24G,
548	CMD_BAND_5G,
549	CMD_BAND_6G,
550};
551
552struct bss_req_hdr {
553	u8 bss_idx;
554	u8 __rsv[3];
555} __packed;
556
557enum {
558	UNI_CHANNEL_SWITCH,
559	UNI_CHANNEL_RX_PATH,
560};
561
562#define MT7996_BSS_UPDATE_MAX_SIZE	(sizeof(struct bss_req_hdr) +		\
563					 sizeof(struct mt76_connac_bss_basic_tlv) +	\
564					 sizeof(struct bss_rlm_tlv) +		\
565					 sizeof(struct bss_ra_tlv) +		\
566					 sizeof(struct bss_info_uni_he) +	\
567					 sizeof(struct bss_rate_tlv) +		\
568					 sizeof(struct bss_txcmd_tlv) +		\
569					 sizeof(struct bss_power_save) +	\
570					 sizeof(struct bss_sec_tlv) +		\
571					 sizeof(struct bss_ifs_time_tlv) +	\
572					 sizeof(struct bss_mld_tlv))
573
574#define MT7996_STA_UPDATE_MAX_SIZE	(sizeof(struct sta_req_hdr) +		\
575					 sizeof(struct sta_rec_basic) +		\
576					 sizeof(struct sta_rec_bf) +		\
577					 sizeof(struct sta_rec_ht) +		\
578					 sizeof(struct sta_rec_he_v2) +		\
579					 sizeof(struct sta_rec_ba_uni) +	\
580					 sizeof(struct sta_rec_vht) +		\
581					 sizeof(struct sta_rec_uapsd) + 	\
582					 sizeof(struct sta_rec_amsdu) +		\
583					 sizeof(struct sta_rec_bfee) +		\
584					 sizeof(struct sta_rec_phy) +		\
585					 sizeof(struct sta_rec_ra) +		\
586					 sizeof(struct sta_rec_sec) +		\
587					 sizeof(struct sta_rec_ra_fixed) +	\
588					 sizeof(struct sta_rec_he_6g_capa) +	\
589					 sizeof(struct sta_rec_eht) +		\
590					 sizeof(struct sta_rec_hdrt) +		\
591					 sizeof(struct sta_rec_hdr_trans) +	\
592					 sizeof(struct tlv))
593
594#define MT7996_BEACON_UPDATE_SIZE	(sizeof(struct bss_req_hdr) +		\
595					 sizeof(struct bss_bcn_content_tlv) +	\
596					 sizeof(struct bss_bcn_cntdwn_tlv) +	\
597					 sizeof(struct bss_bcn_mbss_tlv))
598
599#define MT7996_INBAND_FRAME_SIZE	(sizeof(struct bss_req_hdr) +		\
600					 sizeof(struct bss_inband_discovery_tlv))
601
602enum {
603	UNI_BAND_CONFIG_RADIO_ENABLE,
604	UNI_BAND_CONFIG_RTS_THRESHOLD = 0x08,
605};
606
607enum {
608	UNI_WSYS_CONFIG_FW_LOG_CTRL,
609	UNI_WSYS_CONFIG_FW_DBG_CTRL,
610};
611
612enum {
613	UNI_RDD_CTRL_PARM,
614	UNI_RDD_CTRL_SET_TH = 0x3,
615};
616
617enum {
618	UNI_EFUSE_ACCESS = 1,
619	UNI_EFUSE_BUFFER_MODE,
620	UNI_EFUSE_FREE_BLOCK,
621	UNI_EFUSE_BUFFER_RD,
622};
623
624enum {
625	UNI_VOW_DRR_CTRL,
626	UNI_VOW_RX_AT_AIRTIME_EN = 0x0b,
627	UNI_VOW_RX_AT_AIRTIME_CLR_EN = 0x0e,
628};
629
630enum {
631	UNI_CMD_MIB_DATA,
632};
633
634enum {
635	UNI_POWER_OFF,
636};
637
638enum {
639	UNI_CMD_TWT_ARGT_UPDATE = 0x0,
640	UNI_CMD_TWT_MGMT_OFFLOAD,
641};
642
643enum {
644	UNI_RRO_DEL_ENTRY = 0x1,
645	UNI_RRO_SET_PLATFORM_TYPE,
646	UNI_RRO_GET_BA_SESSION_TABLE,
647	UNI_RRO_SET_BYPASS_MODE,
648	UNI_RRO_SET_TXFREE_PATH,
649};
650
651enum{
652	UNI_CMD_SR_ENABLE = 0x1,
653	UNI_CMD_SR_ENABLE_SD,
654	UNI_CMD_SR_ENABLE_MODE,
655	UNI_CMD_SR_ENABLE_DPD = 0x12,
656	UNI_CMD_SR_ENABLE_TX,
657	UNI_CMD_SR_SET_SRG_BITMAP = 0x80,
658	UNI_CMD_SR_SET_PARAM = 0xc1,
659	UNI_CMD_SR_SET_SIGA = 0xd0,
660};
661
662enum {
663	UNI_CMD_ACCESS_REG_BASIC = 0x0,
664	UNI_CMD_ACCESS_RF_REG_BASIC,
665};
666
667enum {
668	UNI_CMD_SER_QUERY,
669	/* recovery */
670	UNI_CMD_SER_SET_RECOVER_L1,
671	UNI_CMD_SER_SET_RECOVER_L2,
672	UNI_CMD_SER_SET_RECOVER_L3_RX_ABORT,
673	UNI_CMD_SER_SET_RECOVER_L3_TX_ABORT,
674	UNI_CMD_SER_SET_RECOVER_L3_TX_DISABLE,
675	UNI_CMD_SER_SET_RECOVER_L3_BF,
676	UNI_CMD_SER_SET_RECOVER_L4_MDP,
677	UNI_CMD_SER_SET_RECOVER_FULL,
678	UNI_CMD_SER_SET_SYSTEM_ASSERT,
679	/* action */
680	UNI_CMD_SER_ENABLE = 1,
681	UNI_CMD_SER_SET,
682	UNI_CMD_SER_TRIGGER
683};
684
685enum {
686	MT7996_SEC_MODE_PLAIN,
687	MT7996_SEC_MODE_AES,
688	MT7996_SEC_MODE_SCRAMBLE,
689	MT7996_SEC_MODE_MAX,
690};
691
692#define MT7996_PATCH_SEC		GENMASK(31, 24)
693#define MT7996_PATCH_SCRAMBLE_KEY	GENMASK(15, 8)
694#define MT7996_PATCH_AES_KEY		GENMASK(7, 0)
695
696#define MT7996_SEC_ENCRYPT		BIT(0)
697#define MT7996_SEC_KEY_IDX		GENMASK(2, 1)
698#define MT7996_SEC_IV			BIT(3)
699
700#endif
701