1// SPDX-License-Identifier: ISC 2/* Copyright (C) 2020 MediaTek Inc. */ 3 4#include <linux/devcoredump.h> 5#include <linux/etherdevice.h> 6#include <linux/timekeeping.h> 7#if defined(__FreeBSD__) 8#include <linux/delay.h> 9#endif 10#include "mt7921.h" 11#include "../dma.h" 12#include "../mt76_connac2_mac.h" 13#include "mcu.h" 14 15#define MT_WTBL_TXRX_CAP_RATE_OFFSET 7 16#define MT_WTBL_TXRX_RATE_G2_HE 24 17#define MT_WTBL_TXRX_RATE_G2 12 18 19#define MT_WTBL_AC0_CTT_OFFSET 20 20 21bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask) 22{ 23 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, 24 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); 25 26 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 27 0, 5000); 28} 29 30static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset) 31{ 32 return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4; 33} 34 35static void mt7921_mac_sta_poll(struct mt792x_dev *dev) 36{ 37 static const u8 ac_to_tid[] = { 38 [IEEE80211_AC_BE] = 0, 39 [IEEE80211_AC_BK] = 1, 40 [IEEE80211_AC_VI] = 4, 41 [IEEE80211_AC_VO] = 6 42 }; 43 struct ieee80211_sta *sta; 44 struct mt792x_sta *msta; 45 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS]; 46#if defined(__linux__) 47 LIST_HEAD(sta_poll_list); 48#elif defined(__FreeBSD__) 49 LINUX_LIST_HEAD(sta_poll_list); 50#endif 51 struct rate_info *rate; 52 s8 rssi[4]; 53 int i; 54 55 spin_lock_bh(&dev->mt76.sta_poll_lock); 56 list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list); 57 spin_unlock_bh(&dev->mt76.sta_poll_lock); 58 59 while (true) { 60 bool clear = false; 61 u32 addr, val; 62 u16 idx; 63 u8 bw; 64 65 spin_lock_bh(&dev->mt76.sta_poll_lock); 66 if (list_empty(&sta_poll_list)) { 67 spin_unlock_bh(&dev->mt76.sta_poll_lock); 68 break; 69 } 70 msta = list_first_entry(&sta_poll_list, 71 struct mt792x_sta, wcid.poll_list); 72 list_del_init(&msta->wcid.poll_list); 73 spin_unlock_bh(&dev->mt76.sta_poll_lock); 74 75 idx = msta->wcid.idx; 76 addr = mt7921_mac_wtbl_lmac_addr(idx, MT_WTBL_AC0_CTT_OFFSET); 77 78 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 79 u32 tx_last = msta->airtime_ac[i]; 80 u32 rx_last = msta->airtime_ac[i + 4]; 81 82 msta->airtime_ac[i] = mt76_rr(dev, addr); 83 msta->airtime_ac[i + 4] = mt76_rr(dev, addr + 4); 84 85 tx_time[i] = msta->airtime_ac[i] - tx_last; 86 rx_time[i] = msta->airtime_ac[i + 4] - rx_last; 87 88 if ((tx_last | rx_last) & BIT(30)) 89 clear = true; 90 91 addr += 8; 92 } 93 94 if (clear) { 95 mt7921_mac_wtbl_update(dev, idx, 96 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 97 memset(msta->airtime_ac, 0, sizeof(msta->airtime_ac)); 98 } 99 100 if (!msta->wcid.sta) 101 continue; 102 103 sta = container_of((void *)msta, struct ieee80211_sta, 104 drv_priv); 105 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 106 u8 q = mt76_connac_lmac_mapping(i); 107 u32 tx_cur = tx_time[q]; 108 u32 rx_cur = rx_time[q]; 109 u8 tid = ac_to_tid[i]; 110 111 if (!tx_cur && !rx_cur) 112 continue; 113 114 ieee80211_sta_register_airtime(sta, tid, tx_cur, 115 rx_cur); 116 } 117 118 /* We don't support reading GI info from txs packets. 119 * For accurate tx status reporting and AQL improvement, 120 * we need to make sure that flags match so polling GI 121 * from per-sta counters directly. 122 */ 123 rate = &msta->wcid.rate; 124 addr = mt7921_mac_wtbl_lmac_addr(idx, 125 MT_WTBL_TXRX_CAP_RATE_OFFSET); 126 val = mt76_rr(dev, addr); 127 128 switch (rate->bw) { 129 case RATE_INFO_BW_160: 130 bw = IEEE80211_STA_RX_BW_160; 131 break; 132 case RATE_INFO_BW_80: 133 bw = IEEE80211_STA_RX_BW_80; 134 break; 135 case RATE_INFO_BW_40: 136 bw = IEEE80211_STA_RX_BW_40; 137 break; 138 default: 139 bw = IEEE80211_STA_RX_BW_20; 140 break; 141 } 142 143 if (rate->flags & RATE_INFO_FLAGS_HE_MCS) { 144 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw; 145 146 rate->he_gi = (val & (0x3 << offs)) >> offs; 147 } else if (rate->flags & 148 (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) { 149 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw)) 150 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 151 else 152 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 153 } 154 155 /* get signal strength of resp frames (CTS/BA/ACK) */ 156 addr = mt7921_mac_wtbl_lmac_addr(idx, 30); 157 val = mt76_rr(dev, addr); 158 159 rssi[0] = to_rssi(GENMASK(7, 0), val); 160 rssi[1] = to_rssi(GENMASK(15, 8), val); 161 rssi[2] = to_rssi(GENMASK(23, 16), val); 162 rssi[3] = to_rssi(GENMASK(31, 14), val); 163 164 msta->ack_signal = 165 mt76_rx_signal(msta->vif->phy->mt76->antenna_mask, rssi); 166 167 ewma_avg_signal_add(&msta->avg_ack_signal, -msta->ack_signal); 168 } 169} 170 171static int 172mt7921_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb) 173{ 174 u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM; 175 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 176 bool hdr_trans, unicast, insert_ccmp_hdr = false; 177 u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info; 178 u16 hdr_gap; 179 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data; 180 struct mt76_phy *mphy = &dev->mt76.phy; 181 struct mt792x_phy *phy = &dev->phy; 182 struct ieee80211_supported_band *sband; 183 u32 csum_status = *(u32 *)skb->cb; 184 u32 rxd0 = le32_to_cpu(rxd[0]); 185 u32 rxd1 = le32_to_cpu(rxd[1]); 186 u32 rxd2 = le32_to_cpu(rxd[2]); 187 u32 rxd3 = le32_to_cpu(rxd[3]); 188 u32 rxd4 = le32_to_cpu(rxd[4]); 189 struct mt792x_sta *msta = NULL; 190 u16 seq_ctrl = 0; 191 __le16 fc = 0; 192 u8 mode = 0; 193 int i, idx; 194 195 memset(status, 0, sizeof(*status)); 196 197 if (rxd1 & MT_RXD1_NORMAL_BAND_IDX) 198 return -EINVAL; 199 200 if (!test_bit(MT76_STATE_RUNNING, &mphy->state)) 201 return -EINVAL; 202 203 if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR) 204 return -EINVAL; 205 206 hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS; 207 if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM)) 208 return -EINVAL; 209 210 /* ICV error or CCMP/BIP/WPI MIC error */ 211 if (rxd1 & MT_RXD1_NORMAL_ICV_ERR) 212 status->flag |= RX_FLAG_ONLY_MONITOR; 213 214 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3); 215 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M; 216 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1); 217 status->wcid = mt792x_rx_get_wcid(dev, idx, unicast); 218 219 if (status->wcid) { 220 msta = container_of(status->wcid, struct mt792x_sta, wcid); 221 spin_lock_bh(&dev->mt76.sta_poll_lock); 222 if (list_empty(&msta->wcid.poll_list)) 223 list_add_tail(&msta->wcid.poll_list, 224 &dev->mt76.sta_poll_list); 225 spin_unlock_bh(&dev->mt76.sta_poll_lock); 226 } 227 228 mt792x_get_status_freq_info(status, chfreq); 229 230 switch (status->band) { 231 case NL80211_BAND_5GHZ: 232 sband = &mphy->sband_5g.sband; 233 break; 234 case NL80211_BAND_6GHZ: 235 sband = &mphy->sband_6g.sband; 236 break; 237 default: 238 sband = &mphy->sband_2g.sband; 239 break; 240 } 241 242 if (!sband->channels) 243 return -EINVAL; 244 245 if (mt76_is_mmio(&dev->mt76) && (rxd0 & csum_mask) == csum_mask && 246 !(csum_status & (BIT(0) | BIT(2) | BIT(3)))) 247 skb->ip_summed = CHECKSUM_UNNECESSARY; 248 249 if (rxd1 & MT_RXD1_NORMAL_FCS_ERR) 250 status->flag |= RX_FLAG_FAILED_FCS_CRC; 251 252 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR) 253 status->flag |= RX_FLAG_MMIC_ERROR; 254 255 if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 && 256 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) { 257 status->flag |= RX_FLAG_DECRYPTED; 258 status->flag |= RX_FLAG_IV_STRIPPED; 259 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED; 260 } 261 262 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2); 263 264 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR) 265 return -EINVAL; 266 267 rxd += 6; 268 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) { 269 u32 v0 = le32_to_cpu(rxd[0]); 270 u32 v2 = le32_to_cpu(rxd[2]); 271 272 fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0)); 273 seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2); 274 qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2); 275 276 rxd += 4; 277 if ((u8 *)rxd - skb->data >= skb->len) 278 return -EINVAL; 279 } 280 281 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) { 282 u8 *data = (u8 *)rxd; 283 284 if (status->flag & RX_FLAG_DECRYPTED) { 285 switch (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1)) { 286 case MT_CIPHER_AES_CCMP: 287 case MT_CIPHER_CCMP_CCX: 288 case MT_CIPHER_CCMP_256: 289 insert_ccmp_hdr = 290 FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); 291 fallthrough; 292 case MT_CIPHER_TKIP: 293 case MT_CIPHER_TKIP_NO_MIC: 294 case MT_CIPHER_GCMP: 295 case MT_CIPHER_GCMP_256: 296 status->iv[0] = data[5]; 297 status->iv[1] = data[4]; 298 status->iv[2] = data[3]; 299 status->iv[3] = data[2]; 300 status->iv[4] = data[1]; 301 status->iv[5] = data[0]; 302 break; 303 default: 304 break; 305 } 306 } 307 rxd += 4; 308 if ((u8 *)rxd - skb->data >= skb->len) 309 return -EINVAL; 310 } 311 312 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) { 313 status->timestamp = le32_to_cpu(rxd[0]); 314 status->flag |= RX_FLAG_MACTIME_START; 315 316 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) { 317 status->flag |= RX_FLAG_AMPDU_DETAILS; 318 319 /* all subframes of an A-MPDU have the same timestamp */ 320 if (phy->rx_ampdu_ts != status->timestamp) { 321 if (!++phy->ampdu_ref) 322 phy->ampdu_ref++; 323 } 324 phy->rx_ampdu_ts = status->timestamp; 325 326 status->ampdu_ref = phy->ampdu_ref; 327 } 328 329 rxd += 2; 330 if ((u8 *)rxd - skb->data >= skb->len) 331 return -EINVAL; 332 } 333 334 /* RXD Group 3 - P-RXV */ 335 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) { 336 u32 v0, v1; 337 int ret; 338 339 rxv = rxd; 340 rxd += 2; 341 if ((u8 *)rxd - skb->data >= skb->len) 342 return -EINVAL; 343 344 v0 = le32_to_cpu(rxv[0]); 345 v1 = le32_to_cpu(rxv[1]); 346 347 if (v0 & MT_PRXV_HT_AD_CODE) 348 status->enc_flags |= RX_ENC_FLAG_LDPC; 349 350 ret = mt76_connac2_mac_fill_rx_rate(&dev->mt76, status, sband, 351 rxv, &mode); 352 if (ret < 0) 353 return ret; 354 355 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) { 356 rxd += 6; 357 if ((u8 *)rxd - skb->data >= skb->len) 358 return -EINVAL; 359 360 rxv = rxd; 361 /* Monitor mode would use RCPI described in GROUP 5 362 * instead. 363 */ 364 v1 = le32_to_cpu(rxv[0]); 365 366 rxd += 12; 367 if ((u8 *)rxd - skb->data >= skb->len) 368 return -EINVAL; 369 } 370 371 status->chains = mphy->antenna_mask; 372 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1); 373 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1); 374 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1); 375 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1); 376 status->signal = -128; 377 for (i = 0; i < hweight8(mphy->antenna_mask); i++) { 378 if (!(status->chains & BIT(i)) || 379 status->chain_signal[i] >= 0) 380 continue; 381 382 status->signal = max(status->signal, 383 status->chain_signal[i]); 384 } 385 } 386 387 amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4); 388 status->amsdu = !!amsdu_info; 389 if (status->amsdu) { 390 status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME; 391 status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME; 392 } 393 394 hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad; 395 if (hdr_trans && ieee80211_has_morefrags(fc)) { 396 struct ieee80211_vif *vif; 397 int err; 398 399 if (!msta || !msta->vif) 400 return -EINVAL; 401 402 vif = container_of((void *)msta->vif, struct ieee80211_vif, 403 drv_priv); 404 err = mt76_connac2_reverse_frag0_hdr_trans(vif, skb, hdr_gap); 405 if (err) 406 return err; 407 408 hdr_trans = false; 409 } else { 410 skb_pull(skb, hdr_gap); 411 if (!hdr_trans && status->amsdu) { 412 memmove(skb->data + 2, skb->data, 413 ieee80211_get_hdrlen_from_skb(skb)); 414 skb_pull(skb, 2); 415 } 416 } 417 418 if (!hdr_trans) { 419 struct ieee80211_hdr *hdr; 420 421 if (insert_ccmp_hdr) { 422 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1); 423 424 mt76_insert_ccmp_hdr(skb, key_id); 425 } 426 427 hdr = mt76_skb_get_hdr(skb); 428 fc = hdr->frame_control; 429 if (ieee80211_is_data_qos(fc)) { 430 seq_ctrl = le16_to_cpu(hdr->seq_ctrl); 431 qos_ctl = *ieee80211_get_qos_ctl(hdr); 432 } 433 } else { 434 status->flag |= RX_FLAG_8023; 435 } 436 437 mt792x_mac_assoc_rssi(dev, skb); 438 439 if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023)) 440 mt76_connac2_mac_decode_he_radiotap(&dev->mt76, skb, rxv, mode); 441 442 if (!status->wcid || !ieee80211_is_data_qos(fc)) 443 return 0; 444 445 status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc); 446 status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl); 447 status->qos_ctl = qos_ctl; 448 449 return 0; 450} 451 452void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data) 453{ 454 struct mt792x_sta *msta = NULL; 455 struct mt76_wcid *wcid; 456 __le32 *txs_data = data; 457 u16 wcidx; 458 u8 pid; 459 460 if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) 461 return; 462 463 wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); 464 pid = le32_get_bits(txs_data[3], MT_TXS3_PID); 465 466 if (pid < MT_PACKET_ID_FIRST) 467 return; 468 469 if (wcidx >= MT792x_WTBL_SIZE) 470 return; 471 472 rcu_read_lock(); 473 474 wcid = rcu_dereference(dev->mt76.wcid[wcidx]); 475 if (!wcid) 476 goto out; 477 478 msta = container_of(wcid, struct mt792x_sta, wcid); 479 480 mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data); 481 if (!wcid->sta) 482 goto out; 483 484 spin_lock_bh(&dev->mt76.sta_poll_lock); 485 if (list_empty(&msta->wcid.poll_list)) 486 list_add_tail(&msta->wcid.poll_list, &dev->mt76.sta_poll_list); 487 spin_unlock_bh(&dev->mt76.sta_poll_lock); 488 489out: 490 rcu_read_unlock(); 491} 492 493static void mt7921_mac_tx_free(struct mt792x_dev *dev, void *data, int len) 494{ 495 struct mt76_connac_tx_free *free = data; 496#if defined(__linux__) 497 __le32 *tx_info = (__le32 *)(data + sizeof(*free)); 498#elif defined(__FreeBSD__) 499 __le32 *tx_info = (__le32 *)((u8 *)data + sizeof(*free)); 500#endif 501 struct mt76_dev *mdev = &dev->mt76; 502 struct mt76_txwi_cache *txwi; 503 struct ieee80211_sta *sta = NULL; 504 struct mt76_wcid *wcid = NULL; 505 struct sk_buff *skb, *tmp; 506#if defined(__linux__) 507 void *end = data + len; 508#elif defined(__FreeBSD__) 509 void *end = (u8 *)data + len; 510#endif 511 LIST_HEAD(free_list); 512 bool wake = false; 513 u8 i, count; 514 515 /* clean DMA queues and unmap buffers first */ 516 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); 517 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); 518 519 count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_CNT); 520 if (WARN_ON_ONCE((void *)&tx_info[count] > end)) 521 return; 522 523 for (i = 0; i < count; i++) { 524 u32 msdu, info = le32_to_cpu(tx_info[i]); 525 u8 stat; 526 527 /* 1'b1: new wcid pair. 528 * 1'b0: msdu_id with the same 'wcid pair' as above. 529 */ 530 if (info & MT_TX_FREE_PAIR) { 531 struct mt792x_sta *msta; 532 u16 idx; 533 534 count++; 535 idx = FIELD_GET(MT_TX_FREE_WLAN_ID, info); 536 wcid = rcu_dereference(dev->mt76.wcid[idx]); 537 sta = wcid_to_sta(wcid); 538 if (!sta) 539 continue; 540 541 msta = container_of(wcid, struct mt792x_sta, wcid); 542 spin_lock_bh(&mdev->sta_poll_lock); 543 if (list_empty(&msta->wcid.poll_list)) 544 list_add_tail(&msta->wcid.poll_list, 545 &mdev->sta_poll_list); 546 spin_unlock_bh(&mdev->sta_poll_lock); 547 continue; 548 } 549 550 msdu = FIELD_GET(MT_TX_FREE_MSDU_ID, info); 551 stat = FIELD_GET(MT_TX_FREE_STATUS, info); 552 553 if (wcid) { 554 wcid->stats.tx_retries += 555 FIELD_GET(MT_TX_FREE_COUNT, info) - 1; 556 wcid->stats.tx_failed += !!stat; 557 } 558 559 txwi = mt76_token_release(mdev, msdu, &wake); 560 if (!txwi) 561 continue; 562 563 mt76_connac2_txwi_free(mdev, txwi, sta, &free_list); 564 } 565 566 if (wake) 567 mt76_set_tx_blocked(&dev->mt76, false); 568 569 list_for_each_entry_safe(skb, tmp, &free_list, list) { 570 skb_list_del_init(skb); 571 napi_consume_skb(skb, 1); 572 } 573 574 rcu_read_lock(); 575 mt7921_mac_sta_poll(dev); 576 rcu_read_unlock(); 577 578 mt76_worker_schedule(&dev->mt76.tx_worker); 579} 580 581bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len) 582{ 583 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 584 __le32 *rxd = (__le32 *)data; 585 __le32 *end = (__le32 *)&rxd[len / 4]; 586 enum rx_pkt_type type; 587 588 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 589 590 switch (type) { 591 case PKT_TYPE_TXRX_NOTIFY: 592 /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */ 593 mt7921_mac_tx_free(dev, data, len); /* mmio */ 594 return false; 595 case PKT_TYPE_TXS: 596 for (rxd += 2; rxd + 8 <= end; rxd += 8) 597 mt7921_mac_add_txs(dev, rxd); 598 return false; 599 default: 600 return true; 601 } 602} 603EXPORT_SYMBOL_GPL(mt7921_rx_check); 604 605void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 606 struct sk_buff *skb, u32 *info) 607{ 608 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 609 __le32 *rxd = (__le32 *)skb->data; 610 __le32 *end = (__le32 *)&skb->data[skb->len]; 611 enum rx_pkt_type type; 612 u16 flag; 613 614 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 615 flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG); 616 617 if (type == PKT_TYPE_RX_EVENT && flag == 0x1) 618 type = PKT_TYPE_NORMAL_MCU; 619 620 switch (type) { 621 case PKT_TYPE_TXRX_NOTIFY: 622 /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */ 623 mt7921_mac_tx_free(dev, skb->data, skb->len); 624 napi_consume_skb(skb, 1); 625 break; 626 case PKT_TYPE_RX_EVENT: 627 mt7921_mcu_rx_event(dev, skb); 628 break; 629 case PKT_TYPE_TXS: 630 for (rxd += 2; rxd + 8 <= end; rxd += 8) 631 mt7921_mac_add_txs(dev, rxd); 632 dev_kfree_skb(skb); 633 break; 634 case PKT_TYPE_NORMAL_MCU: 635 case PKT_TYPE_NORMAL: 636 if (!mt7921_mac_fill_rx(dev, skb)) { 637 mt76_rx(&dev->mt76, q, skb); 638 return; 639 } 640 fallthrough; 641 default: 642 dev_kfree_skb(skb); 643 break; 644 } 645} 646EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb); 647 648static void 649mt7921_vif_connect_iter(void *priv, u8 *mac, 650 struct ieee80211_vif *vif) 651{ 652 struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 653 struct mt792x_dev *dev = mvif->phy->dev; 654 struct ieee80211_hw *hw = mt76_hw(dev); 655 656 if (vif->type == NL80211_IFTYPE_STATION) 657 ieee80211_disconnect(vif, true); 658 659 mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, true); 660 mt7921_mcu_set_tx(dev, vif); 661 662 if (vif->type == NL80211_IFTYPE_AP) { 663 mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.wcid, 664 true, NULL); 665 mt7921_mcu_sta_update(dev, NULL, vif, true, 666 MT76_STA_INFO_STATE_NONE); 667 mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true); 668 } 669} 670 671/* system error recovery */ 672void mt7921_mac_reset_work(struct work_struct *work) 673{ 674 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 675 reset_work); 676 struct ieee80211_hw *hw = mt76_hw(dev); 677 struct mt76_connac_pm *pm = &dev->pm; 678 int i, ret; 679 680 dev_dbg(dev->mt76.dev, "chip reset\n"); 681 dev->hw_full_reset = true; 682 ieee80211_stop_queues(hw); 683 684 cancel_delayed_work_sync(&dev->mphy.mac_work); 685 cancel_delayed_work_sync(&pm->ps_work); 686 cancel_work_sync(&pm->wake_work); 687 688 for (i = 0; i < 10; i++) { 689 mutex_lock(&dev->mt76.mutex); 690 ret = mt792x_dev_reset(dev); 691 mutex_unlock(&dev->mt76.mutex); 692 693 if (!ret) 694 break; 695 } 696 697 if (i == 10) 698 dev_err(dev->mt76.dev, "chip reset failed\n"); 699 700 if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) { 701 struct cfg80211_scan_info info = { 702 .aborted = true, 703 }; 704 705 ieee80211_scan_completed(dev->mphy.hw, &info); 706 } 707 708 dev->hw_full_reset = false; 709 pm->suspended = false; 710 ieee80211_wake_queues(hw); 711 ieee80211_iterate_active_interfaces(hw, 712 IEEE80211_IFACE_ITER_RESUME_ALL, 713 mt7921_vif_connect_iter, NULL); 714 mt76_connac_power_save_sched(&dev->mt76.phy, pm); 715} 716 717void mt7921_coredump_work(struct work_struct *work) 718{ 719 struct mt792x_dev *dev; 720 char *dump, *data; 721 722 dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev, 723 coredump.work.work); 724 725 if (time_is_after_jiffies(dev->coredump.last_activity + 726 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) { 727 queue_delayed_work(dev->mt76.wq, &dev->coredump.work, 728 MT76_CONNAC_COREDUMP_TIMEOUT); 729 return; 730 } 731 732 dump = vzalloc(MT76_CONNAC_COREDUMP_SZ); 733 data = dump; 734 735 while (true) { 736 struct sk_buff *skb; 737 738 spin_lock_bh(&dev->mt76.lock); 739 skb = __skb_dequeue(&dev->coredump.msg_list); 740 spin_unlock_bh(&dev->mt76.lock); 741 742 if (!skb) 743 break; 744 745 skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); 746 if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) { 747 dev_kfree_skb(skb); 748 continue; 749 } 750 751 memcpy(data, skb->data, skb->len); 752 data += skb->len; 753 754 dev_kfree_skb(skb); 755 } 756 757 if (dump) 758 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ, 759 GFP_KERNEL); 760 761 mt792x_reset(&dev->mt76); 762} 763 764/* usb_sdio */ 765static void 766mt7921_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid, 767 enum mt76_txq_id qid, struct ieee80211_sta *sta, 768 struct ieee80211_key_conf *key, int pid, 769 struct sk_buff *skb) 770{ 771 __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE); 772 773 memset(txwi, 0, MT_SDIO_TXD_SIZE); 774 mt76_connac2_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, qid, 0); 775 skb_push(skb, MT_SDIO_TXD_SIZE); 776} 777 778int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 779 enum mt76_txq_id qid, struct mt76_wcid *wcid, 780 struct ieee80211_sta *sta, 781 struct mt76_tx_info *tx_info) 782{ 783 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 784 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 785 struct ieee80211_key_conf *key = info->control.hw_key; 786 struct sk_buff *skb = tx_info->skb; 787 int err, pad, pktid, type; 788 789 if (unlikely(tx_info->skb->len <= ETH_HLEN)) 790 return -EINVAL; 791 792 err = skb_cow_head(skb, MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE); 793 if (err) 794 return err; 795 796 if (!wcid) 797 wcid = &dev->mt76.global_wcid; 798 799 if (sta) { 800 struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; 801 802 if (time_after(jiffies, msta->last_txs + HZ / 4)) { 803 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; 804 msta->last_txs = jiffies; 805 } 806 } 807 808 pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); 809 mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb); 810 811 type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0; 812 mt7921_skb_add_usb_sdio_hdr(dev, skb, type); 813 pad = round_up(skb->len, 4) - skb->len; 814 if (mt76_is_usb(mdev)) 815 pad += 4; 816 817 err = mt76_skb_adjust_pad(skb, pad); 818 if (err) 819 /* Release pktid in case of error. */ 820 idr_remove(&wcid->pktid, pktid); 821 822 return err; 823} 824EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb); 825 826void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 827 struct mt76_queue_entry *e) 828{ 829 __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE); 830 unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; 831 struct ieee80211_sta *sta; 832 struct mt76_wcid *wcid; 833 u16 idx; 834 835 idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 836 wcid = rcu_dereference(mdev->wcid[idx]); 837 sta = wcid_to_sta(wcid); 838 839 if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE))) 840 mt76_connac2_tx_check_aggr(sta, txwi); 841 842 skb_pull(e->skb, headroom); 843 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 844} 845EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb); 846 847bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) 848{ 849 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 850 851 mt792x_mutex_acquire(dev); 852 mt7921_mac_sta_poll(dev); 853 mt792x_mutex_release(dev); 854 855 return false; 856} 857EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data); 858 859#if IS_ENABLED(CONFIG_IPV6) 860void mt7921_set_ipv6_ns_work(struct work_struct *work) 861{ 862 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 863 ipv6_ns_work); 864 struct sk_buff *skb; 865 int ret = 0; 866 867 do { 868 skb = skb_dequeue(&dev->ipv6_ns_list); 869 870 if (!skb) 871 break; 872 873 mt792x_mutex_acquire(dev); 874 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 875 MCU_UNI_CMD(OFFLOAD), true); 876 mt792x_mutex_release(dev); 877 878 } while (!ret); 879 880 if (ret) 881 skb_queue_purge(&dev->ipv6_ns_list); 882} 883#endif 884