1/*-
2 * Copyright (c) 2012 Konstantin Belousov <kib@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#ifdef __arm__
28#include <arm/counter.h>
29#else /* !__arm__ */
30
31#ifndef _MACHINE_COUNTER_H_
32#define	_MACHINE_COUNTER_H_
33
34#include <sys/pcpu.h>
35#include <machine/atomic.h>
36
37#define	EARLY_COUNTER	&pcpu0.pc_early_dummy_counter
38
39#define	counter_enter()	do {} while (0)
40#define	counter_exit()	do {} while (0)
41
42#ifdef IN_SUBR_COUNTER_C
43static inline uint64_t
44counter_u64_read_one(uint64_t *p, int cpu)
45{
46
47	return (*(uint64_t *)((char *)p + UMA_PCPU_ALLOC_SIZE * cpu));
48}
49
50static inline uint64_t
51counter_u64_fetch_inline(uint64_t *p)
52{
53	uint64_t r;
54	int i;
55
56	r = 0;
57	CPU_FOREACH(i)
58		r += counter_u64_read_one((uint64_t *)p, i);
59
60	return (r);
61}
62
63static void
64counter_u64_zero_one_cpu(void *arg)
65{
66
67	*((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE *
68	    PCPU_GET(cpuid))) = 0;
69}
70
71static inline void
72counter_u64_zero_inline(counter_u64_t c)
73{
74
75	smp_rendezvous(smp_no_rendezvous_barrier, counter_u64_zero_one_cpu,
76	    smp_no_rendezvous_barrier, c);
77}
78#endif
79
80#define	counter_u64_add_protected(c, inc)	counter_u64_add(c, inc)
81
82static inline void
83counter_u64_add(counter_u64_t c, int64_t inc)
84{
85
86	atomic_add_64((uint64_t *)zpcpu_get(c), inc);
87}
88
89#endif	/* ! _MACHINE_COUNTER_H_ */
90
91#endif /* !__arm__ */
92