1/*-
2 * Copyright (c) 2015 Michal Meloun
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/param.h>
28#include <sys/systm.h>
29#include <sys/bus.h>
30#include <sys/kernel.h>
31#include <sys/malloc.h>
32
33#include <machine/bus.h>
34
35#include <dev/clk/clk.h>
36#include <dev/drm2/drmP.h>
37#include <dev/drm2/drm_crtc.h>
38#include <dev/drm2/drm_crtc_helper.h>
39#include <dev/drm2/drm_edid.h>
40#include <dev/drm2/drm_fb_helper.h>
41#include <dev/gpio/gpiobusvar.h>
42#include <dev/ofw/ofw_bus_subr.h>
43
44#include <arm/nvidia/drm2/tegra_drm.h>
45
46#include <dt-bindings/gpio/gpio.h>
47
48int
49tegra_drm_connector_get_modes(struct drm_connector *connector)
50{
51	struct tegra_drm_encoder *output;
52	struct edid *edid = NULL;
53	int rv;
54
55	output = container_of(connector, struct tegra_drm_encoder,
56	     connector);
57
58	/* Panel is first */
59	if (output->panel != NULL) {
60		/* XXX panel parsing */
61		return (0);
62	}
63
64	/* static EDID is second*/
65	edid = output->edid;
66
67	/* EDID from monitor is last */
68	if (edid == NULL)
69		edid = drm_get_edid(connector, output->ddc);
70
71	if (edid == NULL)
72		return (0);
73
74	/* Process EDID */
75	drm_mode_connector_update_edid_property(connector, edid);
76	rv = drm_add_edid_modes(connector, edid);
77	drm_edid_to_eld(connector, edid);
78	return (rv);
79}
80
81struct drm_encoder *
82tegra_drm_connector_best_encoder(struct drm_connector *connector)
83{
84	struct tegra_drm_encoder *output;
85
86	output = container_of(connector, struct tegra_drm_encoder,
87	     connector);
88
89	return &(output->encoder);
90}
91
92enum drm_connector_status
93tegra_drm_connector_detect(struct drm_connector *connector, bool force)
94{
95	struct tegra_drm_encoder *output;
96	bool active;
97	int rv;
98
99	output = container_of(connector, struct tegra_drm_encoder,
100	     connector);
101	if (output->gpio_hpd == NULL) {
102		return ((output->panel != NULL) ?
103		    connector_status_connected:
104		    connector_status_disconnected);
105	}
106
107	rv = gpio_pin_is_active(output->gpio_hpd, &active);
108	if (rv  != 0) {
109		device_printf(output->dev, " GPIO read failed: %d\n", rv);
110		return (connector_status_unknown);
111	}
112
113	return (active ?
114	    connector_status_connected : connector_status_disconnected);
115}
116
117int
118tegra_drm_encoder_attach(struct tegra_drm_encoder *output, phandle_t node)
119{
120	int rv;
121	phandle_t ddc;
122
123	/* XXX parse output panel here */
124
125	rv = OF_getencprop_alloc(node, "nvidia,edid",
126	    (void **)&output->edid);
127
128	/* EDID exist but have invalid size */
129	if ((rv >= 0) && (rv != sizeof(struct edid))) {
130		device_printf(output->dev,
131		    "Malformed \"nvidia,edid\" property\n");
132		if (output->edid != NULL)
133			free(output->edid, M_OFWPROP);
134		return (ENXIO);
135	}
136
137	gpio_pin_get_by_ofw_property(output->dev, node, "nvidia,hpd-gpio",
138	    &output->gpio_hpd);
139	ddc = 0;
140	OF_getencprop(node, "nvidia,ddc-i2c-bus", &ddc, sizeof(ddc));
141	if (ddc > 0)
142		output->ddc = OF_device_from_xref(ddc);
143	if ((output->edid == NULL) && (output->ddc == NULL))
144		return (ENXIO);
145
146	if (output->gpio_hpd != NULL) {
147		output->connector.polled =
148//		    DRM_CONNECTOR_POLL_HPD;
149		    DRM_CONNECTOR_POLL_DISCONNECT |
150		    DRM_CONNECTOR_POLL_CONNECT;
151	}
152
153	return (0);
154}
155
156int tegra_drm_encoder_init(struct tegra_drm_encoder *output,
157    struct tegra_drm *drm)
158{
159
160	if (output->panel) {
161		/* attach panel */
162	}
163	return (0);
164}
165
166int tegra_drm_encoder_exit(struct tegra_drm_encoder *output,
167    struct tegra_drm *drm)
168{
169
170	if (output->panel) {
171		/* detach panel */
172	}
173	return (0);
174}
175