1//===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in
10// the LLVM NVPTX back-end.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H
15#define LLVM_LIB_TARGET_NVPTX_NVPTX_H
16
17#include "llvm/IR/PassManager.h"
18#include "llvm/Pass.h"
19#include "llvm/Support/CodeGen.h"
20
21namespace llvm {
22class FunctionPass;
23class MachineFunctionPass;
24class NVPTXTargetMachine;
25class PassRegistry;
26
27namespace NVPTXCC {
28enum CondCodes {
29  EQ,
30  NE,
31  LT,
32  LE,
33  GT,
34  GE
35};
36}
37
38FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
39                                 llvm::CodeGenOptLevel OptLevel);
40ModulePass *createNVPTXAssignValidGlobalNamesPass();
41ModulePass *createGenericToNVVMLegacyPass();
42ModulePass *createNVPTXCtorDtorLoweringLegacyPass();
43FunctionPass *createNVVMIntrRangePass(unsigned int SmVersion);
44FunctionPass *createNVVMReflectPass(unsigned int SmVersion);
45MachineFunctionPass *createNVPTXPrologEpilogPass();
46MachineFunctionPass *createNVPTXReplaceImageHandlesPass();
47FunctionPass *createNVPTXImageOptimizerPass();
48FunctionPass *createNVPTXLowerArgsPass();
49FunctionPass *createNVPTXLowerAllocaPass();
50FunctionPass *createNVPTXLowerUnreachablePass(bool TrapUnreachable,
51                                              bool NoTrapAfterNoreturn);
52MachineFunctionPass *createNVPTXPeephole();
53MachineFunctionPass *createNVPTXProxyRegErasurePass();
54
55struct NVVMIntrRangePass : PassInfoMixin<NVVMIntrRangePass> {
56  NVVMIntrRangePass();
57  NVVMIntrRangePass(unsigned SmVersion) : SmVersion(SmVersion) {}
58  PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
59
60private:
61  unsigned SmVersion;
62};
63
64struct NVVMReflectPass : PassInfoMixin<NVVMReflectPass> {
65  NVVMReflectPass();
66  NVVMReflectPass(unsigned SmVersion) : SmVersion(SmVersion) {}
67  PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
68
69private:
70  unsigned SmVersion;
71};
72
73struct GenericToNVVMPass : PassInfoMixin<GenericToNVVMPass> {
74  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
75};
76
77namespace NVPTX {
78enum DrvInterface {
79  NVCL,
80  CUDA
81};
82
83// A field inside TSFlags needs a shift and a mask. The usage is
84// always as follows :
85// ((TSFlags & fieldMask) >> fieldShift)
86// The enum keeps the mask, the shift, and all valid values of the
87// field in one place.
88enum VecInstType {
89  VecInstTypeShift = 0,
90  VecInstTypeMask = 0xF,
91
92  VecNOP = 0,
93  VecLoad = 1,
94  VecStore = 2,
95  VecBuild = 3,
96  VecShuffle = 4,
97  VecExtract = 5,
98  VecInsert = 6,
99  VecDest = 7,
100  VecOther = 15
101};
102
103enum SimpleMove {
104  SimpleMoveMask = 0x10,
105  SimpleMoveShift = 4
106};
107enum LoadStore {
108  isLoadMask = 0x20,
109  isLoadShift = 5,
110  isStoreMask = 0x40,
111  isStoreShift = 6
112};
113
114namespace PTXLdStInstCode {
115enum AddressSpace {
116  GENERIC = 0,
117  GLOBAL = 1,
118  CONSTANT = 2,
119  SHARED = 3,
120  PARAM = 4,
121  LOCAL = 5
122};
123enum FromType {
124  Unsigned = 0,
125  Signed,
126  Float,
127  Untyped
128};
129enum VecType {
130  Scalar = 1,
131  V2 = 2,
132  V4 = 4
133};
134}
135
136/// PTXCvtMode - Conversion code enumeration
137namespace PTXCvtMode {
138enum CvtMode {
139  NONE = 0,
140  RNI,
141  RZI,
142  RMI,
143  RPI,
144  RN,
145  RZ,
146  RM,
147  RP,
148  RNA,
149
150  BASE_MASK = 0x0F,
151  FTZ_FLAG = 0x10,
152  SAT_FLAG = 0x20,
153  RELU_FLAG = 0x40
154};
155}
156
157/// PTXCmpMode - Comparison mode enumeration
158namespace PTXCmpMode {
159enum CmpMode {
160  EQ = 0,
161  NE,
162  LT,
163  LE,
164  GT,
165  GE,
166  LO,
167  LS,
168  HI,
169  HS,
170  EQU,
171  NEU,
172  LTU,
173  LEU,
174  GTU,
175  GEU,
176  NUM,
177  // NAN is a MACRO
178  NotANumber,
179
180  BASE_MASK = 0xFF,
181  FTZ_FLAG = 0x100
182};
183}
184
185namespace PTXPrmtMode {
186enum PrmtMode {
187  NONE,
188  F4E,
189  B4E,
190  RC8,
191  ECL,
192  ECR,
193  RC16,
194};
195}
196}
197void initializeNVPTXDAGToDAGISelPass(PassRegistry &);
198} // namespace llvm
199
200// Defines symbolic names for NVPTX registers.  This defines a mapping from
201// register name to register number.
202#define GET_REGINFO_ENUM
203#include "NVPTXGenRegisterInfo.inc"
204
205// Defines symbolic names for the NVPTX instructions.
206#define GET_INSTRINFO_ENUM
207#define GET_INSTRINFO_MC_HELPER_DECLS
208#include "NVPTXGenInstrInfo.inc"
209
210#endif
211