1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This implements the SelectionDAG::dump method and friends. 10// 11//===----------------------------------------------------------------------===// 12 13#include "SDNodeDbgValue.h" 14#include "llvm/ADT/APFloat.h" 15#include "llvm/ADT/APInt.h" 16#include "llvm/ADT/SmallPtrSet.h" 17#include "llvm/ADT/StringExtras.h" 18#include "llvm/CodeGen/ISDOpcodes.h" 19#include "llvm/CodeGen/MachineBasicBlock.h" 20#include "llvm/CodeGen/MachineConstantPool.h" 21#include "llvm/CodeGen/MachineMemOperand.h" 22#include "llvm/CodeGen/MachineValueType.h" 23#include "llvm/CodeGen/SelectionDAG.h" 24#include "llvm/CodeGen/SelectionDAGNodes.h" 25#include "llvm/CodeGen/TargetInstrInfo.h" 26#include "llvm/CodeGen/TargetLowering.h" 27#include "llvm/CodeGen/TargetRegisterInfo.h" 28#include "llvm/CodeGen/TargetSubtargetInfo.h" 29#include "llvm/CodeGen/ValueTypes.h" 30#include "llvm/Config/llvm-config.h" 31#include "llvm/IR/BasicBlock.h" 32#include "llvm/IR/Constants.h" 33#include "llvm/IR/DebugInfoMetadata.h" 34#include "llvm/IR/DebugLoc.h" 35#include "llvm/IR/Function.h" 36#include "llvm/IR/Intrinsics.h" 37#include "llvm/IR/ModuleSlotTracker.h" 38#include "llvm/IR/Value.h" 39#include "llvm/Support/Casting.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Compiler.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/Printable.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/Target/TargetIntrinsicInfo.h" 47#include "llvm/Target/TargetMachine.h" 48#include <cstdint> 49#include <iterator> 50 51using namespace llvm; 52 53static cl::opt<bool> 54VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 55 cl::desc("Display more information when dumping selection " 56 "DAG nodes.")); 57 58std::string SDNode::getOperationName(const SelectionDAG *G) const { 59 switch (getOpcode()) { 60 default: 61 if (getOpcode() < ISD::BUILTIN_OP_END) 62 return "<<Unknown DAG Node>>"; 63 if (isMachineOpcode()) { 64 if (G) 65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo()) 66 if (getMachineOpcode() < TII->getNumOpcodes()) 67 return std::string(TII->getName(getMachineOpcode())); 68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 69 } 70 if (G) { 71 const TargetLowering &TLI = G->getTargetLoweringInfo(); 72 const char *Name = TLI.getTargetNodeName(getOpcode()); 73 if (Name) return Name; 74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 75 } 76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 77 78#ifndef NDEBUG 79 case ISD::DELETED_NODE: return "<<Deleted Node!>>"; 80#endif 81 case ISD::PREFETCH: return "Prefetch"; 82 case ISD::MEMBARRIER: return "MemBarrier"; 83 case ISD::ATOMIC_FENCE: return "AtomicFence"; 84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess"; 86 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; 91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd"; 99 case ISD::ATOMIC_LOAD_UINC_WRAP: 100 return "AtomicLoadUIncWrap"; 101 case ISD::ATOMIC_LOAD_UDEC_WRAP: 102 return "AtomicLoadUDecWrap"; 103 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 104 case ISD::ATOMIC_STORE: return "AtomicStore"; 105 case ISD::PCMARKER: return "PCMarker"; 106 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 107 case ISD::SRCVALUE: return "SrcValue"; 108 case ISD::MDNODE_SDNODE: return "MDNode"; 109 case ISD::EntryToken: return "EntryToken"; 110 case ISD::TokenFactor: return "TokenFactor"; 111 case ISD::AssertSext: return "AssertSext"; 112 case ISD::AssertZext: return "AssertZext"; 113 case ISD::AssertAlign: return "AssertAlign"; 114 115 case ISD::BasicBlock: return "BasicBlock"; 116 case ISD::VALUETYPE: return "ValueType"; 117 case ISD::Register: return "Register"; 118 case ISD::RegisterMask: return "RegisterMask"; 119 case ISD::Constant: 120 if (cast<ConstantSDNode>(this)->isOpaque()) 121 return "OpaqueConstant"; 122 return "Constant"; 123 case ISD::ConstantFP: return "ConstantFP"; 124 case ISD::GlobalAddress: return "GlobalAddress"; 125 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 126 case ISD::FrameIndex: return "FrameIndex"; 127 case ISD::JumpTable: return "JumpTable"; 128 case ISD::JUMP_TABLE_DEBUG_INFO: 129 return "JUMP_TABLE_DEBUG_INFO"; 130 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 131 case ISD::RETURNADDR: return "RETURNADDR"; 132 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR"; 133 case ISD::FRAMEADDR: return "FRAMEADDR"; 134 case ISD::SPONENTRY: return "SPONENTRY"; 135 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER"; 136 case ISD::READ_REGISTER: return "READ_REGISTER"; 137 case ISD::WRITE_REGISTER: return "WRITE_REGISTER"; 138 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 139 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA"; 140 case ISD::EH_RETURN: return "EH_RETURN"; 141 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 142 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 143 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH"; 144 case ISD::ConstantPool: return "ConstantPool"; 145 case ISD::TargetIndex: return "TargetIndex"; 146 case ISD::ExternalSymbol: return "ExternalSymbol"; 147 case ISD::BlockAddress: return "BlockAddress"; 148 case ISD::INTRINSIC_WO_CHAIN: 149 case ISD::INTRINSIC_VOID: 150 case ISD::INTRINSIC_W_CHAIN: { 151 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 152 unsigned IID = getOperand(OpNo)->getAsZExtVal(); 153 if (IID < Intrinsic::num_intrinsics) 154 return Intrinsic::getBaseName((Intrinsic::ID)IID).str(); 155 if (!G) 156 return "Unknown intrinsic"; 157 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 158 return TII->getName(IID); 159 llvm_unreachable("Invalid intrinsic ID"); 160 } 161 162 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 163 case ISD::TargetConstant: 164 if (cast<ConstantSDNode>(this)->isOpaque()) 165 return "OpaqueTargetConstant"; 166 return "TargetConstant"; 167 case ISD::TargetConstantFP: return "TargetConstantFP"; 168 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 169 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 170 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 171 case ISD::TargetJumpTable: return "TargetJumpTable"; 172 case ISD::TargetConstantPool: return "TargetConstantPool"; 173 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 174 case ISD::MCSymbol: return "MCSymbol"; 175 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 176 177 case ISD::CopyToReg: return "CopyToReg"; 178 case ISD::CopyFromReg: return "CopyFromReg"; 179 case ISD::UNDEF: return "undef"; 180 case ISD::VSCALE: return "vscale"; 181 case ISD::MERGE_VALUES: return "merge_values"; 182 case ISD::INLINEASM: return "inlineasm"; 183 case ISD::INLINEASM_BR: return "inlineasm_br"; 184 case ISD::EH_LABEL: return "eh_label"; 185 case ISD::ANNOTATION_LABEL: return "annotation_label"; 186 case ISD::HANDLENODE: return "handlenode"; 187 188 // Unary operators 189 case ISD::FABS: return "fabs"; 190 case ISD::FMINNUM: return "fminnum"; 191 case ISD::STRICT_FMINNUM: return "strict_fminnum"; 192 case ISD::FMAXNUM: return "fmaxnum"; 193 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum"; 194 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; 195 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; 196 case ISD::FMINIMUM: return "fminimum"; 197 case ISD::STRICT_FMINIMUM: return "strict_fminimum"; 198 case ISD::FMAXIMUM: return "fmaximum"; 199 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum"; 200 case ISD::FNEG: return "fneg"; 201 case ISD::FSQRT: return "fsqrt"; 202 case ISD::STRICT_FSQRT: return "strict_fsqrt"; 203 case ISD::FCBRT: return "fcbrt"; 204 case ISD::FSIN: return "fsin"; 205 case ISD::STRICT_FSIN: return "strict_fsin"; 206 case ISD::FCOS: return "fcos"; 207 case ISD::STRICT_FCOS: return "strict_fcos"; 208 case ISD::FSINCOS: return "fsincos"; 209 case ISD::FTRUNC: return "ftrunc"; 210 case ISD::STRICT_FTRUNC: return "strict_ftrunc"; 211 case ISD::FFLOOR: return "ffloor"; 212 case ISD::STRICT_FFLOOR: return "strict_ffloor"; 213 case ISD::FCEIL: return "fceil"; 214 case ISD::STRICT_FCEIL: return "strict_fceil"; 215 case ISD::FRINT: return "frint"; 216 case ISD::STRICT_FRINT: return "strict_frint"; 217 case ISD::FNEARBYINT: return "fnearbyint"; 218 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; 219 case ISD::FROUND: return "fround"; 220 case ISD::STRICT_FROUND: return "strict_fround"; 221 case ISD::FROUNDEVEN: return "froundeven"; 222 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven"; 223 case ISD::FEXP: return "fexp"; 224 case ISD::STRICT_FEXP: return "strict_fexp"; 225 case ISD::FEXP2: return "fexp2"; 226 case ISD::STRICT_FEXP2: return "strict_fexp2"; 227 case ISD::FEXP10: return "fexp10"; 228 case ISD::FLOG: return "flog"; 229 case ISD::STRICT_FLOG: return "strict_flog"; 230 case ISD::FLOG2: return "flog2"; 231 case ISD::STRICT_FLOG2: return "strict_flog2"; 232 case ISD::FLOG10: return "flog10"; 233 case ISD::STRICT_FLOG10: return "strict_flog10"; 234 235 // Binary operators 236 case ISD::ADD: return "add"; 237 case ISD::SUB: return "sub"; 238 case ISD::MUL: return "mul"; 239 case ISD::MULHU: return "mulhu"; 240 case ISD::MULHS: return "mulhs"; 241 case ISD::AVGFLOORU: return "avgflooru"; 242 case ISD::AVGFLOORS: return "avgfloors"; 243 case ISD::AVGCEILU: return "avgceilu"; 244 case ISD::AVGCEILS: return "avgceils"; 245 case ISD::ABDS: return "abds"; 246 case ISD::ABDU: return "abdu"; 247 case ISD::SDIV: return "sdiv"; 248 case ISD::UDIV: return "udiv"; 249 case ISD::SREM: return "srem"; 250 case ISD::UREM: return "urem"; 251 case ISD::SMUL_LOHI: return "smul_lohi"; 252 case ISD::UMUL_LOHI: return "umul_lohi"; 253 case ISD::SDIVREM: return "sdivrem"; 254 case ISD::UDIVREM: return "udivrem"; 255 case ISD::AND: return "and"; 256 case ISD::OR: return "or"; 257 case ISD::XOR: return "xor"; 258 case ISD::SHL: return "shl"; 259 case ISD::SRA: return "sra"; 260 case ISD::SRL: return "srl"; 261 case ISD::ROTL: return "rotl"; 262 case ISD::ROTR: return "rotr"; 263 case ISD::FSHL: return "fshl"; 264 case ISD::FSHR: return "fshr"; 265 case ISD::FADD: return "fadd"; 266 case ISD::STRICT_FADD: return "strict_fadd"; 267 case ISD::FSUB: return "fsub"; 268 case ISD::STRICT_FSUB: return "strict_fsub"; 269 case ISD::FMUL: return "fmul"; 270 case ISD::STRICT_FMUL: return "strict_fmul"; 271 case ISD::FDIV: return "fdiv"; 272 case ISD::STRICT_FDIV: return "strict_fdiv"; 273 case ISD::FMA: return "fma"; 274 case ISD::STRICT_FMA: return "strict_fma"; 275 case ISD::FMAD: return "fmad"; 276 case ISD::FREM: return "frem"; 277 case ISD::STRICT_FREM: return "strict_frem"; 278 case ISD::FCOPYSIGN: return "fcopysign"; 279 case ISD::FGETSIGN: return "fgetsign"; 280 case ISD::FCANONICALIZE: return "fcanonicalize"; 281 case ISD::IS_FPCLASS: return "is_fpclass"; 282 case ISD::FPOW: return "fpow"; 283 case ISD::STRICT_FPOW: return "strict_fpow"; 284 case ISD::SMIN: return "smin"; 285 case ISD::SMAX: return "smax"; 286 case ISD::UMIN: return "umin"; 287 case ISD::UMAX: return "umax"; 288 289 case ISD::FLDEXP: return "fldexp"; 290 case ISD::STRICT_FLDEXP: return "strict_fldexp"; 291 case ISD::FFREXP: return "ffrexp"; 292 case ISD::FPOWI: return "fpowi"; 293 case ISD::STRICT_FPOWI: return "strict_fpowi"; 294 case ISD::SETCC: return "setcc"; 295 case ISD::SETCCCARRY: return "setcccarry"; 296 case ISD::STRICT_FSETCC: return "strict_fsetcc"; 297 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; 298 case ISD::SELECT: return "select"; 299 case ISD::VSELECT: return "vselect"; 300 case ISD::SELECT_CC: return "select_cc"; 301 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 302 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 303 case ISD::CONCAT_VECTORS: return "concat_vectors"; 304 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 305 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 306 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave"; 307 case ISD::VECTOR_INTERLEAVE: return "vector_interleave"; 308 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 309 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 310 case ISD::VECTOR_SPLICE: return "vector_splice"; 311 case ISD::SPLAT_VECTOR: return "splat_vector"; 312 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts"; 313 case ISD::VECTOR_REVERSE: return "vector_reverse"; 314 case ISD::STEP_VECTOR: return "step_vector"; 315 case ISD::CARRY_FALSE: return "carry_false"; 316 case ISD::ADDC: return "addc"; 317 case ISD::ADDE: return "adde"; 318 case ISD::UADDO_CARRY: return "uaddo_carry"; 319 case ISD::SADDO_CARRY: return "saddo_carry"; 320 case ISD::SADDO: return "saddo"; 321 case ISD::UADDO: return "uaddo"; 322 case ISD::SSUBO: return "ssubo"; 323 case ISD::USUBO: return "usubo"; 324 case ISD::SMULO: return "smulo"; 325 case ISD::UMULO: return "umulo"; 326 case ISD::SUBC: return "subc"; 327 case ISD::SUBE: return "sube"; 328 case ISD::USUBO_CARRY: return "usubo_carry"; 329 case ISD::SSUBO_CARRY: return "ssubo_carry"; 330 case ISD::SHL_PARTS: return "shl_parts"; 331 case ISD::SRA_PARTS: return "sra_parts"; 332 case ISD::SRL_PARTS: return "srl_parts"; 333 334 case ISD::SADDSAT: return "saddsat"; 335 case ISD::UADDSAT: return "uaddsat"; 336 case ISD::SSUBSAT: return "ssubsat"; 337 case ISD::USUBSAT: return "usubsat"; 338 case ISD::SSHLSAT: return "sshlsat"; 339 case ISD::USHLSAT: return "ushlsat"; 340 341 case ISD::SMULFIX: return "smulfix"; 342 case ISD::SMULFIXSAT: return "smulfixsat"; 343 case ISD::UMULFIX: return "umulfix"; 344 case ISD::UMULFIXSAT: return "umulfixsat"; 345 346 case ISD::SDIVFIX: return "sdivfix"; 347 case ISD::SDIVFIXSAT: return "sdivfixsat"; 348 case ISD::UDIVFIX: return "udivfix"; 349 case ISD::UDIVFIXSAT: return "udivfixsat"; 350 351 // Conversion operators. 352 case ISD::SIGN_EXTEND: return "sign_extend"; 353 case ISD::ZERO_EXTEND: return "zero_extend"; 354 case ISD::ANY_EXTEND: return "any_extend"; 355 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 356 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg"; 357 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg"; 358 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg"; 359 case ISD::TRUNCATE: return "truncate"; 360 case ISD::FP_ROUND: return "fp_round"; 361 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; 362 case ISD::FP_EXTEND: return "fp_extend"; 363 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend"; 364 365 case ISD::SINT_TO_FP: return "sint_to_fp"; 366 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp"; 367 case ISD::UINT_TO_FP: return "uint_to_fp"; 368 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp"; 369 case ISD::FP_TO_SINT: return "fp_to_sint"; 370 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint"; 371 case ISD::FP_TO_UINT: return "fp_to_uint"; 372 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint"; 373 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat"; 374 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat"; 375 case ISD::BITCAST: return "bitcast"; 376 case ISD::ADDRSPACECAST: return "addrspacecast"; 377 case ISD::FP16_TO_FP: return "fp16_to_fp"; 378 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp"; 379 case ISD::FP_TO_FP16: return "fp_to_fp16"; 380 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16"; 381 case ISD::BF16_TO_FP: return "bf16_to_fp"; 382 case ISD::FP_TO_BF16: return "fp_to_bf16"; 383 case ISD::LROUND: return "lround"; 384 case ISD::STRICT_LROUND: return "strict_lround"; 385 case ISD::LLROUND: return "llround"; 386 case ISD::STRICT_LLROUND: return "strict_llround"; 387 case ISD::LRINT: return "lrint"; 388 case ISD::STRICT_LRINT: return "strict_lrint"; 389 case ISD::LLRINT: return "llrint"; 390 case ISD::STRICT_LLRINT: return "strict_llrint"; 391 392 // Control flow instructions 393 case ISD::BR: return "br"; 394 case ISD::BRIND: return "brind"; 395 case ISD::BR_JT: return "br_jt"; 396 case ISD::BRCOND: return "brcond"; 397 case ISD::BR_CC: return "br_cc"; 398 case ISD::CALLSEQ_START: return "callseq_start"; 399 case ISD::CALLSEQ_END: return "callseq_end"; 400 401 // EH instructions 402 case ISD::CATCHRET: return "catchret"; 403 case ISD::CLEANUPRET: return "cleanupret"; 404 405 // Other operators 406 case ISD::LOAD: return "load"; 407 case ISD::STORE: return "store"; 408 case ISD::MLOAD: return "masked_load"; 409 case ISD::MSTORE: return "masked_store"; 410 case ISD::MGATHER: return "masked_gather"; 411 case ISD::MSCATTER: return "masked_scatter"; 412 case ISD::VAARG: return "vaarg"; 413 case ISD::VACOPY: return "vacopy"; 414 case ISD::VAEND: return "vaend"; 415 case ISD::VASTART: return "vastart"; 416 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 417 case ISD::EXTRACT_ELEMENT: return "extract_element"; 418 case ISD::BUILD_PAIR: return "build_pair"; 419 case ISD::STACKSAVE: return "stacksave"; 420 case ISD::STACKRESTORE: return "stackrestore"; 421 case ISD::TRAP: return "trap"; 422 case ISD::DEBUGTRAP: return "debugtrap"; 423 case ISD::UBSANTRAP: return "ubsantrap"; 424 case ISD::LIFETIME_START: return "lifetime.start"; 425 case ISD::LIFETIME_END: return "lifetime.end"; 426 case ISD::PSEUDO_PROBE: 427 return "pseudoprobe"; 428 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 429 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 430 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 431 case ISD::FREEZE: return "freeze"; 432 case ISD::PREALLOCATED_SETUP: 433 return "call_setup"; 434 case ISD::PREALLOCATED_ARG: 435 return "call_alloc"; 436 437 // Floating point environment manipulation 438 case ISD::GET_ROUNDING: return "get_rounding"; 439 case ISD::SET_ROUNDING: return "set_rounding"; 440 case ISD::GET_FPENV: return "get_fpenv"; 441 case ISD::SET_FPENV: return "set_fpenv"; 442 case ISD::RESET_FPENV: return "reset_fpenv"; 443 case ISD::GET_FPENV_MEM: return "get_fpenv_mem"; 444 case ISD::SET_FPENV_MEM: return "set_fpenv_mem"; 445 case ISD::GET_FPMODE: return "get_fpmode"; 446 case ISD::SET_FPMODE: return "set_fpmode"; 447 case ISD::RESET_FPMODE: return "reset_fpmode"; 448 449 // Bit manipulation 450 case ISD::ABS: return "abs"; 451 case ISD::BITREVERSE: return "bitreverse"; 452 case ISD::BSWAP: return "bswap"; 453 case ISD::CTPOP: return "ctpop"; 454 case ISD::CTTZ: return "cttz"; 455 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 456 case ISD::CTLZ: return "ctlz"; 457 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 458 case ISD::PARITY: return "parity"; 459 460 // Trampolines 461 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 462 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 463 464 case ISD::CONDCODE: 465 switch (cast<CondCodeSDNode>(this)->get()) { 466 default: llvm_unreachable("Unknown setcc condition!"); 467 case ISD::SETOEQ: return "setoeq"; 468 case ISD::SETOGT: return "setogt"; 469 case ISD::SETOGE: return "setoge"; 470 case ISD::SETOLT: return "setolt"; 471 case ISD::SETOLE: return "setole"; 472 case ISD::SETONE: return "setone"; 473 474 case ISD::SETO: return "seto"; 475 case ISD::SETUO: return "setuo"; 476 case ISD::SETUEQ: return "setueq"; 477 case ISD::SETUGT: return "setugt"; 478 case ISD::SETUGE: return "setuge"; 479 case ISD::SETULT: return "setult"; 480 case ISD::SETULE: return "setule"; 481 case ISD::SETUNE: return "setune"; 482 483 case ISD::SETEQ: return "seteq"; 484 case ISD::SETGT: return "setgt"; 485 case ISD::SETGE: return "setge"; 486 case ISD::SETLT: return "setlt"; 487 case ISD::SETLE: return "setle"; 488 case ISD::SETNE: return "setne"; 489 490 case ISD::SETTRUE: return "settrue"; 491 case ISD::SETTRUE2: return "settrue2"; 492 case ISD::SETFALSE: return "setfalse"; 493 case ISD::SETFALSE2: return "setfalse2"; 494 } 495 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; 496 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd"; 497 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; 498 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul"; 499 case ISD::VECREDUCE_ADD: return "vecreduce_add"; 500 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; 501 case ISD::VECREDUCE_AND: return "vecreduce_and"; 502 case ISD::VECREDUCE_OR: return "vecreduce_or"; 503 case ISD::VECREDUCE_XOR: return "vecreduce_xor"; 504 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; 505 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; 506 case ISD::VECREDUCE_UMAX: return "vecreduce_umax"; 507 case ISD::VECREDUCE_UMIN: return "vecreduce_umin"; 508 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax"; 509 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin"; 510 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum"; 511 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum"; 512 case ISD::STACKMAP: 513 return "stackmap"; 514 case ISD::PATCHPOINT: 515 return "patchpoint"; 516 517 // Vector Predication 518#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \ 519 case ISD::SDID: \ 520 return #NAME; 521#include "llvm/IR/VPIntrinsics.def" 522 } 523} 524 525const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 526 switch (AM) { 527 default: return ""; 528 case ISD::PRE_INC: return "<pre-inc>"; 529 case ISD::PRE_DEC: return "<pre-dec>"; 530 case ISD::POST_INC: return "<post-inc>"; 531 case ISD::POST_DEC: return "<post-dec>"; 532 } 533} 534 535static Printable PrintNodeId(const SDNode &Node) { 536 return Printable([&Node](raw_ostream &OS) { 537#ifndef NDEBUG 538 OS << 't' << Node.PersistentId; 539#else 540 OS << (const void*)&Node; 541#endif 542 }); 543} 544 545// Print the MMO with more information from the SelectionDAG. 546static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 547 const MachineFunction *MF, const Module *M, 548 const MachineFrameInfo *MFI, 549 const TargetInstrInfo *TII, LLVMContext &Ctx) { 550 ModuleSlotTracker MST(M); 551 if (MF) 552 MST.incorporateFunction(MF->getFunction()); 553 SmallVector<StringRef, 0> SSNs; 554 MMO.print(OS, MST, SSNs, Ctx, MFI, TII); 555} 556 557static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 558 const SelectionDAG *G) { 559 if (G) { 560 const MachineFunction *MF = &G->getMachineFunction(); 561 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), 562 &MF->getFrameInfo(), 563 G->getSubtarget().getInstrInfo(), *G->getContext()); 564 } 565 566 LLVMContext Ctx; 567 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, 568 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); 569} 570 571#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 572LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 573 574LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { 575 print(dbgs(), G); 576 dbgs() << '\n'; 577} 578#endif 579 580void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 581 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 582 if (i) OS << ","; 583 if (getValueType(i) == MVT::Other) 584 OS << "ch"; 585 else 586 OS << getValueType(i).getEVTString(); 587 } 588} 589 590void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 591 if (getFlags().hasNoUnsignedWrap()) 592 OS << " nuw"; 593 594 if (getFlags().hasNoSignedWrap()) 595 OS << " nsw"; 596 597 if (getFlags().hasExact()) 598 OS << " exact"; 599 600 if (getFlags().hasDisjoint()) 601 OS << " disjoint"; 602 603 if (getFlags().hasNonNeg()) 604 OS << " nneg"; 605 606 if (getFlags().hasNoNaNs()) 607 OS << " nnan"; 608 609 if (getFlags().hasNoInfs()) 610 OS << " ninf"; 611 612 if (getFlags().hasNoSignedZeros()) 613 OS << " nsz"; 614 615 if (getFlags().hasAllowReciprocal()) 616 OS << " arcp"; 617 618 if (getFlags().hasAllowContract()) 619 OS << " contract"; 620 621 if (getFlags().hasApproximateFuncs()) 622 OS << " afn"; 623 624 if (getFlags().hasAllowReassociation()) 625 OS << " reassoc"; 626 627 if (getFlags().hasNoFPExcept()) 628 OS << " nofpexcept"; 629 630 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 631 if (!MN->memoperands_empty()) { 632 OS << "<"; 633 OS << "Mem:"; 634 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 635 e = MN->memoperands_end(); i != e; ++i) { 636 printMemOperand(OS, **i, G); 637 if (std::next(i) != e) 638 OS << " "; 639 } 640 OS << ">"; 641 } 642 } else if (const ShuffleVectorSDNode *SVN = 643 dyn_cast<ShuffleVectorSDNode>(this)) { 644 OS << "<"; 645 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 646 int Idx = SVN->getMaskElt(i); 647 if (i) OS << ","; 648 if (Idx < 0) 649 OS << "u"; 650 else 651 OS << Idx; 652 } 653 OS << ">"; 654 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 655 OS << '<' << CSDN->getAPIntValue() << '>'; 656 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 657 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) 658 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 659 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) 660 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 661 else { 662 OS << "<APFloat("; 663 CSDN->getValueAPF().bitcastToAPInt().print(OS, false); 664 OS << ")>"; 665 } 666 } else if (const GlobalAddressSDNode *GADN = 667 dyn_cast<GlobalAddressSDNode>(this)) { 668 int64_t offset = GADN->getOffset(); 669 OS << '<'; 670 GADN->getGlobal()->printAsOperand(OS); 671 OS << '>'; 672 if (offset > 0) 673 OS << " + " << offset; 674 else 675 OS << " " << offset; 676 if (unsigned int TF = GADN->getTargetFlags()) 677 OS << " [TF=" << TF << ']'; 678 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 679 OS << "<" << FIDN->getIndex() << ">"; 680 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 681 OS << "<" << JTDN->getIndex() << ">"; 682 if (unsigned int TF = JTDN->getTargetFlags()) 683 OS << " [TF=" << TF << ']'; 684 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 685 int offset = CP->getOffset(); 686 if (CP->isMachineConstantPoolEntry()) 687 OS << "<" << *CP->getMachineCPVal() << ">"; 688 else 689 OS << "<" << *CP->getConstVal() << ">"; 690 if (offset > 0) 691 OS << " + " << offset; 692 else 693 OS << " " << offset; 694 if (unsigned int TF = CP->getTargetFlags()) 695 OS << " [TF=" << TF << ']'; 696 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) { 697 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">"; 698 if (unsigned TF = TI->getTargetFlags()) 699 OS << " [TF=" << TF << ']'; 700 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 701 OS << "<"; 702 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 703 if (LBB) 704 OS << LBB->getName() << " "; 705 OS << (const void*)BBDN->getBasicBlock() << ">"; 706 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 707 OS << ' ' << printReg(R->getReg(), 708 G ? G->getSubtarget().getRegisterInfo() : nullptr); 709 } else if (const ExternalSymbolSDNode *ES = 710 dyn_cast<ExternalSymbolSDNode>(this)) { 711 OS << "'" << ES->getSymbol() << "'"; 712 if (unsigned int TF = ES->getTargetFlags()) 713 OS << " [TF=" << TF << ']'; 714 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 715 if (M->getValue()) 716 OS << "<" << M->getValue() << ">"; 717 else 718 OS << "<null>"; 719 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 720 if (MD->getMD()) 721 OS << "<" << MD->getMD() << ">"; 722 else 723 OS << "<null>"; 724 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 725 OS << ":" << N->getVT(); 726 } 727 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 728 OS << "<"; 729 730 printMemOperand(OS, *LD->getMemOperand(), G); 731 732 bool doExt = true; 733 switch (LD->getExtensionType()) { 734 default: doExt = false; break; 735 case ISD::EXTLOAD: OS << ", anyext"; break; 736 case ISD::SEXTLOAD: OS << ", sext"; break; 737 case ISD::ZEXTLOAD: OS << ", zext"; break; 738 } 739 if (doExt) 740 OS << " from " << LD->getMemoryVT(); 741 742 const char *AM = getIndexedModeName(LD->getAddressingMode()); 743 if (*AM) 744 OS << ", " << AM; 745 746 OS << ">"; 747 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 748 OS << "<"; 749 printMemOperand(OS, *ST->getMemOperand(), G); 750 751 if (ST->isTruncatingStore()) 752 OS << ", trunc to " << ST->getMemoryVT(); 753 754 const char *AM = getIndexedModeName(ST->getAddressingMode()); 755 if (*AM) 756 OS << ", " << AM; 757 758 OS << ">"; 759 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) { 760 OS << "<"; 761 762 printMemOperand(OS, *MLd->getMemOperand(), G); 763 764 bool doExt = true; 765 switch (MLd->getExtensionType()) { 766 default: doExt = false; break; 767 case ISD::EXTLOAD: OS << ", anyext"; break; 768 case ISD::SEXTLOAD: OS << ", sext"; break; 769 case ISD::ZEXTLOAD: OS << ", zext"; break; 770 } 771 if (doExt) 772 OS << " from " << MLd->getMemoryVT(); 773 774 const char *AM = getIndexedModeName(MLd->getAddressingMode()); 775 if (*AM) 776 OS << ", " << AM; 777 778 if (MLd->isExpandingLoad()) 779 OS << ", expanding"; 780 781 OS << ">"; 782 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) { 783 OS << "<"; 784 printMemOperand(OS, *MSt->getMemOperand(), G); 785 786 if (MSt->isTruncatingStore()) 787 OS << ", trunc to " << MSt->getMemoryVT(); 788 789 const char *AM = getIndexedModeName(MSt->getAddressingMode()); 790 if (*AM) 791 OS << ", " << AM; 792 793 if (MSt->isCompressingStore()) 794 OS << ", compressing"; 795 796 OS << ">"; 797 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) { 798 OS << "<"; 799 printMemOperand(OS, *MGather->getMemOperand(), G); 800 801 bool doExt = true; 802 switch (MGather->getExtensionType()) { 803 default: doExt = false; break; 804 case ISD::EXTLOAD: OS << ", anyext"; break; 805 case ISD::SEXTLOAD: OS << ", sext"; break; 806 case ISD::ZEXTLOAD: OS << ", zext"; break; 807 } 808 if (doExt) 809 OS << " from " << MGather->getMemoryVT(); 810 811 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned"; 812 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; 813 OS << ", " << Signed << " " << Scaled << " offset"; 814 815 OS << ">"; 816 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) { 817 OS << "<"; 818 printMemOperand(OS, *MScatter->getMemOperand(), G); 819 820 if (MScatter->isTruncatingStore()) 821 OS << ", trunc to " << MScatter->getMemoryVT(); 822 823 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned"; 824 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; 825 OS << ", " << Signed << " " << Scaled << " offset"; 826 827 OS << ">"; 828 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) { 829 OS << "<"; 830 printMemOperand(OS, *M->getMemOperand(), G); 831 OS << ">"; 832 } else if (const BlockAddressSDNode *BA = 833 dyn_cast<BlockAddressSDNode>(this)) { 834 int64_t offset = BA->getOffset(); 835 OS << "<"; 836 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false); 837 OS << ", "; 838 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false); 839 OS << ">"; 840 if (offset > 0) 841 OS << " + " << offset; 842 else 843 OS << " " << offset; 844 if (unsigned int TF = BA->getTargetFlags()) 845 OS << " [TF=" << TF << ']'; 846 } else if (const AddrSpaceCastSDNode *ASC = 847 dyn_cast<AddrSpaceCastSDNode>(this)) { 848 OS << '[' 849 << ASC->getSrcAddressSpace() 850 << " -> " 851 << ASC->getDestAddressSpace() 852 << ']'; 853 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) { 854 if (LN->hasOffset()) 855 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">"; 856 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) { 857 OS << '<' << AA->getAlign().value() << '>'; 858 } 859 860 if (VerboseDAGDumping) { 861 if (unsigned Order = getIROrder()) 862 OS << " [ORD=" << Order << ']'; 863 864 if (getNodeId() != -1) 865 OS << " [ID=" << getNodeId() << ']'; 866 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) 867 OS << " # D:" << isDivergent(); 868 869 if (G && !G->GetDbgValues(this).empty()) { 870 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']'; 871 for (SDDbgValue *Dbg : G->GetDbgValues(this)) 872 if (!Dbg->isInvalidated()) 873 Dbg->print(OS); 874 } else if (getHasDebugValue()) 875 OS << " [NoOfDbgValues>0]"; 876 877 if (const auto *MD = G ? G->getPCSections(this) : nullptr) { 878 OS << " [pcsections "; 879 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent()); 880 OS << ']'; 881 } 882 } 883} 884 885LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const { 886 OS << " DbgVal(Order=" << getOrder() << ')'; 887 if (isInvalidated()) 888 OS << "(Invalidated)"; 889 if (isEmitted()) 890 OS << "(Emitted)"; 891 OS << "("; 892 bool Comma = false; 893 for (const SDDbgOperand &Op : getLocationOps()) { 894 if (Comma) 895 OS << ", "; 896 switch (Op.getKind()) { 897 case SDDbgOperand::SDNODE: 898 if (Op.getSDNode()) 899 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo(); 900 else 901 OS << "SDNODE"; 902 break; 903 case SDDbgOperand::CONST: 904 OS << "CONST"; 905 break; 906 case SDDbgOperand::FRAMEIX: 907 OS << "FRAMEIX=" << Op.getFrameIx(); 908 break; 909 case SDDbgOperand::VREG: 910 OS << "VREG=" << Op.getVReg(); 911 break; 912 } 913 Comma = true; 914 } 915 OS << ")"; 916 if (isIndirect()) OS << "(Indirect)"; 917 if (isVariadic()) 918 OS << "(Variadic)"; 919 OS << ":\"" << Var->getName() << '"'; 920#ifndef NDEBUG 921 if (Expr->getNumElements()) 922 Expr->dump(); 923#endif 924} 925 926#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 927LLVM_DUMP_METHOD void SDDbgValue::dump() const { 928 if (isInvalidated()) 929 return; 930 print(dbgs()); 931 dbgs() << "\n"; 932} 933#endif 934 935/// Return true if this node is so simple that we should just print it inline 936/// if it appears as an operand. 937static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) { 938 // Avoid lots of cluttering when inline printing nodes with associated 939 // DbgValues in verbose mode. 940 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty()) 941 return false; 942 if (Node.getOpcode() == ISD::EntryToken) 943 return false; 944 return Node.getNumOperands() == 0; 945} 946 947#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 948static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 949 for (const SDValue &Op : N->op_values()) { 950 if (shouldPrintInline(*Op.getNode(), G)) 951 continue; 952 if (Op.getNode()->hasOneUse()) 953 DumpNodes(Op.getNode(), indent+2, G); 954 } 955 956 dbgs().indent(indent); 957 N->dump(G); 958} 959 960LLVM_DUMP_METHOD void SelectionDAG::dump() const { 961 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; 962 963 for (const SDNode &N : allnodes()) { 964 if (!N.hasOneUse() && &N != getRoot().getNode() && 965 (!shouldPrintInline(N, this) || N.use_empty())) 966 DumpNodes(&N, 2, this); 967 } 968 969 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 970 dbgs() << "\n"; 971 972 if (VerboseDAGDumping) { 973 if (DbgBegin() != DbgEnd()) 974 dbgs() << "SDDbgValues:\n"; 975 for (auto *Dbg : make_range(DbgBegin(), DbgEnd())) 976 Dbg->dump(); 977 if (ByvalParmDbgBegin() != ByvalParmDbgEnd()) 978 dbgs() << "Byval SDDbgValues:\n"; 979 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd())) 980 Dbg->dump(); 981 } 982 dbgs() << "\n"; 983} 984#endif 985 986void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 987 OS << PrintNodeId(*this) << ": "; 988 print_types(OS, G); 989 OS << " = " << getOperationName(G); 990 print_details(OS, G); 991} 992 993static bool printOperand(raw_ostream &OS, const SelectionDAG *G, 994 const SDValue Value) { 995 if (!Value.getNode()) { 996 OS << "<null>"; 997 return false; 998 } 999 1000 if (shouldPrintInline(*Value.getNode(), G)) { 1001 OS << Value->getOperationName(G) << ':'; 1002 Value->print_types(OS, G); 1003 Value->print_details(OS, G); 1004 return true; 1005 } 1006 1007 OS << PrintNodeId(*Value.getNode()); 1008 if (unsigned RN = Value.getResNo()) 1009 OS << ':' << RN; 1010 return false; 1011} 1012 1013#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1014using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>; 1015 1016static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 1017 const SelectionDAG *G, VisitedSDNodeSet &once) { 1018 if (!once.insert(N).second) // If we've been here before, return now. 1019 return; 1020 1021 // Dump the current SDNode, but don't end the line yet. 1022 OS.indent(indent); 1023 N->printr(OS, G); 1024 1025 // Having printed this SDNode, walk the children: 1026 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 1027 if (i) OS << ","; 1028 OS << " "; 1029 1030 const SDValue Op = N->getOperand(i); 1031 bool printedInline = printOperand(OS, G, Op); 1032 if (printedInline) 1033 once.insert(Op.getNode()); 1034 } 1035 1036 OS << "\n"; 1037 1038 // Dump children that have grandchildren on their own line(s). 1039 for (const SDValue &Op : N->op_values()) 1040 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 1041} 1042 1043LLVM_DUMP_METHOD void SDNode::dumpr() const { 1044 VisitedSDNodeSet once; 1045 DumpNodesr(dbgs(), this, 0, nullptr, once); 1046} 1047 1048LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const { 1049 VisitedSDNodeSet once; 1050 DumpNodesr(dbgs(), this, 0, G, once); 1051} 1052#endif 1053 1054static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 1055 const SelectionDAG *G, unsigned depth, 1056 unsigned indent) { 1057 if (depth == 0) 1058 return; 1059 1060 OS.indent(indent); 1061 1062 N->print(OS, G); 1063 1064 for (const SDValue &Op : N->op_values()) { 1065 // Don't follow chain operands. 1066 if (Op.getValueType() == MVT::Other) 1067 continue; 1068 OS << '\n'; 1069 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2); 1070 } 1071} 1072 1073void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 1074 unsigned depth) const { 1075 printrWithDepthHelper(OS, this, G, depth, 0); 1076} 1077 1078void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 1079 // Don't print impossibly deep things. 1080 printrWithDepth(OS, G, 10); 1081} 1082 1083#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1084LLVM_DUMP_METHOD 1085void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 1086 printrWithDepth(dbgs(), G, depth); 1087} 1088 1089LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const { 1090 // Don't print impossibly deep things. 1091 dumprWithDepth(G, 10); 1092} 1093#endif 1094 1095void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 1096 printr(OS, G); 1097 // Under VerboseDAGDumping divergence will be printed always. 1098 if (isDivergent() && !VerboseDAGDumping) 1099 OS << " # D:1"; 1100 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1101 if (i) OS << ", "; else OS << " "; 1102 printOperand(OS, G, getOperand(i)); 1103 } 1104 if (DebugLoc DL = getDebugLoc()) { 1105 OS << ", "; 1106 DL.print(OS); 1107 } 1108} 1109