1//===-- llvm/CodeGen/TargetFrameLowering.h ----------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Interface to describe the layout of a stack frame on the target machine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CODEGEN_TARGETFRAMELOWERING_H
14#define LLVM_CODEGEN_TARGETFRAMELOWERING_H
15
16#include "llvm/ADT/BitVector.h"
17#include "llvm/CodeGen/MachineBasicBlock.h"
18#include "llvm/Support/TypeSize.h"
19#include <vector>
20
21namespace llvm {
22  class BitVector;
23  class CalleeSavedInfo;
24  class MachineFunction;
25  class RegScavenger;
26
27namespace TargetStackID {
28enum Value {
29  Default = 0,
30  SGPRSpill = 1,
31  ScalableVector = 2,
32  WasmLocal = 3,
33  NoAlloc = 255
34};
35}
36
37/// Information about stack frame layout on the target.  It holds the direction
38/// of stack growth, the known stack alignment on entry to each function, and
39/// the offset to the locals area.
40///
41/// The offset to the local area is the offset from the stack pointer on
42/// function entry to the first location where function data (local variables,
43/// spill locations) can be stored.
44class TargetFrameLowering {
45public:
46  enum StackDirection {
47    StackGrowsUp,        // Adding to the stack increases the stack address
48    StackGrowsDown       // Adding to the stack decreases the stack address
49  };
50
51  // Maps a callee saved register to a stack slot with a fixed offset.
52  struct SpillSlot {
53    unsigned Reg;
54    int Offset; // Offset relative to stack pointer on function entry.
55  };
56
57  struct DwarfFrameBase {
58    // The frame base may be either a register (the default), the CFA with an
59    // offset, or a WebAssembly-specific location description.
60    enum FrameBaseKind { Register, CFA, WasmFrameBase } Kind;
61    struct WasmFrameBase {
62      unsigned Kind; // Wasm local, global, or value stack
63      unsigned Index;
64    };
65    union {
66      // Used with FrameBaseKind::Register.
67      unsigned Reg;
68      // Used with FrameBaseKind::CFA.
69      int Offset;
70      struct WasmFrameBase WasmLoc;
71    } Location;
72  };
73
74private:
75  StackDirection StackDir;
76  Align StackAlignment;
77  Align TransientStackAlignment;
78  int LocalAreaOffset;
79  bool StackRealignable;
80public:
81  TargetFrameLowering(StackDirection D, Align StackAl, int LAO,
82                      Align TransAl = Align(1), bool StackReal = true)
83      : StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
84        LocalAreaOffset(LAO), StackRealignable(StackReal) {}
85
86  virtual ~TargetFrameLowering();
87
88  // These methods return information that describes the abstract stack layout
89  // of the target machine.
90
91  /// getStackGrowthDirection - Return the direction the stack grows
92  ///
93  StackDirection getStackGrowthDirection() const { return StackDir; }
94
95  /// getStackAlignment - This method returns the number of bytes to which the
96  /// stack pointer must be aligned on entry to a function.  Typically, this
97  /// is the largest alignment for any data object in the target.
98  ///
99  unsigned getStackAlignment() const { return StackAlignment.value(); }
100  /// getStackAlignment - This method returns the number of bytes to which the
101  /// stack pointer must be aligned on entry to a function.  Typically, this
102  /// is the largest alignment for any data object in the target.
103  ///
104  Align getStackAlign() const { return StackAlignment; }
105
106  /// getStackThreshold - Return the maximum stack size
107  ///
108  virtual uint64_t getStackThreshold() const { return UINT_MAX; }
109
110  /// alignSPAdjust - This method aligns the stack adjustment to the correct
111  /// alignment.
112  ///
113  int alignSPAdjust(int SPAdj) const {
114    if (SPAdj < 0) {
115      SPAdj = -alignTo(-SPAdj, StackAlignment);
116    } else {
117      SPAdj = alignTo(SPAdj, StackAlignment);
118    }
119    return SPAdj;
120  }
121
122  /// getTransientStackAlignment - This method returns the number of bytes to
123  /// which the stack pointer must be aligned at all times, even between
124  /// calls.
125  ///
126  Align getTransientStackAlign() const { return TransientStackAlignment; }
127
128  /// isStackRealignable - This method returns whether the stack can be
129  /// realigned.
130  bool isStackRealignable() const {
131    return StackRealignable;
132  }
133
134  /// This method returns whether or not it is safe for an object with the
135  /// given stack id to be bundled into the local area.
136  virtual bool isStackIdSafeForLocalArea(unsigned StackId) const {
137    return true;
138  }
139
140  /// getOffsetOfLocalArea - This method returns the offset of the local area
141  /// from the stack pointer on entrance to a function.
142  ///
143  int getOffsetOfLocalArea() const { return LocalAreaOffset; }
144
145  /// Control the placement of special register scavenging spill slots when
146  /// allocating a stack frame.
147  ///
148  /// If this returns true, the frame indexes used by the RegScavenger will be
149  /// allocated closest to the incoming stack pointer.
150  virtual bool allocateScavengingFrameIndexesNearIncomingSP(
151    const MachineFunction &MF) const;
152
153  /// assignCalleeSavedSpillSlots - Allows target to override spill slot
154  /// assignment logic.  If implemented, assignCalleeSavedSpillSlots() should
155  /// assign frame slots to all CSI entries and return true.  If this method
156  /// returns false, spill slots will be assigned using generic implementation.
157  /// assignCalleeSavedSpillSlots() may add, delete or rearrange elements of
158  /// CSI.
159  virtual bool assignCalleeSavedSpillSlots(MachineFunction &MF,
160                                           const TargetRegisterInfo *TRI,
161                                           std::vector<CalleeSavedInfo> &CSI,
162                                           unsigned &MinCSFrameIndex,
163                                           unsigned &MaxCSFrameIndex) const {
164    return assignCalleeSavedSpillSlots(MF, TRI, CSI);
165  }
166
167  virtual bool
168  assignCalleeSavedSpillSlots(MachineFunction &MF,
169                              const TargetRegisterInfo *TRI,
170                              std::vector<CalleeSavedInfo> &CSI) const {
171    return false;
172  }
173
174  /// getCalleeSavedSpillSlots - This method returns a pointer to an array of
175  /// pairs, that contains an entry for each callee saved register that must be
176  /// spilled to a particular stack location if it is spilled.
177  ///
178  /// Each entry in this array contains a <register,offset> pair, indicating the
179  /// fixed offset from the incoming stack pointer that each register should be
180  /// spilled at. If a register is not listed here, the code generator is
181  /// allowed to spill it anywhere it chooses.
182  ///
183  virtual const SpillSlot *
184  getCalleeSavedSpillSlots(unsigned &NumEntries) const {
185    NumEntries = 0;
186    return nullptr;
187  }
188
189  /// targetHandlesStackFrameRounding - Returns true if the target is
190  /// responsible for rounding up the stack frame (probably at emitPrologue
191  /// time).
192  virtual bool targetHandlesStackFrameRounding() const {
193    return false;
194  }
195
196  /// Returns true if the target will correctly handle shrink wrapping.
197  virtual bool enableShrinkWrapping(const MachineFunction &MF) const {
198    return false;
199  }
200
201  /// Returns true if the stack slot holes in the fixed and callee-save stack
202  /// area should be used when allocating other stack locations to reduce stack
203  /// size.
204  virtual bool enableStackSlotScavenging(const MachineFunction &MF) const {
205    return false;
206  }
207
208  /// Returns true if the target can safely skip saving callee-saved registers
209  /// for noreturn nounwind functions.
210  virtual bool enableCalleeSaveSkip(const MachineFunction &MF) const;
211
212  /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
213  /// the function.
214  virtual void emitPrologue(MachineFunction &MF,
215                            MachineBasicBlock &MBB) const = 0;
216  virtual void emitEpilogue(MachineFunction &MF,
217                            MachineBasicBlock &MBB) const = 0;
218
219  /// emitZeroCallUsedRegs - Zeros out call used registers.
220  virtual void emitZeroCallUsedRegs(BitVector RegsToZero,
221                                    MachineBasicBlock &MBB) const {}
222
223  /// With basic block sections, emit callee saved frame moves for basic blocks
224  /// that are in a different section.
225  virtual void
226  emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB,
227                                   MachineBasicBlock::iterator MBBI) const {}
228
229  /// Returns true if we may need to fix the unwind information for the
230  /// function.
231  virtual bool enableCFIFixup(MachineFunction &MF) const;
232
233  /// Emit CFI instructions that recreate the state of the unwind information
234  /// upon fucntion entry.
235  virtual void resetCFIToInitialState(MachineBasicBlock &MBB) const {}
236
237  /// Replace a StackProbe stub (if any) with the actual probe code inline
238  virtual void inlineStackProbe(MachineFunction &MF,
239                                MachineBasicBlock &PrologueMBB) const {}
240
241  /// Does the stack probe function call return with a modified stack pointer?
242  virtual bool stackProbeFunctionModifiesSP() const { return false; }
243
244  /// Adjust the prologue to have the function use segmented stacks. This works
245  /// by adding a check even before the "normal" function prologue.
246  virtual void adjustForSegmentedStacks(MachineFunction &MF,
247                                        MachineBasicBlock &PrologueMBB) const {}
248
249  /// Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in
250  /// the assembly prologue to explicitly handle the stack.
251  virtual void adjustForHiPEPrologue(MachineFunction &MF,
252                                     MachineBasicBlock &PrologueMBB) const {}
253
254  /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee
255  /// saved registers and returns true if it isn't possible / profitable to do
256  /// so by issuing a series of store instructions via
257  /// storeRegToStackSlot(). Returns false otherwise.
258  virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
259                                         MachineBasicBlock::iterator MI,
260                                         ArrayRef<CalleeSavedInfo> CSI,
261                                         const TargetRegisterInfo *TRI) const {
262    return false;
263  }
264
265  /// restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee
266  /// saved registers and returns true if it isn't possible / profitable to do
267  /// so by issuing a series of load instructions via loadRegToStackSlot().
268  /// If it returns true, and any of the registers in CSI is not restored,
269  /// it sets the corresponding Restored flag in CSI to false.
270  /// Returns false otherwise.
271  virtual bool
272  restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
273                              MachineBasicBlock::iterator MI,
274                              MutableArrayRef<CalleeSavedInfo> CSI,
275                              const TargetRegisterInfo *TRI) const {
276    return false;
277  }
278
279  /// Return true if the target wants to keep the frame pointer regardless of
280  /// the function attribute "frame-pointer".
281  virtual bool keepFramePointer(const MachineFunction &MF) const {
282    return false;
283  }
284
285  /// hasFP - Return true if the specified function should have a dedicated
286  /// frame pointer register. For most targets this is true only if the function
287  /// has variable sized allocas or if frame pointer elimination is disabled.
288  virtual bool hasFP(const MachineFunction &MF) const = 0;
289
290  /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
291  /// not required, we reserve argument space for call sites in the function
292  /// immediately on entry to the current function. This eliminates the need for
293  /// add/sub sp brackets around call sites. Returns true if the call frame is
294  /// included as part of the stack frame.
295  virtual bool hasReservedCallFrame(const MachineFunction &MF) const {
296    return !hasFP(MF);
297  }
298
299  /// canSimplifyCallFramePseudos - When possible, it's best to simplify the
300  /// call frame pseudo ops before doing frame index elimination. This is
301  /// possible only when frame index references between the pseudos won't
302  /// need adjusting for the call frame adjustments. Normally, that's true
303  /// if the function has a reserved call frame or a frame pointer. Some
304  /// targets (Thumb2, for example) may have more complicated criteria,
305  /// however, and can override this behavior.
306  virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const {
307    return hasReservedCallFrame(MF) || hasFP(MF);
308  }
309
310  // needsFrameIndexResolution - Do we need to perform FI resolution for
311  // this function. Normally, this is required only when the function
312  // has any stack objects. However, targets may want to override this.
313  virtual bool needsFrameIndexResolution(const MachineFunction &MF) const;
314
315  /// getFrameIndexReference - This method should return the base register
316  /// and offset used to reference a frame index location. The offset is
317  /// returned directly, and the base register is returned via FrameReg.
318  virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
319                                             Register &FrameReg) const;
320
321  /// Same as \c getFrameIndexReference, except that the stack pointer (as
322  /// opposed to the frame pointer) will be the preferred value for \p
323  /// FrameReg. This is generally used for emitting statepoint or EH tables that
324  /// use offsets from RSP.  If \p IgnoreSPUpdates is true, the returned
325  /// offset is only guaranteed to be valid with respect to the value of SP at
326  /// the end of the prologue.
327  virtual StackOffset
328  getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
329                                 Register &FrameReg,
330                                 bool IgnoreSPUpdates) const {
331    // Always safe to dispatch to getFrameIndexReference.
332    return getFrameIndexReference(MF, FI, FrameReg);
333  }
334
335  /// getNonLocalFrameIndexReference - This method returns the offset used to
336  /// reference a frame index location. The offset can be from either FP/BP/SP
337  /// based on which base register is returned by llvm.localaddress.
338  virtual StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF,
339                                                     int FI) const {
340    // By default, dispatch to getFrameIndexReference. Interested targets can
341    // override this.
342    Register FrameReg;
343    return getFrameIndexReference(MF, FI, FrameReg);
344  }
345
346  /// Returns the callee-saved registers as computed by determineCalleeSaves
347  /// in the BitVector \p SavedRegs.
348  virtual void getCalleeSaves(const MachineFunction &MF,
349                                  BitVector &SavedRegs) const;
350
351  /// This method determines which of the registers reported by
352  /// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved.
353  /// The default implementation checks populates the \p SavedRegs bitset with
354  /// all registers which are modified in the function, targets may override
355  /// this function to save additional registers.
356  /// This method also sets up the register scavenger ensuring there is a free
357  /// register or a frameindex available.
358  /// This method should not be called by any passes outside of PEI, because
359  /// it may change state passed in by \p MF and \p RS. The preferred
360  /// interface outside PEI is getCalleeSaves.
361  virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
362                                    RegScavenger *RS = nullptr) const;
363
364  /// processFunctionBeforeFrameFinalized - This method is called immediately
365  /// before the specified function's frame layout (MF.getFrameInfo()) is
366  /// finalized.  Once the frame is finalized, MO_FrameIndex operands are
367  /// replaced with direct constants.  This method is optional.
368  ///
369  virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF,
370                                             RegScavenger *RS = nullptr) const {
371  }
372
373  /// processFunctionBeforeFrameIndicesReplaced - This method is called
374  /// immediately before MO_FrameIndex operands are eliminated, but after the
375  /// frame is finalized. This method is optional.
376  virtual void
377  processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF,
378                                            RegScavenger *RS = nullptr) const {}
379
380  virtual unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const {
381    report_fatal_error("WinEH not implemented for this target");
382  }
383
384  /// This method is called during prolog/epilog code insertion to eliminate
385  /// call frame setup and destroy pseudo instructions (but only if the Target
386  /// is using them).  It is responsible for eliminating these instructions,
387  /// replacing them with concrete instructions.  This method need only be
388  /// implemented if using call frame setup/destroy pseudo instructions.
389  /// Returns an iterator pointing to the instruction after the replaced one.
390  virtual MachineBasicBlock::iterator
391  eliminateCallFramePseudoInstr(MachineFunction &MF,
392                                MachineBasicBlock &MBB,
393                                MachineBasicBlock::iterator MI) const {
394    llvm_unreachable("Call Frame Pseudo Instructions do not exist on this "
395                     "target!");
396  }
397
398
399  /// Order the symbols in the local stack frame.
400  /// The list of objects that we want to order is in \p objectsToAllocate as
401  /// indices into the MachineFrameInfo. The array can be reordered in any way
402  /// upon return. The contents of the array, however, may not be modified (i.e.
403  /// only their order may be changed).
404  /// By default, just maintain the original order.
405  virtual void
406  orderFrameObjects(const MachineFunction &MF,
407                    SmallVectorImpl<int> &objectsToAllocate) const {
408  }
409
410  /// Check whether or not the given \p MBB can be used as a prologue
411  /// for the target.
412  /// The prologue will be inserted first in this basic block.
413  /// This method is used by the shrink-wrapping pass to decide if
414  /// \p MBB will be correctly handled by the target.
415  /// As soon as the target enable shrink-wrapping without overriding
416  /// this method, we assume that each basic block is a valid
417  /// prologue.
418  virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const {
419    return true;
420  }
421
422  /// Check whether or not the given \p MBB can be used as a epilogue
423  /// for the target.
424  /// The epilogue will be inserted before the first terminator of that block.
425  /// This method is used by the shrink-wrapping pass to decide if
426  /// \p MBB will be correctly handled by the target.
427  /// As soon as the target enable shrink-wrapping without overriding
428  /// this method, we assume that each basic block is a valid
429  /// epilogue.
430  virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const {
431    return true;
432  }
433
434  /// Returns the StackID that scalable vectors should be associated with.
435  virtual TargetStackID::Value getStackIDForScalableVectors() const {
436    return TargetStackID::Default;
437  }
438
439  virtual bool isSupportedStackID(TargetStackID::Value ID) const {
440    switch (ID) {
441    default:
442      return false;
443    case TargetStackID::Default:
444    case TargetStackID::NoAlloc:
445      return true;
446    }
447  }
448
449  /// Check if given function is safe for not having callee saved registers.
450  /// This is used when interprocedural register allocation is enabled.
451  static bool isSafeForNoCSROpt(const Function &F);
452
453  /// Check if the no-CSR optimisation is profitable for the given function.
454  virtual bool isProfitableForNoCSROpt(const Function &F) const {
455    return true;
456  }
457
458  /// Return initial CFA offset value i.e. the one valid at the beginning of the
459  /// function (before any stack operations).
460  virtual int getInitialCFAOffset(const MachineFunction &MF) const;
461
462  /// Return initial CFA register value i.e. the one valid at the beginning of
463  /// the function (before any stack operations).
464  virtual Register getInitialCFARegister(const MachineFunction &MF) const;
465
466  /// Return the frame base information to be encoded in the DWARF subprogram
467  /// debug info.
468  virtual DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const;
469};
470
471} // End llvm namespace
472
473#endif
474