1//===-- RegisterContextPOSIXCore_powerpc.cpp ------------------------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9#include "RegisterContextPOSIXCore_powerpc.h" 10 11#include "lldb/Target/Thread.h" 12#include "lldb/Utility/DataBufferHeap.h" 13#include "lldb/Utility/RegisterValue.h" 14 15#include <memory> 16 17using namespace lldb_private; 18 19RegisterContextCorePOSIX_powerpc::RegisterContextCorePOSIX_powerpc( 20 Thread &thread, RegisterInfoInterface *register_info, 21 const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes) 22 : RegisterContextPOSIX_powerpc(thread, 0, register_info) { 23 m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(), 24 gpregset.GetByteSize()); 25 m_gpr.SetData(m_gpr_buffer); 26 m_gpr.SetByteOrder(gpregset.GetByteOrder()); 27 28 ArchSpec arch = register_info->GetTargetArchitecture(); 29 DataExtractor fpregset = getRegset(notes, arch.GetTriple(), FPR_Desc); 30 m_fpr_buffer = std::make_shared<DataBufferHeap>(fpregset.GetDataStart(), 31 fpregset.GetByteSize()); 32 m_fpr.SetData(m_fpr_buffer); 33 m_fpr.SetByteOrder(fpregset.GetByteOrder()); 34 35 DataExtractor vregset = getRegset(notes, arch.GetTriple(), PPC_VMX_Desc); 36 m_vec_buffer = std::make_shared<DataBufferHeap>(vregset.GetDataStart(), 37 vregset.GetByteSize()); 38 m_vec.SetData(m_vec_buffer); 39 m_vec.SetByteOrder(vregset.GetByteOrder()); 40} 41 42RegisterContextCorePOSIX_powerpc::~RegisterContextCorePOSIX_powerpc() = default; 43 44bool RegisterContextCorePOSIX_powerpc::ReadGPR() { return true; } 45 46bool RegisterContextCorePOSIX_powerpc::ReadFPR() { return true; } 47 48bool RegisterContextCorePOSIX_powerpc::ReadVMX() { return true; } 49 50bool RegisterContextCorePOSIX_powerpc::WriteGPR() { 51 assert(0); 52 return false; 53} 54 55bool RegisterContextCorePOSIX_powerpc::WriteFPR() { 56 assert(0); 57 return false; 58} 59 60bool RegisterContextCorePOSIX_powerpc::WriteVMX() { 61 assert(0); 62 return false; 63} 64 65bool RegisterContextCorePOSIX_powerpc::ReadRegister( 66 const RegisterInfo *reg_info, RegisterValue &value) { 67 lldb::offset_t offset = reg_info->byte_offset; 68 if (IsFPR(reg_info->kinds[lldb::eRegisterKindLLDB])) { 69 uint64_t v = m_fpr.GetMaxU64(&offset, reg_info->byte_size); 70 if (offset == reg_info->byte_offset + reg_info->byte_size) { 71 value = v; 72 return true; 73 } 74 } else if (IsVMX(reg_info->kinds[lldb::eRegisterKindLLDB])) { 75 uint32_t v[4]; 76 offset = m_vec.CopyData(offset, reg_info->byte_size, &v); 77 if (offset == reg_info->byte_size) { 78 value.SetBytes(v, reg_info->byte_size, m_vec.GetByteOrder()); 79 return true; 80 } 81 } else { 82 uint64_t v = m_gpr.GetMaxU64(&offset, reg_info->byte_size); 83 if (offset == reg_info->byte_offset + reg_info->byte_size) { 84 if (reg_info->byte_size < sizeof(v)) 85 value = (uint32_t)v; 86 else 87 value = v; 88 return true; 89 } 90 } 91 return false; 92} 93 94bool RegisterContextCorePOSIX_powerpc::ReadAllRegisterValues( 95 lldb::WritableDataBufferSP &data_sp) { 96 return false; 97} 98 99bool RegisterContextCorePOSIX_powerpc::WriteRegister( 100 const RegisterInfo *reg_info, const RegisterValue &value) { 101 return false; 102} 103 104bool RegisterContextCorePOSIX_powerpc::WriteAllRegisterValues( 105 const lldb::DataBufferSP &data_sp) { 106 return false; 107} 108 109bool RegisterContextCorePOSIX_powerpc::HardwareSingleStep(bool enable) { 110 return false; 111} 112