1/****************************************************************************** 2 * arch-ia64/hypervisor-if.h 3 * 4 * Guest OS interface to IA64 Xen. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 */ 25 26#include "xen.h" 27 28#ifndef __HYPERVISOR_IF_IA64_H__ 29#define __HYPERVISOR_IF_IA64_H__ 30 31#if !defined(__GNUC__) || defined(__STRICT_ANSI__) 32#error "Anonymous structs/unions are a GNU extension." 33#endif 34 35/* Structural guest handles introduced in 0x00030201. */ 36#if __XEN_INTERFACE_VERSION__ >= 0x00030201 37#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 38 typedef struct { type *p; } __guest_handle_ ## name 39#else 40#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 41 typedef type * __guest_handle_ ## name 42#endif 43 44#define __DEFINE_XEN_GUEST_HANDLE(name, type) \ 45 ___DEFINE_XEN_GUEST_HANDLE(name, type); \ 46 ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) 47 48#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) 49#define XEN_GUEST_HANDLE(name) __guest_handle_ ## name 50#define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name) 51#define uint64_aligned_t uint64_t 52#define set_xen_guest_handle(hnd, val) do { (hnd).p = val; } while (0) 53#ifdef __XEN_TOOLS__ 54#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0) 55#endif 56 57#ifndef __ASSEMBLY__ 58typedef unsigned long xen_pfn_t; 59#define PRI_xen_pfn "lx" 60#endif 61 62/* Arch specific VIRQs definition */ 63#define VIRQ_ITC VIRQ_ARCH_0 /* V. Virtual itc timer */ 64#define VIRQ_MCA_CMC VIRQ_ARCH_1 /* MCA cmc interrupt */ 65#define VIRQ_MCA_CPE VIRQ_ARCH_2 /* MCA cpe interrupt */ 66 67/* Maximum number of virtual CPUs in multi-processor guests. */ 68/* WARNING: before changing this, check that shared_info fits on a page */ 69#define MAX_VIRT_CPUS 64 70 71/* IO ports location for PV. */ 72#define IO_PORTS_PADDR 0x00000ffffc000000UL 73#define IO_PORTS_SIZE 0x0000000004000000UL 74 75#ifndef __ASSEMBLY__ 76 77typedef unsigned long xen_ulong_t; 78 79#ifdef __XEN_TOOLS__ 80#define XEN_PAGE_SIZE XC_PAGE_SIZE 81#else 82#define XEN_PAGE_SIZE PAGE_SIZE 83#endif 84 85#define INVALID_MFN (~0UL) 86 87struct pt_fpreg { 88 union { 89 unsigned long bits[2]; 90 long double __dummy; /* force 16-byte alignment */ 91 } u; 92}; 93 94union vac { 95 unsigned long value; 96 struct { 97 int a_int:1; 98 int a_from_int_cr:1; 99 int a_to_int_cr:1; 100 int a_from_psr:1; 101 int a_from_cpuid:1; 102 int a_cover:1; 103 int a_bsw:1; 104 long reserved:57; 105 }; 106}; 107typedef union vac vac_t; 108 109union vdc { 110 unsigned long value; 111 struct { 112 int d_vmsw:1; 113 int d_extint:1; 114 int d_ibr_dbr:1; 115 int d_pmc:1; 116 int d_to_pmd:1; 117 int d_itm:1; 118 long reserved:58; 119 }; 120}; 121typedef union vdc vdc_t; 122 123struct mapped_regs { 124 union vac vac; 125 union vdc vdc; 126 unsigned long virt_env_vaddr; 127 unsigned long reserved1[29]; 128 unsigned long vhpi; 129 unsigned long reserved2[95]; 130 union { 131 unsigned long vgr[16]; 132 unsigned long bank1_regs[16]; // bank1 regs (r16-r31) when bank0 active 133 }; 134 union { 135 unsigned long vbgr[16]; 136 unsigned long bank0_regs[16]; // bank0 regs (r16-r31) when bank1 active 137 }; 138 unsigned long vnat; 139 unsigned long vbnat; 140 unsigned long vcpuid[5]; 141 unsigned long reserved3[11]; 142 unsigned long vpsr; 143 unsigned long vpr; 144 unsigned long reserved4[76]; 145 union { 146 unsigned long vcr[128]; 147 struct { 148 unsigned long dcr; // CR0 149 unsigned long itm; 150 unsigned long iva; 151 unsigned long rsv1[5]; 152 unsigned long pta; // CR8 153 unsigned long rsv2[7]; 154 unsigned long ipsr; // CR16 155 unsigned long isr; 156 unsigned long rsv3; 157 unsigned long iip; 158 unsigned long ifa; 159 unsigned long itir; 160 unsigned long iipa; 161 unsigned long ifs; 162 unsigned long iim; // CR24 163 unsigned long iha; 164 unsigned long rsv4[38]; 165 unsigned long lid; // CR64 166 unsigned long ivr; 167 unsigned long tpr; 168 unsigned long eoi; 169 unsigned long irr[4]; 170 unsigned long itv; // CR72 171 unsigned long pmv; 172 unsigned long cmcv; 173 unsigned long rsv5[5]; 174 unsigned long lrr0; // CR80 175 unsigned long lrr1; 176 unsigned long rsv6[46]; 177 }; 178 }; 179 union { 180 unsigned long reserved5[128]; 181 struct { 182 unsigned long precover_ifs; 183 unsigned long unat; // not sure if this is needed until NaT arch is done 184 int interrupt_collection_enabled; // virtual psr.ic 185 /* virtual interrupt deliverable flag is evtchn_upcall_mask in 186 * shared info area now. interrupt_mask_addr is the address 187 * of evtchn_upcall_mask for current vcpu 188 */ 189 unsigned char *interrupt_mask_addr; 190 int pending_interruption; 191 unsigned char vpsr_pp; 192 unsigned char vpsr_dfh; 193 unsigned char hpsr_dfh; 194 unsigned char hpsr_mfh; 195 unsigned long reserved5_1[4]; 196 int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual 197 int banknum; // 0 or 1, which virtual register bank is active 198 unsigned long rrs[8]; // region registers 199 unsigned long krs[8]; // kernel registers 200 unsigned long tmp[16]; // temp registers (e.g. for hyperprivops) 201 }; 202 }; 203}; 204typedef struct mapped_regs mapped_regs_t; 205 206struct vpd { 207 struct mapped_regs vpd_low; 208 unsigned long reserved6[3456]; 209 unsigned long vmm_avail[128]; 210 unsigned long reserved7[4096]; 211}; 212typedef struct vpd vpd_t; 213 214struct arch_vcpu_info { 215}; 216typedef struct arch_vcpu_info arch_vcpu_info_t; 217 218/* 219 * This structure is used for magic page in domain pseudo physical address 220 * space and the result of XENMEM_machine_memory_map. 221 * As the XENMEM_machine_memory_map result, 222 * xen_memory_map::nr_entries indicates the size in bytes 223 * including struct xen_ia64_memmap_info. Not the number of entries. 224 */ 225struct xen_ia64_memmap_info { 226 uint64_t efi_memmap_size; /* size of EFI memory map */ 227 uint64_t efi_memdesc_size; /* size of an EFI memory map descriptor */ 228 uint32_t efi_memdesc_version; /* memory descriptor version */ 229 void *memdesc[0]; /* array of efi_memory_desc_t */ 230}; 231typedef struct xen_ia64_memmap_info xen_ia64_memmap_info_t; 232 233struct arch_shared_info { 234 /* PFN of the start_info page. */ 235 unsigned long start_info_pfn; 236 237 /* Interrupt vector for event channel. */ 238 int evtchn_vector; 239 240 /* PFN of memmap_info page */ 241 unsigned int memmap_info_num_pages;/* currently only = 1 case is 242 supported. */ 243 unsigned long memmap_info_pfn; 244 245 uint64_t pad[31]; 246}; 247typedef struct arch_shared_info arch_shared_info_t; 248 249typedef unsigned long xen_callback_t; 250 251struct ia64_tr_entry { 252 unsigned long pte; 253 unsigned long itir; 254 unsigned long vadr; 255 unsigned long rid; 256}; 257typedef struct ia64_tr_entry ia64_tr_entry_t; 258DEFINE_XEN_GUEST_HANDLE(ia64_tr_entry_t); 259 260struct vcpu_tr_regs { 261 struct ia64_tr_entry itrs[12]; 262 struct ia64_tr_entry dtrs[12]; 263}; 264 265union vcpu_ar_regs { 266 unsigned long ar[128]; 267 struct { 268 unsigned long kr[8]; 269 unsigned long rsv1[8]; 270 unsigned long rsc; 271 unsigned long bsp; 272 unsigned long bspstore; 273 unsigned long rnat; 274 unsigned long rsv2; 275 unsigned long fcr; 276 unsigned long rsv3[2]; 277 unsigned long eflag; 278 unsigned long csd; 279 unsigned long ssd; 280 unsigned long cflg; 281 unsigned long fsr; 282 unsigned long fir; 283 unsigned long fdr; 284 unsigned long rsv4; 285 unsigned long ccv; /* 32 */ 286 unsigned long rsv5[3]; 287 unsigned long unat; 288 unsigned long rsv6[3]; 289 unsigned long fpsr; 290 unsigned long rsv7[3]; 291 unsigned long itc; 292 unsigned long rsv8[3]; 293 unsigned long ign1[16]; 294 unsigned long pfs; /* 64 */ 295 unsigned long lc; 296 unsigned long ec; 297 unsigned long rsv9[45]; 298 unsigned long ign2[16]; 299 }; 300}; 301 302union vcpu_cr_regs { 303 unsigned long cr[128]; 304 struct { 305 unsigned long dcr; // CR0 306 unsigned long itm; 307 unsigned long iva; 308 unsigned long rsv1[5]; 309 unsigned long pta; // CR8 310 unsigned long rsv2[7]; 311 unsigned long ipsr; // CR16 312 unsigned long isr; 313 unsigned long rsv3; 314 unsigned long iip; 315 unsigned long ifa; 316 unsigned long itir; 317 unsigned long iipa; 318 unsigned long ifs; 319 unsigned long iim; // CR24 320 unsigned long iha; 321 unsigned long rsv4[38]; 322 unsigned long lid; // CR64 323 unsigned long ivr; 324 unsigned long tpr; 325 unsigned long eoi; 326 unsigned long irr[4]; 327 unsigned long itv; // CR72 328 unsigned long pmv; 329 unsigned long cmcv; 330 unsigned long rsv5[5]; 331 unsigned long lrr0; // CR80 332 unsigned long lrr1; 333 unsigned long rsv6[46]; 334 }; 335}; 336 337struct vcpu_guest_context_regs { 338 unsigned long r[32]; 339 unsigned long b[8]; 340 unsigned long bank[16]; 341 unsigned long ip; 342 unsigned long psr; 343 unsigned long cfm; 344 unsigned long pr; 345 unsigned int nats; /* NaT bits for r1-r31. */ 346 unsigned int bnats; /* Nat bits for banked registers. */ 347 union vcpu_ar_regs ar; 348 union vcpu_cr_regs cr; 349 struct pt_fpreg f[128]; 350 unsigned long dbr[8]; 351 unsigned long ibr[8]; 352 unsigned long rr[8]; 353 unsigned long pkr[16]; 354 355 /* FIXME: cpuid,pmd,pmc */ 356 357 unsigned long xip; 358 unsigned long xpsr; 359 unsigned long xfs; 360 unsigned long xr[4]; 361 362 struct vcpu_tr_regs tr; 363 364 /* Physical registers in case of debug event. */ 365 unsigned long excp_iipa; 366 unsigned long excp_ifa; 367 unsigned long excp_isr; 368 unsigned int excp_vector; 369 370 /* 371 * The rbs is intended to be the image of the stacked registers still 372 * in the cpu (not yet stored in memory). It is laid out as if it 373 * were written in memory at a 512 (64*8) aligned address + offset. 374 * rbs_voff is (offset / 8). rbs_nat contains NaT bits for the 375 * remaining rbs registers. rbs_rnat contains NaT bits for in memory 376 * rbs registers. 377 * Note: loadrs is 2**14 bytes == 2**11 slots. 378 */ 379 unsigned int rbs_voff; 380 unsigned long rbs[2048]; 381 unsigned long rbs_rnat; 382 383 /* 384 * RSE.N_STACKED_PHYS via PAL_RSE_INFO 385 * Strictly this isn't cpu context, but this value is necessary 386 * for domain save/restore. So is here. 387 */ 388 unsigned long num_phys_stacked; 389}; 390 391struct vcpu_guest_context { 392#define VGCF_EXTRA_REGS (1UL << 1) /* Set extra regs. */ 393#define VGCF_SET_CR_IRR (1UL << 2) /* Set cr_irr[0:3]. */ 394#define VGCF_online (1UL << 3) /* make this vcpu online */ 395 unsigned long flags; /* VGCF_* flags */ 396 397 struct vcpu_guest_context_regs regs; 398 399 unsigned long event_callback_ip; 400 401 /* xen doesn't share privregs pages with hvm domain so that this member 402 * doesn't make sense for hvm domain. 403 * ~0UL is already used for INVALID_P2M_ENTRY. */ 404#define VGC_PRIVREGS_HVM (~(-2UL)) 405 unsigned long privregs_pfn; 406}; 407typedef struct vcpu_guest_context vcpu_guest_context_t; 408DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 409 410/* dom0 vp op */ 411#define __HYPERVISOR_ia64_dom0vp_op __HYPERVISOR_arch_0 412/* Map io space in machine address to dom0 physical address space. 413 Currently physical assigned address equals to machine address. */ 414#define IA64_DOM0VP_ioremap 0 415 416/* Convert a pseudo physical page frame number to the corresponding 417 machine page frame number. If no page is assigned, INVALID_MFN or 418 GPFN_INV_MASK is returned depending on domain's non-vti/vti mode. */ 419#define IA64_DOM0VP_phystomach 1 420 421/* Convert a machine page frame number to the corresponding pseudo physical 422 page frame number of the caller domain. */ 423#define IA64_DOM0VP_machtophys 3 424 425/* Reserved for future use. */ 426#define IA64_DOM0VP_iounmap 4 427 428/* Unmap and free pages contained in the specified pseudo physical region. */ 429#define IA64_DOM0VP_zap_physmap 5 430 431/* Assign machine page frame to dom0's pseudo physical address space. */ 432#define IA64_DOM0VP_add_physmap 6 433 434/* expose the p2m table into domain */ 435#define IA64_DOM0VP_expose_p2m 7 436 437/* xen perfmon */ 438#define IA64_DOM0VP_perfmon 8 439 440/* gmfn version of IA64_DOM0VP_add_physmap */ 441#define IA64_DOM0VP_add_physmap_with_gmfn 9 442 443/* get fpswa revision */ 444#define IA64_DOM0VP_fpswa_revision 10 445 446/* Add an I/O port space range */ 447#define IA64_DOM0VP_add_io_space 11 448 449/* expose the foreign domain's p2m table into privileged domain */ 450#define IA64_DOM0VP_expose_foreign_p2m 12 451#define IA64_DOM0VP_EFP_ALLOC_PTE 0x1 /* allocate p2m table */ 452 453/* unexpose the foreign domain's p2m table into privileged domain */ 454#define IA64_DOM0VP_unexpose_foreign_p2m 13 455 456// flags for page assignement to pseudo physical address space 457#define _ASSIGN_readonly 0 458#define ASSIGN_readonly (1UL << _ASSIGN_readonly) 459#define ASSIGN_writable (0UL << _ASSIGN_readonly) // dummy flag 460/* Internal only: memory attribute must be WC/UC/UCE. */ 461#define _ASSIGN_nocache 1 462#define ASSIGN_nocache (1UL << _ASSIGN_nocache) 463// tlb tracking 464#define _ASSIGN_tlb_track 2 465#define ASSIGN_tlb_track (1UL << _ASSIGN_tlb_track) 466/* Internal only: associated with PGC_allocated bit */ 467#define _ASSIGN_pgc_allocated 3 468#define ASSIGN_pgc_allocated (1UL << _ASSIGN_pgc_allocated) 469/* Page is an IO page. */ 470#define _ASSIGN_io 4 471#define ASSIGN_io (1UL << _ASSIGN_io) 472 473/* This structure has the same layout of struct ia64_boot_param, defined in 474 <asm/system.h>. It is redefined here to ease use. */ 475struct xen_ia64_boot_param { 476 unsigned long command_line; /* physical address of cmd line args */ 477 unsigned long efi_systab; /* physical address of EFI system table */ 478 unsigned long efi_memmap; /* physical address of EFI memory map */ 479 unsigned long efi_memmap_size; /* size of EFI memory map */ 480 unsigned long efi_memdesc_size; /* size of an EFI memory map descriptor */ 481 unsigned int efi_memdesc_version; /* memory descriptor version */ 482 struct { 483 unsigned short num_cols; /* number of columns on console. */ 484 unsigned short num_rows; /* number of rows on console. */ 485 unsigned short orig_x; /* cursor's x position */ 486 unsigned short orig_y; /* cursor's y position */ 487 } console_info; 488 unsigned long fpswa; /* physical address of the fpswa interface */ 489 unsigned long initrd_start; 490 unsigned long initrd_size; 491 unsigned long domain_start; /* va where the boot time domain begins */ 492 unsigned long domain_size; /* how big is the boot domain */ 493}; 494 495#endif /* !__ASSEMBLY__ */ 496 497/* Size of the shared_info area (this is not related to page size). */ 498#define XSI_SHIFT 14 499#define XSI_SIZE (1 << XSI_SHIFT) 500/* Log size of mapped_regs area (64 KB - only 4KB is used). */ 501#define XMAPPEDREGS_SHIFT 12 502#define XMAPPEDREGS_SIZE (1 << XMAPPEDREGS_SHIFT) 503/* Offset of XASI (Xen arch shared info) wrt XSI_BASE. */ 504#define XMAPPEDREGS_OFS XSI_SIZE 505 506/* Hyperprivops. */ 507#define HYPERPRIVOP_START 0x1 508#define HYPERPRIVOP_RFI (HYPERPRIVOP_START + 0x0) 509#define HYPERPRIVOP_RSM_DT (HYPERPRIVOP_START + 0x1) 510#define HYPERPRIVOP_SSM_DT (HYPERPRIVOP_START + 0x2) 511#define HYPERPRIVOP_COVER (HYPERPRIVOP_START + 0x3) 512#define HYPERPRIVOP_ITC_D (HYPERPRIVOP_START + 0x4) 513#define HYPERPRIVOP_ITC_I (HYPERPRIVOP_START + 0x5) 514#define HYPERPRIVOP_SSM_I (HYPERPRIVOP_START + 0x6) 515#define HYPERPRIVOP_GET_IVR (HYPERPRIVOP_START + 0x7) 516#define HYPERPRIVOP_GET_TPR (HYPERPRIVOP_START + 0x8) 517#define HYPERPRIVOP_SET_TPR (HYPERPRIVOP_START + 0x9) 518#define HYPERPRIVOP_EOI (HYPERPRIVOP_START + 0xa) 519#define HYPERPRIVOP_SET_ITM (HYPERPRIVOP_START + 0xb) 520#define HYPERPRIVOP_THASH (HYPERPRIVOP_START + 0xc) 521#define HYPERPRIVOP_PTC_GA (HYPERPRIVOP_START + 0xd) 522#define HYPERPRIVOP_ITR_D (HYPERPRIVOP_START + 0xe) 523#define HYPERPRIVOP_GET_RR (HYPERPRIVOP_START + 0xf) 524#define HYPERPRIVOP_SET_RR (HYPERPRIVOP_START + 0x10) 525#define HYPERPRIVOP_SET_KR (HYPERPRIVOP_START + 0x11) 526#define HYPERPRIVOP_FC (HYPERPRIVOP_START + 0x12) 527#define HYPERPRIVOP_GET_CPUID (HYPERPRIVOP_START + 0x13) 528#define HYPERPRIVOP_GET_PMD (HYPERPRIVOP_START + 0x14) 529#define HYPERPRIVOP_GET_EFLAG (HYPERPRIVOP_START + 0x15) 530#define HYPERPRIVOP_SET_EFLAG (HYPERPRIVOP_START + 0x16) 531#define HYPERPRIVOP_RSM_BE (HYPERPRIVOP_START + 0x17) 532#define HYPERPRIVOP_GET_PSR (HYPERPRIVOP_START + 0x18) 533#define HYPERPRIVOP_SET_RR0_TO_RR4 (HYPERPRIVOP_START + 0x19) 534#define HYPERPRIVOP_MAX (0x1a) 535 536/* Fast and light hypercalls. */ 537#define __HYPERVISOR_ia64_fast_eoi __HYPERVISOR_arch_1 538 539/* Extra debug features. */ 540#define __HYPERVISOR_ia64_debug_op __HYPERVISOR_arch_2 541 542/* Xencomm macros. */ 543#define XENCOMM_INLINE_MASK 0xf800000000000000UL 544#define XENCOMM_INLINE_FLAG 0x8000000000000000UL 545 546#ifndef __ASSEMBLY__ 547 548/* 549 * Optimization features. 550 * The hypervisor may do some special optimizations for guests. This hypercall 551 * can be used to switch on/of these special optimizations. 552 */ 553#define __HYPERVISOR_opt_feature 0x700UL 554 555#define XEN_IA64_OPTF_OFF 0x0 556#define XEN_IA64_OPTF_ON 0x1 557 558/* 559 * If this feature is switched on, the hypervisor inserts the 560 * tlb entries without calling the guests traphandler. 561 * This is useful in guests using region 7 for identity mapping 562 * like the linux kernel does. 563 */ 564#define XEN_IA64_OPTF_IDENT_MAP_REG7 1 565 566/* Identity mapping of region 4 addresses in HVM. */ 567#define XEN_IA64_OPTF_IDENT_MAP_REG4 2 568 569/* Identity mapping of region 5 addresses in HVM. */ 570#define XEN_IA64_OPTF_IDENT_MAP_REG5 3 571 572#define XEN_IA64_OPTF_IDENT_MAP_NOT_SET (0) 573 574struct xen_ia64_opt_feature { 575 unsigned long cmd; /* Which feature */ 576 unsigned char on; /* Switch feature on/off */ 577 union { 578 struct { 579 /* The page protection bit mask of the pte. 580 * This will be or'ed with the pte. */ 581 unsigned long pgprot; 582 unsigned long key; /* A protection key for itir. */ 583 }; 584 }; 585}; 586 587#endif /* __ASSEMBLY__ */ 588 589/* xen perfmon */ 590#ifdef XEN 591#ifndef __ASSEMBLY__ 592#ifndef _ASM_IA64_PERFMON_H 593 594#include <xen/list.h> // asm/perfmon.h requires struct list_head 595#include <asm/perfmon.h> 596// for PFM_xxx and pfarg_features_t, pfarg_context_t, pfarg_reg_t, pfarg_load_t 597 598#endif /* _ASM_IA64_PERFMON_H */ 599 600DEFINE_XEN_GUEST_HANDLE(pfarg_features_t); 601DEFINE_XEN_GUEST_HANDLE(pfarg_context_t); 602DEFINE_XEN_GUEST_HANDLE(pfarg_reg_t); 603DEFINE_XEN_GUEST_HANDLE(pfarg_load_t); 604#endif /* __ASSEMBLY__ */ 605#endif /* XEN */ 606 607#ifndef __ASSEMBLY__ 608#include "arch-ia64/hvm/memmap.h" 609#endif 610 611#endif /* __HYPERVISOR_IF_IA64_H__ */ 612 613/* 614 * Local variables: 615 * mode: C 616 * c-set-style: "BSD" 617 * c-basic-offset: 4 618 * tab-width: 4 619 * indent-tabs-mode: nil 620 * End: 621 */ 622