1/*- 2 * Copyright (c) 1999, 2000 Kenneth D. Merry. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. The name of the author may not be used to endorse or promote products 12 * derived from this software without specific prior written permission. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28/* 29 * The ti_stats structure below is from code with the following copyright, 30 * and originally comes from the Alteon firmware documentation. 31 */ 32/* 33 * Copyright (c) 1997, 1998, 1999 34 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by Bill Paul. 47 * 4. Neither the name of the author nor the names of any co-contributors 48 * may be used to endorse or promote products derived from this software 49 * without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 52 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 53 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 54 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 55 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 56 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 57 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 58 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 59 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 60 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 61 * THE POSSIBILITY OF SUCH DAMAGE. 62 * 63 * from: if_tireg.h,v 1.8 1999/07/23 18:46:24 wpaul Exp $ 64 */ 65 66#ifndef _SYS_TIIO_H_ 67#define _SYS_TIIO_H_ 68 69#include <sys/ioccom.h> 70 71/* 72 * Tigon statistics counters. 73 */ 74struct ti_stats { 75 /* 76 * MAC stats, taken from RFC 1643, ethernet-like MIB 77 */ 78 volatile u_int32_t dot3StatsAlignmentErrors; /* 0 */ 79 volatile u_int32_t dot3StatsFCSErrors; /* 1 */ 80 volatile u_int32_t dot3StatsSingleCollisionFrames; /* 2 */ 81 volatile u_int32_t dot3StatsMultipleCollisionFrames; /* 3 */ 82 volatile u_int32_t dot3StatsSQETestErrors; /* 4 */ 83 volatile u_int32_t dot3StatsDeferredTransmissions; /* 5 */ 84 volatile u_int32_t dot3StatsLateCollisions; /* 6 */ 85 volatile u_int32_t dot3StatsExcessiveCollisions; /* 7 */ 86 volatile u_int32_t dot3StatsInternalMacTransmitErrors; /* 8 */ 87 volatile u_int32_t dot3StatsCarrierSenseErrors; /* 9 */ 88 volatile u_int32_t dot3StatsFrameTooLongs; /* 10 */ 89 volatile u_int32_t dot3StatsInternalMacReceiveErrors; /* 11 */ 90 /* 91 * interface stats, taken from RFC 1213, MIB-II, interfaces group 92 */ 93 volatile u_int32_t ifIndex; /* 12 */ 94 volatile u_int32_t ifType; /* 13 */ 95 volatile u_int32_t ifMtu; /* 14 */ 96 volatile u_int32_t ifSpeed; /* 15 */ 97 volatile u_int32_t ifAdminStatus; /* 16 */ 98#define IF_ADMIN_STATUS_UP 1 99#define IF_ADMIN_STATUS_DOWN 2 100#define IF_ADMIN_STATUS_TESTING 3 101 volatile u_int32_t ifOperStatus; /* 17 */ 102#define IF_OPER_STATUS_UP 1 103#define IF_OPER_STATUS_DOWN 2 104#define IF_OPER_STATUS_TESTING 3 105#define IF_OPER_STATUS_UNKNOWN 4 106#define IF_OPER_STATUS_DORMANT 5 107 volatile u_int32_t ifLastChange; /* 18 */ 108 volatile u_int32_t ifInDiscards; /* 19 */ 109 volatile u_int32_t ifInErrors; /* 20 */ 110 volatile u_int32_t ifInUnknownProtos; /* 21 */ 111 volatile u_int32_t ifOutDiscards; /* 22 */ 112 volatile u_int32_t ifOutErrors; /* 23 */ 113 volatile u_int32_t ifOutQLen; /* deprecated */ /* 24 */ 114 volatile u_int8_t ifPhysAddress[8]; /* 8 bytes */ /* 25 - 26 */ 115 volatile u_int8_t ifDescr[32]; /* 27 - 34 */ 116 u_int32_t alignIt; /* align to 64 bit for u_int64_ts following */ 117 /* 118 * more interface stats, taken from RFC 1573, MIB-IIupdate, 119 * interfaces group 120 */ 121 volatile u_int64_t ifHCInOctets; /* 36 - 37 */ 122 volatile u_int64_t ifHCInUcastPkts; /* 38 - 39 */ 123 volatile u_int64_t ifHCInMulticastPkts; /* 40 - 41 */ 124 volatile u_int64_t ifHCInBroadcastPkts; /* 42 - 43 */ 125 volatile u_int64_t ifHCOutOctets; /* 44 - 45 */ 126 volatile u_int64_t ifHCOutUcastPkts; /* 46 - 47 */ 127 volatile u_int64_t ifHCOutMulticastPkts; /* 48 - 49 */ 128 volatile u_int64_t ifHCOutBroadcastPkts; /* 50 - 51 */ 129 volatile u_int32_t ifLinkUpDownTrapEnable; /* 52 */ 130 volatile u_int32_t ifHighSpeed; /* 53 */ 131 volatile u_int32_t ifPromiscuousMode; /* 54 */ 132 volatile u_int32_t ifConnectorPresent; /* follow link state 55 */ 133 /* 134 * Host Commands 135 */ 136 volatile u_int32_t nicCmdsHostState; /* 56 */ 137 volatile u_int32_t nicCmdsFDRFiltering; /* 57 */ 138 volatile u_int32_t nicCmdsSetRecvProdIndex; /* 58 */ 139 volatile u_int32_t nicCmdsUpdateGencommStats; /* 59 */ 140 volatile u_int32_t nicCmdsResetJumboRing; /* 60 */ 141 volatile u_int32_t nicCmdsAddMCastAddr; /* 61 */ 142 volatile u_int32_t nicCmdsDelMCastAddr; /* 62 */ 143 volatile u_int32_t nicCmdsSetPromiscMode; /* 63 */ 144 volatile u_int32_t nicCmdsLinkNegotiate; /* 64 */ 145 volatile u_int32_t nicCmdsSetMACAddr; /* 65 */ 146 volatile u_int32_t nicCmdsClearProfile; /* 66 */ 147 volatile u_int32_t nicCmdsSetMulticastMode; /* 67 */ 148 volatile u_int32_t nicCmdsClearStats; /* 68 */ 149 volatile u_int32_t nicCmdsSetRecvJumboProdIndex; /* 69 */ 150 volatile u_int32_t nicCmdsSetRecvMiniProdIndex; /* 70 */ 151 volatile u_int32_t nicCmdsRefreshStats; /* 71 */ 152 volatile u_int32_t nicCmdsUnknown; /* 72 */ 153 /* 154 * NIC Events 155 */ 156 volatile u_int32_t nicEventsNICFirmwareOperational; /* 73 */ 157 volatile u_int32_t nicEventsStatsUpdated; /* 74 */ 158 volatile u_int32_t nicEventsLinkStateChanged; /* 75 */ 159 volatile u_int32_t nicEventsError; /* 76 */ 160 volatile u_int32_t nicEventsMCastListUpdated; /* 77 */ 161 volatile u_int32_t nicEventsResetJumboRing; /* 78 */ 162 /* 163 * Ring manipulation 164 */ 165 volatile u_int32_t nicRingSetSendProdIndex; /* 79 */ 166 volatile u_int32_t nicRingSetSendConsIndex; /* 80 */ 167 volatile u_int32_t nicRingSetRecvReturnProdIndex; /* 81 */ 168 /* 169 * Interrupts 170 */ 171 volatile u_int32_t nicInterrupts; /* 82 */ 172 volatile u_int32_t nicAvoidedInterrupts; /* 83 */ 173 /* 174 * BD Coalessing Thresholds 175 */ 176 volatile u_int32_t nicEventThresholdHit; /* 84 */ 177 volatile u_int32_t nicSendThresholdHit; /* 85 */ 178 volatile u_int32_t nicRecvThresholdHit; /* 86 */ 179 /* 180 * DMA Attentions 181 */ 182 volatile u_int32_t nicDmaRdOverrun; /* 87 */ 183 volatile u_int32_t nicDmaRdUnderrun; /* 88 */ 184 volatile u_int32_t nicDmaWrOverrun; /* 89 */ 185 volatile u_int32_t nicDmaWrUnderrun; /* 90 */ 186 volatile u_int32_t nicDmaWrMasterAborts; /* 91 */ 187 volatile u_int32_t nicDmaRdMasterAborts; /* 92 */ 188 /* 189 * NIC Resources 190 */ 191 volatile u_int32_t nicDmaWriteRingFull; /* 93 */ 192 volatile u_int32_t nicDmaReadRingFull; /* 94 */ 193 volatile u_int32_t nicEventRingFull; /* 95 */ 194 volatile u_int32_t nicEventProducerRingFull; /* 96 */ 195 volatile u_int32_t nicTxMacDescrRingFull; /* 97 */ 196 volatile u_int32_t nicOutOfTxBufSpaceFrameRetry; /* 98 */ 197 volatile u_int32_t nicNoMoreWrDMADescriptors; /* 99 */ 198 volatile u_int32_t nicNoMoreRxBDs; /* 100 */ 199 volatile u_int32_t nicNoSpaceInReturnRing; /* 101 */ 200 volatile u_int32_t nicSendBDs; /* current count 102 */ 201 volatile u_int32_t nicRecvBDs; /* current count 103 */ 202 volatile u_int32_t nicJumboRecvBDs; /* current count 104 */ 203 volatile u_int32_t nicMiniRecvBDs; /* current count 105 */ 204 volatile u_int32_t nicTotalRecvBDs; /* current count 106 */ 205 volatile u_int32_t nicTotalSendBDs; /* current count 107 */ 206 volatile u_int32_t nicJumboSpillOver; /* 108 */ 207 volatile u_int32_t nicSbusHangCleared; /* 109 */ 208 volatile u_int32_t nicEnqEventDelayed; /* 110 */ 209 /* 210 * Stats from MAC rx completion 211 */ 212 volatile u_int32_t nicMacRxLateColls; /* 111 */ 213 volatile u_int32_t nicMacRxLinkLostDuringPkt; /* 112 */ 214 volatile u_int32_t nicMacRxPhyDecodeErr; /* 113 */ 215 volatile u_int32_t nicMacRxMacAbort; /* 114 */ 216 volatile u_int32_t nicMacRxTruncNoResources; /* 115 */ 217 /* 218 * Stats from the mac_stats area 219 */ 220 volatile u_int32_t nicMacRxDropUla; /* 116 */ 221 volatile u_int32_t nicMacRxDropMcast; /* 117 */ 222 volatile u_int32_t nicMacRxFlowControl; /* 118 */ 223 volatile u_int32_t nicMacRxDropSpace; /* 119 */ 224 volatile u_int32_t nicMacRxColls; /* 120 */ 225 /* 226 * MAC RX Attentions 227 */ 228 volatile u_int32_t nicMacRxTotalAttns; /* 121 */ 229 volatile u_int32_t nicMacRxLinkAttns; /* 122 */ 230 volatile u_int32_t nicMacRxSyncAttns; /* 123 */ 231 volatile u_int32_t nicMacRxConfigAttns; /* 124 */ 232 volatile u_int32_t nicMacReset; /* 125 */ 233 volatile u_int32_t nicMacRxBufDescrAttns; /* 126 */ 234 volatile u_int32_t nicMacRxBufAttns; /* 127 */ 235 volatile u_int32_t nicMacRxZeroFrameCleanup; /* 128 */ 236 volatile u_int32_t nicMacRxOneFrameCleanup; /* 129 */ 237 volatile u_int32_t nicMacRxMultipleFrameCleanup; /* 130 */ 238 volatile u_int32_t nicMacRxTimerCleanup; /* 131 */ 239 volatile u_int32_t nicMacRxDmaCleanup; /* 132 */ 240 /* 241 * Stats from the mac_stats area 242 */ 243 volatile u_int32_t nicMacTxCollisionHistogram[15]; /* 133 */ 244 /* 245 * MAC TX Attentions 246 */ 247 volatile u_int32_t nicMacTxTotalAttns; /* 134 */ 248 /* 249 * NIC Profile 250 */ 251 volatile u_int32_t nicProfile[32]; /* 135 */ 252 /* 253 * Pat to 1024 bytes. 254 */ 255 u_int32_t pad[75]; 256}; 257 258struct tg_reg { 259 u_int32_t data; 260 u_int32_t addr; 261}; 262 263struct tg_mem { 264 u_int32_t tgAddr; 265 caddr_t userAddr; 266 int len; 267}; 268 269 270typedef enum { 271 TI_PARAM_NONE = 0x00, 272 TI_PARAM_STAT_TICKS = 0x01, 273 TI_PARAM_RX_COAL_TICKS = 0x02, 274 TI_PARAM_TX_COAL_TICKS = 0x04, 275 TI_PARAM_RX_COAL_BDS = 0x08, 276 TI_PARAM_TX_COAL_BDS = 0x10, 277 TI_PARAM_TX_BUF_RATIO = 0x20, 278 TI_PARAM_ALL = 0x2f 279} ti_param_mask; 280 281struct ti_params { 282 u_int32_t ti_stat_ticks; 283 u_int32_t ti_rx_coal_ticks; 284 u_int32_t ti_tx_coal_ticks; 285 u_int32_t ti_rx_max_coal_bds; 286 u_int32_t ti_tx_max_coal_bds; 287 u_int32_t ti_tx_buf_ratio; 288 ti_param_mask param_mask; 289}; 290 291typedef enum { 292 TI_TRACE_TYPE_NONE = 0x00000000, 293 TI_TRACE_TYPE_SEND = 0x00000001, 294 TI_TRACE_TYPE_RECV = 0x00000002, 295 TI_TRACE_TYPE_DMA = 0x00000004, 296 TI_TRACE_TYPE_EVENT = 0x00000008, 297 TI_TRACE_TYPE_COMMAND = 0x00000010, 298 TI_TRACE_TYPE_MAC = 0x00000020, 299 TI_TRACE_TYPE_STATS = 0x00000040, 300 TI_TRACE_TYPE_TIMER = 0x00000080, 301 TI_TRACE_TYPE_DISP = 0x00000100, 302 TI_TRACE_TYPE_MAILBOX = 0x00000200, 303 TI_TRACE_TYPE_RECV_BD = 0x00000400, 304 TI_TRACE_TYPE_LNK_PHY = 0x00000800, 305 TI_TRACE_TYPE_LNK_NEG = 0x00001000, 306 TI_TRACE_LEVEL_1 = 0x10000000, 307 TI_TRACE_LEVEL_2 = 0x20000000 308} ti_trace_type; 309 310struct ti_trace_buf { 311 u_long *buf; 312 int buf_len; 313 int fill_len; 314 u_long cur_trace_ptr; 315}; 316 317#define TIIOCGETSTATS _IOR('T', 1, struct ti_stats) 318#define TIIOCGETPARAMS _IOR('T', 2, struct ti_params) 319#define TIIOCSETPARAMS _IOW('T', 3, struct ti_params) 320#define TIIOCSETTRACE _IOW('T', 11, ti_trace_type) 321#define TIIOCGETTRACE _IOWR('T', 12, struct ti_trace_buf) 322 323/* 324 * Taken from Alteon's altioctl.h. Alteon's ioctl numbers 1-6 aren't 325 * used by the FreeBSD driver. 326 */ 327#define ALT_ATTACH _IO('a', 7) 328#define ALT_READ_TG_MEM _IOWR('a', 10, struct tg_mem) 329#define ALT_WRITE_TG_MEM _IOWR('a', 11, struct tg_mem) 330#define ALT_READ_TG_REG _IOWR('a', 12, struct tg_reg) 331#define ALT_WRITE_TG_REG _IOWR('a', 13, struct tg_reg) 332 333#endif /* _SYS_TIIO_H_ */ 334