1/*-
2 * Copyright (C) 2008 Semihalf, Rafal Jaworowski
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/lock.h>
33#include <sys/mutex.h>
34#include <sys/rman.h>
35
36#include <vm/vm.h>
37#include <vm/vm_param.h>
38
39#include <machine/cpu.h>
40#include <machine/cpufunc.h>
41#include <machine/spr.h>
42
43#include <powerpc/mpc85xx/mpc85xx.h>
44
45/*
46 * MPC85xx system specific routines
47 */
48
49uint32_t
50ccsr_read4(uintptr_t addr)
51{
52	volatile uint32_t *ptr = (void *)addr;
53
54	return (*ptr);
55}
56
57void
58ccsr_write4(uintptr_t addr, uint32_t val)
59{
60	volatile uint32_t *ptr = (void *)addr;
61
62	*ptr = val;
63	__asm __volatile("eieio; sync");
64}
65
66int
67law_getmax(void)
68{
69	uint32_t ver;
70
71	ver = SVR_VER(mfspr(SPR_SVR));
72	if (ver == SVR_MPC8555E || ver == SVR_MPC8555)
73		return (8);
74	if (ver == SVR_MPC8548E || ver == SVR_MPC8548 ||
75	    ver == SVR_MPC8533E || ver == SVR_MPC8533)
76		return (10);
77
78	return (12);
79}
80
81#define	_LAW_SR(trgt,size)	(0x80000000 | (trgt << 20) | (ffsl(size) - 2))
82#define	_LAW_BAR(addr)		(addr >> 12)
83
84int
85law_enable(int trgt, u_long addr, u_long size)
86{
87	uint32_t bar, sr;
88	int i, law_max;
89
90	law_max = law_getmax();
91	bar = _LAW_BAR(addr);
92	sr = _LAW_SR(trgt, size);
93
94	/* Bail if already programmed. */
95	for (i = 0; i < law_max; i++)
96		if (sr == ccsr_read4(OCP85XX_LAWSR(i)) &&
97		    bar == ccsr_read4(OCP85XX_LAWBAR(i)))
98			return (0);
99
100	/* Find an unused access window. */
101	for (i = 0; i < law_max; i++)
102		if ((ccsr_read4(OCP85XX_LAWSR(i)) & 0x80000000) == 0)
103			break;
104
105	if (i == law_max)
106		return (ENOSPC);
107
108	ccsr_write4(OCP85XX_LAWBAR(i), bar);
109	ccsr_write4(OCP85XX_LAWSR(i), sr);
110	return (0);
111}
112
113int
114law_disable(int trgt, u_long addr, u_long size)
115{
116	uint32_t bar, sr;
117	int i, law_max;
118
119	law_max = law_getmax();
120	bar = _LAW_BAR(addr);
121	sr = _LAW_SR(trgt, size);
122
123	/* Find and disable requested LAW. */
124	for (i = 0; i < law_max; i++)
125		if (sr == ccsr_read4(OCP85XX_LAWSR(i)) &&
126		    bar == ccsr_read4(OCP85XX_LAWBAR(i))) {
127			ccsr_write4(OCP85XX_LAWBAR(i), 0);
128			ccsr_write4(OCP85XX_LAWSR(i), 0);
129			return (0);
130		}
131
132	return (ENOENT);
133}
134
135int
136law_pci_target(struct resource *res, int *trgt_mem, int *trgt_io)
137{
138	u_long start;
139	uint32_t ver;
140	int trgt, rv;
141
142	ver = SVR_VER(mfspr(SPR_SVR));
143
144	start = rman_get_start(res) & 0xf000;
145
146	rv = 0;
147	trgt = -1;
148	switch (start) {
149	case 0x8000:
150		trgt = 0;
151		break;
152	case 0x9000:
153		trgt = 1;
154		break;
155	case 0xa000:
156		if (ver == SVR_MPC8548E || ver == SVR_MPC8548)
157			trgt = 3;
158		else
159			trgt = 2;
160		break;
161	case 0xb000:
162		if (ver == SVR_MPC8548E || ver == SVR_MPC8548)
163			rv = EINVAL;
164		else
165			trgt = 3;
166		break;
167	default:
168		rv = ENXIO;
169	}
170	*trgt_mem = *trgt_io = trgt;
171	return (rv);
172}
173
174