1/*-
2 * Copyright (C) 2008-2009 Semihalf, Michal Hajduk
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/kernel.h>
34#include <sys/module.h>
35#include <sys/resource.h>
36
37#include <machine/bus.h>
38#include <machine/resource.h>
39#include <sys/rman.h>
40
41#include <sys/lock.h>
42#include <sys/mutex.h>
43
44#include <dev/iicbus/iiconf.h>
45#include <dev/iicbus/iicbus.h>
46#include "iicbus_if.h"
47
48#include <dev/ofw/ofw_bus.h>
49#include <dev/ofw/ofw_bus_subr.h>
50
51#define I2C_ADDR_REG		0x00 /* I2C slave address register */
52#define I2C_FDR_REG		0x04 /* I2C frequency divider register */
53#define I2C_CONTROL_REG		0x08 /* I2C control register */
54#define I2C_STATUS_REG		0x0C /* I2C status register */
55#define I2C_DATA_REG		0x10 /* I2C data register */
56#define I2C_DFSRR_REG		0x14 /* I2C Digital Filter Sampling rate */
57#define I2C_ENABLE		0x80 /* Module enable - interrupt disable */
58#define I2CSR_RXAK		0x01 /* Received acknowledge */
59#define I2CSR_MCF		(1<<7) /* Data transfer */
60#define I2CSR_MASS		(1<<6) /* Addressed as a slave */
61#define I2CSR_MBB		(1<<5) /* Bus busy */
62#define I2CSR_MAL		(1<<4) /* Arbitration lost */
63#define I2CSR_SRW		(1<<2) /* Slave read/write */
64#define I2CSR_MIF		(1<<1) /* Module interrupt */
65#define I2CCR_MEN		(1<<7) /* Module enable */
66#define I2CCR_MSTA		(1<<5) /* Master/slave mode */
67#define I2CCR_MTX		(1<<4) /* Transmit/receive mode */
68#define I2CCR_TXAK		(1<<3) /* Transfer acknowledge */
69#define I2CCR_RSTA		(1<<2) /* Repeated START */
70
71#define I2C_BAUD_RATE_FAST	0x31
72#define I2C_BAUD_RATE_DEF	0x3F
73#define I2C_DFSSR_DIV		0x10
74
75#define DEBUG
76#undef DEBUG
77
78#ifdef  DEBUG
79#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0)
80#else
81#define debugf(fmt, args...)
82#endif
83
84struct i2c_softc {
85	device_t		dev;
86	device_t		iicbus;
87	struct resource		*res;
88	struct mtx		mutex;
89	int			rid;
90	bus_space_handle_t	bsh;
91	bus_space_tag_t		bst;
92};
93
94static int i2c_probe(device_t);
95static int i2c_attach(device_t);
96
97static int i2c_repeated_start(device_t dev, u_char slave, int timeout);
98static int i2c_start(device_t dev, u_char slave, int timeout);
99static int i2c_stop(device_t dev);
100static int i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr);
101static int i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay);
102static int i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout);
103
104static device_method_t i2c_methods[] = {
105	DEVMETHOD(device_probe,			i2c_probe),
106	DEVMETHOD(device_attach,		i2c_attach),
107
108	DEVMETHOD(iicbus_callback,		iicbus_null_callback),
109	DEVMETHOD(iicbus_repeated_start,	i2c_repeated_start),
110	DEVMETHOD(iicbus_start,			i2c_start),
111	DEVMETHOD(iicbus_stop,			i2c_stop),
112	DEVMETHOD(iicbus_reset,			i2c_reset),
113	DEVMETHOD(iicbus_read,			i2c_read),
114	DEVMETHOD(iicbus_write,			i2c_write),
115	DEVMETHOD(iicbus_transfer,		iicbus_transfer_gen),
116
117	{ 0, 0 }
118};
119
120static driver_t i2c_driver = {
121	"i2c",
122	i2c_methods,
123	sizeof(struct i2c_softc),
124};
125static devclass_t  i2c_devclass;
126
127DRIVER_MODULE(i2c, simplebus, i2c_driver, i2c_devclass, 0, 0);
128DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0);
129
130static __inline void
131i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val)
132{
133
134	bus_space_write_1(sc->bst, sc->bsh, off, val);
135}
136
137static __inline uint8_t
138i2c_read_reg(struct i2c_softc *sc, bus_size_t off)
139{
140
141	return (bus_space_read_1(sc->bst, sc->bsh, off));
142}
143
144static __inline void
145i2c_flag_set(struct i2c_softc *sc, bus_size_t off, uint8_t mask)
146{
147	uint8_t status;
148
149	status = i2c_read_reg(sc, off);
150	status |= mask;
151	i2c_write_reg(sc, off, status);
152}
153
154static int
155i2c_do_wait(device_t dev, struct i2c_softc *sc, int write, int start)
156{
157	int err;
158	uint8_t status;
159
160	status = i2c_read_reg(sc, I2C_STATUS_REG);
161	if (status & I2CSR_MIF) {
162		if (write && start && (status & I2CSR_RXAK)) {
163			debugf("no ack %s", start ?
164			    "after sending slave address" : "");
165			err = IIC_ENOACK;
166			goto error;
167		}
168		if (status & I2CSR_MAL) {
169			debugf("arbitration lost");
170			err = IIC_EBUSERR;
171			goto error;
172		}
173		if (!write && !(status & I2CSR_MCF)) {
174			debugf("transfer unfinished");
175			err = IIC_EBUSERR;
176			goto error;
177		}
178	}
179
180	return (IIC_NOERR);
181
182error:
183	i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
184	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
185	return (err);
186}
187
188static int
189i2c_probe(device_t dev)
190{
191	struct i2c_softc *sc;
192
193	if (!ofw_bus_is_compatible(dev, "fsl-i2c"))
194		return (ENXIO);
195
196	sc = device_get_softc(dev);
197	sc->rid = 0;
198
199	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
200	    RF_ACTIVE);
201	if (sc->res == NULL) {
202		device_printf(dev, "could not allocate resources\n");
203		return (ENXIO);
204	}
205
206	sc->bst = rman_get_bustag(sc->res);
207	sc->bsh = rman_get_bushandle(sc->res);
208
209	/* Enable I2C */
210	i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
211	bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->res);
212	device_set_desc(dev, "I2C bus controller");
213
214	return (BUS_PROBE_DEFAULT);
215}
216
217static int
218i2c_attach(device_t dev)
219{
220	struct i2c_softc *sc;
221	sc = device_get_softc(dev);
222
223	sc->dev = dev;
224	sc->rid = 0;
225
226	mtx_init(&sc->mutex, device_get_nameunit(dev), "I2C", MTX_DEF);
227
228	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
229	    RF_ACTIVE);
230	if (sc->res == NULL) {
231		device_printf(dev, "could not allocate resources");
232		mtx_destroy(&sc->mutex);
233		return (ENXIO);
234	}
235
236	sc->bst = rman_get_bustag(sc->res);
237	sc->bsh = rman_get_bushandle(sc->res);
238
239	sc->iicbus = device_add_child(dev, "iicbus", -1);
240	if (sc->iicbus == NULL) {
241		device_printf(dev, "could not add iicbus child");
242		mtx_destroy(&sc->mutex);
243		return (ENXIO);
244	}
245
246	bus_generic_attach(dev);
247	return (IIC_NOERR);
248}
249static int
250i2c_repeated_start(device_t dev, u_char slave, int timeout)
251{
252	struct i2c_softc *sc;
253	int error;
254
255	sc = device_get_softc(dev);
256
257	mtx_lock(&sc->mutex);
258	/* Set repeated start condition */
259	i2c_flag_set(sc, I2C_CONTROL_REG ,I2CCR_RSTA);
260	/* Write target address - LSB is R/W bit */
261	i2c_write_reg(sc, I2C_DATA_REG, slave);
262	DELAY(1250);
263
264	error = i2c_do_wait(dev, sc, 1, 1);
265	mtx_unlock(&sc->mutex);
266
267	if (error)
268		return (error);
269
270	return (IIC_NOERR);
271}
272
273static int
274i2c_start(device_t dev, u_char slave, int timeout)
275{
276	struct i2c_softc *sc;
277	uint8_t status;
278	int error;
279
280	sc = device_get_softc(dev);
281	DELAY(1000);
282
283	mtx_lock(&sc->mutex);
284	status = i2c_read_reg(sc, I2C_STATUS_REG);
285	/* Check if bus is idle or busy */
286	if (status & I2CSR_MBB) {
287		debugf("bus busy");
288		mtx_unlock(&sc->mutex);
289		i2c_stop(dev);
290		return (IIC_EBUSBSY);
291	}
292
293	/* Set start condition */
294	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
295	/* Write target address - LSB is R/W bit */
296	i2c_write_reg(sc, I2C_DATA_REG, slave);
297	DELAY(1250);
298
299	error = i2c_do_wait(dev, sc, 1, 1);
300
301	mtx_unlock(&sc->mutex);
302	if (error)
303		return (error);
304
305	return (IIC_NOERR);
306}
307
308static int
309i2c_stop(device_t dev)
310{
311	struct i2c_softc *sc;
312
313	sc = device_get_softc(dev);
314	mtx_lock(&sc->mutex);
315	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
316	DELAY(1000);
317	mtx_unlock(&sc->mutex);
318
319	return (IIC_NOERR);
320}
321
322static int
323i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr)
324{
325	struct i2c_softc *sc;
326	uint8_t baud_rate;
327
328	sc = device_get_softc(dev);
329
330	switch (speed) {
331	case IIC_FAST:
332		baud_rate = I2C_BAUD_RATE_FAST;
333		break;
334	case IIC_SLOW:
335	case IIC_UNKNOWN:
336	case IIC_FASTEST:
337	default:
338		baud_rate = I2C_BAUD_RATE_DEF;
339		break;
340	}
341
342	mtx_lock(&sc->mutex);
343	i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
344	i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
345	DELAY(1000);
346	i2c_write_reg(sc, I2C_FDR_REG, baud_rate);
347	i2c_write_reg(sc, I2C_DFSRR_REG, I2C_DFSSR_DIV);
348	i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
349	DELAY(1000);
350	mtx_unlock(&sc->mutex);
351
352	return (IIC_NOERR);
353}
354
355static int
356i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay)
357{
358	struct i2c_softc *sc;
359	int error;
360
361	sc = device_get_softc(dev);
362	*read = 0;
363
364	mtx_lock(&sc->mutex);
365	if (len) {
366		if (len == 1)
367			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
368			    I2CCR_MSTA | I2CCR_TXAK);
369
370		else
371			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
372			    I2CCR_MSTA);
373
374		/* dummy read */
375		i2c_read_reg(sc, I2C_DATA_REG);
376		DELAY(1000);
377	}
378
379	while (*read < len) {
380		DELAY(1000);
381		error = i2c_do_wait(dev, sc, 0, 0);
382		if (error) {
383			mtx_unlock(&sc->mutex);
384			return (error);
385		}
386		if ((*read == len - 2) && last) {
387			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
388			    I2CCR_MSTA | I2CCR_TXAK);
389		}
390
391		if ((*read == len - 1) && last) {
392			i2c_write_reg(sc, I2C_CONTROL_REG,  I2CCR_MEN |
393			    I2CCR_TXAK);
394		}
395
396		*buf++ = i2c_read_reg(sc, I2C_DATA_REG);
397		(*read)++;
398		DELAY(1250);
399	}
400	mtx_unlock(&sc->mutex);
401
402	return (IIC_NOERR);
403}
404
405static int
406i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout)
407{
408	struct i2c_softc *sc;
409	int error;
410
411	sc = device_get_softc(dev);
412	*sent = 0;
413
414	mtx_lock(&sc->mutex);
415	while (*sent < len) {
416		i2c_write_reg(sc, I2C_DATA_REG, *buf++);
417		DELAY(1250);
418
419		error = i2c_do_wait(dev, sc, 1, 0);
420		if (error) {
421			mtx_unlock(&sc->mutex);
422			return (error);
423		}
424
425		(*sent)++;
426	}
427	mtx_unlock(&sc->mutex);
428
429	return (IIC_NOERR);
430}
431