1/* 2 * Copyright (c) 2004 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34#include <linux/slab.h> 35#include <linux/errno.h> 36 37#include "mthca_dev.h" 38#include "mthca_cmd.h" 39#include "mthca_memfree.h" 40 41struct mthca_mtt { 42 struct mthca_buddy *buddy; 43 int order; 44 u32 first_seg; 45}; 46 47/* 48 * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. 49 */ 50struct mthca_mpt_entry { 51 __be32 flags; 52 __be32 page_size; 53 __be32 key; 54 __be32 pd; 55 __be64 start; 56 __be64 length; 57 __be32 lkey; 58 __be32 window_count; 59 __be32 window_count_limit; 60 __be64 mtt_seg; 61 __be32 mtt_sz; /* Arbel only */ 62 u32 reserved[2]; 63} __attribute__((packed)); 64 65#define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28) 66#define MTHCA_MPT_FLAG_MIO (1 << 17) 67#define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15) 68#define MTHCA_MPT_FLAG_PHYSICAL (1 << 9) 69#define MTHCA_MPT_FLAG_REGION (1 << 8) 70 71#define MTHCA_MTT_FLAG_PRESENT 1 72 73#define MTHCA_MPT_STATUS_SW 0xF0 74#define MTHCA_MPT_STATUS_HW 0x00 75 76#define SINAI_FMR_KEY_INC 0x1000000 77 78/* 79 * Buddy allocator for MTT segments (currently not very efficient 80 * since it doesn't keep a free list and just searches linearly 81 * through the bitmaps) 82 */ 83 84static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order) 85{ 86 int o; 87 int m; 88 u32 seg; 89 90 spin_lock(&buddy->lock); 91 92 for (o = order; o <= buddy->max_order; ++o) 93 if (buddy->num_free[o]) { 94 m = 1 << (buddy->max_order - o); 95 seg = find_first_bit(buddy->bits[o], m); 96 if (seg < m) 97 goto found; 98 } 99 100 spin_unlock(&buddy->lock); 101 return -1; 102 103 found: 104 clear_bit(seg, buddy->bits[o]); 105 --buddy->num_free[o]; 106 107 while (o > order) { 108 --o; 109 seg <<= 1; 110 set_bit(seg ^ 1, buddy->bits[o]); 111 ++buddy->num_free[o]; 112 } 113 114 spin_unlock(&buddy->lock); 115 116 seg <<= order; 117 118 return seg; 119} 120 121static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order) 122{ 123 seg >>= order; 124 125 spin_lock(&buddy->lock); 126 127 while (test_bit(seg ^ 1, buddy->bits[order])) { 128 clear_bit(seg ^ 1, buddy->bits[order]); 129 --buddy->num_free[order]; 130 seg >>= 1; 131 ++order; 132 } 133 134 set_bit(seg, buddy->bits[order]); 135 ++buddy->num_free[order]; 136 137 spin_unlock(&buddy->lock); 138} 139 140static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order) 141{ 142 int i, s; 143 144 buddy->max_order = max_order; 145 spin_lock_init(&buddy->lock); 146 147 buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *), 148 GFP_KERNEL); 149 buddy->num_free = kzalloc((buddy->max_order + 1) * sizeof (int *), 150 GFP_KERNEL); 151 if (!buddy->bits || !buddy->num_free) 152 goto err_out; 153 154 for (i = 0; i <= buddy->max_order; ++i) { 155 s = BITS_TO_LONGS(1 << (buddy->max_order - i)); 156 buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL); 157 if (!buddy->bits[i]) 158 goto err_out_free; 159 bitmap_zero(buddy->bits[i], 160 1 << (buddy->max_order - i)); 161 } 162 163 set_bit(0, buddy->bits[buddy->max_order]); 164 buddy->num_free[buddy->max_order] = 1; 165 166 return 0; 167 168err_out_free: 169 for (i = 0; i <= buddy->max_order; ++i) 170 kfree(buddy->bits[i]); 171 172err_out: 173 kfree(buddy->bits); 174 kfree(buddy->num_free); 175 176 return -ENOMEM; 177} 178 179static void mthca_buddy_cleanup(struct mthca_buddy *buddy) 180{ 181 int i; 182 183 for (i = 0; i <= buddy->max_order; ++i) 184 kfree(buddy->bits[i]); 185 186 kfree(buddy->bits); 187 kfree(buddy->num_free); 188} 189 190static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order, 191 struct mthca_buddy *buddy) 192{ 193 u32 seg = mthca_buddy_alloc(buddy, order); 194 195 if (seg == -1) 196 return -1; 197 198 if (mthca_is_memfree(dev)) 199 if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg, 200 seg + (1 << order) - 1)) { 201 mthca_buddy_free(buddy, seg, order); 202 seg = -1; 203 } 204 205 return seg; 206} 207 208static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size, 209 struct mthca_buddy *buddy) 210{ 211 struct mthca_mtt *mtt; 212 int i; 213 214 if (size <= 0) 215 return ERR_PTR(-EINVAL); 216 217 mtt = kmalloc(sizeof *mtt, GFP_KERNEL); 218 if (!mtt) 219 return ERR_PTR(-ENOMEM); 220 221 mtt->buddy = buddy; 222 mtt->order = 0; 223 for (i = dev->limits.mtt_seg_size / 8; i < size; i <<= 1) 224 ++mtt->order; 225 226 mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy); 227 if (mtt->first_seg == -1) { 228 kfree(mtt); 229 return ERR_PTR(-ENOMEM); 230 } 231 232 return mtt; 233} 234 235struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size) 236{ 237 return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy); 238} 239 240void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt) 241{ 242 if (!mtt) 243 return; 244 245 mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order); 246 247 mthca_table_put_range(dev, dev->mr_table.mtt_table, 248 mtt->first_seg, 249 mtt->first_seg + (1 << mtt->order) - 1); 250 251 kfree(mtt); 252} 253 254static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, 255 int start_index, u64 *buffer_list, int list_len) 256{ 257 struct mthca_mailbox *mailbox; 258 __be64 *mtt_entry; 259 int err = 0; 260 u8 status; 261 int i; 262 263 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); 264 if (IS_ERR(mailbox)) 265 return PTR_ERR(mailbox); 266 mtt_entry = mailbox->buf; 267 268 while (list_len > 0) { 269 mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base + 270 mtt->first_seg * dev->limits.mtt_seg_size + 271 start_index * 8); 272 mtt_entry[1] = 0; 273 for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i) 274 mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] | 275 MTHCA_MTT_FLAG_PRESENT); 276 277 /* 278 * If we have an odd number of entries to write, add 279 * one more dummy entry for firmware efficiency. 280 */ 281 if (i & 1) 282 mtt_entry[i + 2] = 0; 283 284 err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status); 285 if (err) { 286 mthca_warn(dev, "WRITE_MTT failed (%d)\n", err); 287 goto out; 288 } 289 if (status) { 290 mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n", 291 status); 292 err = -EINVAL; 293 goto out; 294 } 295 296 list_len -= i; 297 start_index += i; 298 buffer_list += i; 299 } 300 301out: 302 mthca_free_mailbox(dev, mailbox); 303 return err; 304} 305 306int mthca_write_mtt_size(struct mthca_dev *dev) 307{ 308 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy || 309 !(dev->mthca_flags & MTHCA_FLAG_FMR)) 310 /* 311 * Be friendly to WRITE_MTT command 312 * and leave two empty slots for the 313 * index and reserved fields of the 314 * mailbox. 315 */ 316 return PAGE_SIZE / sizeof (u64) - 2; 317 318 /* For Arbel, all MTTs must fit in the same page. */ 319 return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff; 320} 321 322static void mthca_tavor_write_mtt_seg(struct mthca_dev *dev, 323 struct mthca_mtt *mtt, int start_index, 324 u64 *buffer_list, int list_len) 325{ 326 u64 __iomem *mtts; 327 int i; 328 329 mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * dev->limits.mtt_seg_size + 330 start_index * sizeof (u64); 331 for (i = 0; i < list_len; ++i) 332 mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT), 333 mtts + i); 334} 335 336static void mthca_arbel_write_mtt_seg(struct mthca_dev *dev, 337 struct mthca_mtt *mtt, int start_index, 338 u64 *buffer_list, int list_len) 339{ 340 __be64 *mtts; 341 dma_addr_t dma_handle; 342 int i; 343 int s = start_index * sizeof (u64); 344 345 /* For Arbel, all MTTs must fit in the same page. */ 346 BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE); 347 /* Require full segments */ 348 BUG_ON(s % dev->limits.mtt_seg_size); 349 350 mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg + 351 s / dev->limits.mtt_seg_size, &dma_handle); 352 353 BUG_ON(!mtts); 354 355 for (i = 0; i < list_len; ++i) 356 mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT); 357 358 dma_sync_single(&dev->pdev->dev, dma_handle, list_len * sizeof (u64), DMA_TO_DEVICE); 359} 360 361int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, 362 int start_index, u64 *buffer_list, int list_len) 363{ 364 int size = mthca_write_mtt_size(dev); 365 int chunk; 366 367 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy || 368 !(dev->mthca_flags & MTHCA_FLAG_FMR)) 369 return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len); 370 371 while (list_len > 0) { 372 chunk = min(size, list_len); 373 if (mthca_is_memfree(dev)) 374 mthca_arbel_write_mtt_seg(dev, mtt, start_index, 375 buffer_list, chunk); 376 else 377 mthca_tavor_write_mtt_seg(dev, mtt, start_index, 378 buffer_list, chunk); 379 380 list_len -= chunk; 381 start_index += chunk; 382 buffer_list += chunk; 383 } 384 385 return 0; 386} 387 388static inline u32 tavor_hw_index_to_key(u32 ind) 389{ 390 return ind; 391} 392 393static inline u32 tavor_key_to_hw_index(u32 key) 394{ 395 return key; 396} 397 398static inline u32 arbel_hw_index_to_key(u32 ind) 399{ 400 return (ind >> 24) | (ind << 8); 401} 402 403static inline u32 arbel_key_to_hw_index(u32 key) 404{ 405 return (key << 24) | (key >> 8); 406} 407 408static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind) 409{ 410 if (mthca_is_memfree(dev)) 411 return arbel_hw_index_to_key(ind); 412 else 413 return tavor_hw_index_to_key(ind); 414} 415 416static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key) 417{ 418 if (mthca_is_memfree(dev)) 419 return arbel_key_to_hw_index(key); 420 else 421 return tavor_key_to_hw_index(key); 422} 423 424static inline u32 adjust_key(struct mthca_dev *dev, u32 key) 425{ 426 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 427 return ((key << 20) & 0x800000) | (key & 0x7fffff); 428 else 429 return key; 430} 431 432int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift, 433 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr) 434{ 435 struct mthca_mailbox *mailbox; 436 struct mthca_mpt_entry *mpt_entry; 437 u32 key; 438 int i; 439 int err; 440 u8 status; 441 442 WARN_ON(buffer_size_shift >= 32); 443 444 key = mthca_alloc(&dev->mr_table.mpt_alloc); 445 if (key == -1) 446 return -ENOMEM; 447 key = adjust_key(dev, key); 448 mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key); 449 450 if (mthca_is_memfree(dev)) { 451 err = mthca_table_get(dev, dev->mr_table.mpt_table, key); 452 if (err) 453 goto err_out_mpt_free; 454 } 455 456 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); 457 if (IS_ERR(mailbox)) { 458 err = PTR_ERR(mailbox); 459 goto err_out_table; 460 } 461 mpt_entry = mailbox->buf; 462 463 mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS | 464 MTHCA_MPT_FLAG_MIO | 465 MTHCA_MPT_FLAG_REGION | 466 access); 467 if (!mr->mtt) 468 mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL); 469 470 mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12); 471 mpt_entry->key = cpu_to_be32(key); 472 mpt_entry->pd = cpu_to_be32(pd); 473 mpt_entry->start = cpu_to_be64(iova); 474 mpt_entry->length = cpu_to_be64(total_size); 475 476 memset(&mpt_entry->lkey, 0, 477 sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey)); 478 479 if (mr->mtt) 480 mpt_entry->mtt_seg = 481 cpu_to_be64(dev->mr_table.mtt_base + 482 mr->mtt->first_seg * dev->limits.mtt_seg_size); 483 484 if (0) { 485 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey); 486 for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) { 487 if (i % 4 == 0) 488 printk("[%02x] ", i * 4); 489 printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i])); 490 if ((i + 1) % 4 == 0) 491 printk("\n"); 492 } 493 } 494 495 err = mthca_SW2HW_MPT(dev, mailbox, 496 key & (dev->limits.num_mpts - 1), 497 &status); 498 if (err) { 499 mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); 500 goto err_out_mailbox; 501 } else if (status) { 502 mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n", 503 status); 504 err = -EINVAL; 505 goto err_out_mailbox; 506 } 507 508 mthca_free_mailbox(dev, mailbox); 509 return err; 510 511err_out_mailbox: 512 mthca_free_mailbox(dev, mailbox); 513 514err_out_table: 515 mthca_table_put(dev, dev->mr_table.mpt_table, key); 516 517err_out_mpt_free: 518 mthca_free(&dev->mr_table.mpt_alloc, key); 519 return err; 520} 521 522int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd, 523 u32 access, struct mthca_mr *mr) 524{ 525 mr->mtt = NULL; 526 return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr); 527} 528 529int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd, 530 u64 *buffer_list, int buffer_size_shift, 531 int list_len, u64 iova, u64 total_size, 532 u32 access, struct mthca_mr *mr) 533{ 534 int err; 535 536 mr->mtt = mthca_alloc_mtt(dev, list_len); 537 if (IS_ERR(mr->mtt)) 538 return PTR_ERR(mr->mtt); 539 540 err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len); 541 if (err) { 542 mthca_free_mtt(dev, mr->mtt); 543 return err; 544 } 545 546 err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova, 547 total_size, access, mr); 548 if (err) 549 mthca_free_mtt(dev, mr->mtt); 550 551 return err; 552} 553 554/* Free mr or fmr */ 555static void mthca_free_region(struct mthca_dev *dev, u32 lkey) 556{ 557 mthca_table_put(dev, dev->mr_table.mpt_table, 558 key_to_hw_index(dev, lkey)); 559 560 mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey)); 561} 562 563void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr) 564{ 565 int err; 566 u8 status; 567 568 err = mthca_HW2SW_MPT(dev, NULL, 569 key_to_hw_index(dev, mr->ibmr.lkey) & 570 (dev->limits.num_mpts - 1), 571 &status); 572 if (err) 573 mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err); 574 else if (status) 575 mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n", 576 status); 577 578 mthca_free_region(dev, mr->ibmr.lkey); 579 mthca_free_mtt(dev, mr->mtt); 580} 581 582int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd, 583 u32 access, struct mthca_fmr *mr) 584{ 585 struct mthca_mpt_entry *mpt_entry; 586 struct mthca_mailbox *mailbox; 587 u64 mtt_seg; 588 u32 key, idx; 589 u8 status; 590 int list_len = mr->attr.max_pages; 591 int err = -ENOMEM; 592 int i; 593 594 if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32) 595 return -EINVAL; 596 597 /* For Arbel, all MTTs must fit in the same page. */ 598 if (mthca_is_memfree(dev) && 599 mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE) 600 return -EINVAL; 601 602 mr->maps = 0; 603 604 key = mthca_alloc(&dev->mr_table.mpt_alloc); 605 if (key == -1) 606 return -ENOMEM; 607 key = adjust_key(dev, key); 608 609 idx = key & (dev->limits.num_mpts - 1); 610 mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key); 611 612 if (mthca_is_memfree(dev)) { 613 err = mthca_table_get(dev, dev->mr_table.mpt_table, key); 614 if (err) 615 goto err_out_mpt_free; 616 617 mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL); 618 BUG_ON(!mr->mem.arbel.mpt); 619 } else 620 mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base + 621 sizeof *(mr->mem.tavor.mpt) * idx; 622 623 mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy); 624 if (IS_ERR(mr->mtt)) { 625 err = PTR_ERR(mr->mtt); 626 goto err_out_table; 627 } 628 629 mtt_seg = mr->mtt->first_seg * dev->limits.mtt_seg_size; 630 631 if (mthca_is_memfree(dev)) { 632 mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table, 633 mr->mtt->first_seg, 634 &mr->mem.arbel.dma_handle); 635 BUG_ON(!mr->mem.arbel.mtts); 636 } else 637 mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg; 638 639 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); 640 if (IS_ERR(mailbox)) { 641 err = PTR_ERR(mailbox); 642 goto err_out_free_mtt; 643 } 644 645 mpt_entry = mailbox->buf; 646 647 mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS | 648 MTHCA_MPT_FLAG_MIO | 649 MTHCA_MPT_FLAG_REGION | 650 access); 651 652 mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12); 653 mpt_entry->key = cpu_to_be32(key); 654 mpt_entry->pd = cpu_to_be32(pd); 655 memset(&mpt_entry->start, 0, 656 sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start)); 657 mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg); 658 659 if (0) { 660 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey); 661 for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) { 662 if (i % 4 == 0) 663 printk("[%02x] ", i * 4); 664 printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i])); 665 if ((i + 1) % 4 == 0) 666 printk("\n"); 667 } 668 } 669 670 err = mthca_SW2HW_MPT(dev, mailbox, 671 key & (dev->limits.num_mpts - 1), 672 &status); 673 if (err) { 674 mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); 675 goto err_out_mailbox_free; 676 } 677 if (status) { 678 mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n", 679 status); 680 err = -EINVAL; 681 goto err_out_mailbox_free; 682 } 683 684 mthca_free_mailbox(dev, mailbox); 685 return 0; 686 687err_out_mailbox_free: 688 mthca_free_mailbox(dev, mailbox); 689 690err_out_free_mtt: 691 mthca_free_mtt(dev, mr->mtt); 692 693err_out_table: 694 mthca_table_put(dev, dev->mr_table.mpt_table, key); 695 696err_out_mpt_free: 697 mthca_free(&dev->mr_table.mpt_alloc, key); 698 return err; 699} 700 701int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr) 702{ 703 if (fmr->maps) 704 return -EBUSY; 705 706 mthca_free_region(dev, fmr->ibmr.lkey); 707 mthca_free_mtt(dev, fmr->mtt); 708 709 return 0; 710} 711 712static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list, 713 int list_len, u64 iova) 714{ 715 int i, page_mask; 716 717 if (list_len > fmr->attr.max_pages) 718 return -EINVAL; 719 720 page_mask = (1 << fmr->attr.page_shift) - 1; 721 722 /* We are getting page lists, so va must be page aligned. */ 723 if (iova & page_mask) 724 return -EINVAL; 725 726 /* Trust the user not to pass misaligned data in page_list */ 727 if (0) 728 for (i = 0; i < list_len; ++i) { 729 if (page_list[i] & ~page_mask) 730 return -EINVAL; 731 } 732 733 if (fmr->maps >= fmr->attr.max_maps) 734 return -EINVAL; 735 736 return 0; 737} 738 739 740int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, 741 int list_len, u64 iova) 742{ 743 struct mthca_fmr *fmr = to_mfmr(ibfmr); 744 struct mthca_dev *dev = to_mdev(ibfmr->device); 745 struct mthca_mpt_entry mpt_entry; 746 u32 key; 747 int i, err; 748 749 err = mthca_check_fmr(fmr, page_list, list_len, iova); 750 if (err) 751 return err; 752 753 ++fmr->maps; 754 755 key = tavor_key_to_hw_index(fmr->ibmr.lkey); 756 key += dev->limits.num_mpts; 757 fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key); 758 759 writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt); 760 761 for (i = 0; i < list_len; ++i) { 762 __be64 mtt_entry = cpu_to_be64(page_list[i] | 763 MTHCA_MTT_FLAG_PRESENT); 764 mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i); 765 } 766 767 mpt_entry.lkey = cpu_to_be32(key); 768 mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift)); 769 mpt_entry.start = cpu_to_be64(iova); 770 771 __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key); 772 memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start, 773 offsetof(struct mthca_mpt_entry, window_count) - 774 offsetof(struct mthca_mpt_entry, start)); 775 776 writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt); 777 778 return 0; 779} 780 781int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, 782 int list_len, u64 iova) 783{ 784 struct mthca_fmr *fmr = to_mfmr(ibfmr); 785 struct mthca_dev *dev = to_mdev(ibfmr->device); 786 u32 key; 787 int i, err; 788 789 err = mthca_check_fmr(fmr, page_list, list_len, iova); 790 if (err) 791 return err; 792 793 ++fmr->maps; 794 795 key = arbel_key_to_hw_index(fmr->ibmr.lkey); 796 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 797 key += SINAI_FMR_KEY_INC; 798 else 799 key += dev->limits.num_mpts; 800 fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key); 801 802 *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW; 803 804 wmb(); 805 806 for (i = 0; i < list_len; ++i) 807 fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] | 808 MTHCA_MTT_FLAG_PRESENT); 809 810 dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle, 811 list_len * sizeof(u64), DMA_TO_DEVICE); 812 813 fmr->mem.arbel.mpt->key = cpu_to_be32(key); 814 fmr->mem.arbel.mpt->lkey = cpu_to_be32(key); 815 fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift)); 816 fmr->mem.arbel.mpt->start = cpu_to_be64(iova); 817 818 wmb(); 819 820 *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW; 821 822 wmb(); 823 824 return 0; 825} 826 827void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr) 828{ 829 if (!fmr->maps) 830 return; 831 832 fmr->maps = 0; 833 834 writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt); 835} 836 837void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr) 838{ 839 if (!fmr->maps) 840 return; 841 842 fmr->maps = 0; 843 844 *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW; 845} 846 847int mthca_init_mr_table(struct mthca_dev *dev) 848{ 849 unsigned long addr; 850 int mpts, mtts, err, i; 851 852 err = mthca_alloc_init(&dev->mr_table.mpt_alloc, 853 dev->limits.num_mpts, 854 ~0, dev->limits.reserved_mrws); 855 if (err) 856 return err; 857 858 if (!mthca_is_memfree(dev) && 859 (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) 860 dev->limits.fmr_reserved_mtts = 0; 861 else 862 dev->mthca_flags |= MTHCA_FLAG_FMR; 863 864 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 865 mthca_dbg(dev, "Memory key throughput optimization activated.\n"); 866 867 err = mthca_buddy_init(&dev->mr_table.mtt_buddy, 868 fls(dev->limits.num_mtt_segs - 1)); 869 870 if (err) 871 goto err_mtt_buddy; 872 873 dev->mr_table.tavor_fmr.mpt_base = NULL; 874 dev->mr_table.tavor_fmr.mtt_base = NULL; 875 876 if (dev->limits.fmr_reserved_mtts) { 877 i = fls(dev->limits.fmr_reserved_mtts - 1); 878 879 if (i >= 31) { 880 mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n"); 881 err = -EINVAL; 882 goto err_fmr_mpt; 883 } 884 mpts = mtts = 1 << i; 885 } else { 886 mtts = dev->limits.num_mtt_segs; 887 mpts = dev->limits.num_mpts; 888 } 889 890 if (!mthca_is_memfree(dev) && 891 (dev->mthca_flags & MTHCA_FLAG_FMR)) { 892 893 addr = pci_resource_start(dev->pdev, 4) + 894 ((pci_resource_len(dev->pdev, 4) - 1) & 895 dev->mr_table.mpt_base); 896 897 dev->mr_table.tavor_fmr.mpt_base = 898 ioremap(addr, mpts * sizeof(struct mthca_mpt_entry)); 899 900 if (!dev->mr_table.tavor_fmr.mpt_base) { 901 mthca_warn(dev, "MPT ioremap for FMR failed.\n"); 902 err = -ENOMEM; 903 goto err_fmr_mpt; 904 } 905 906 addr = pci_resource_start(dev->pdev, 4) + 907 ((pci_resource_len(dev->pdev, 4) - 1) & 908 dev->mr_table.mtt_base); 909 910 dev->mr_table.tavor_fmr.mtt_base = 911 ioremap(addr, mtts * dev->limits.mtt_seg_size); 912 if (!dev->mr_table.tavor_fmr.mtt_base) { 913 mthca_warn(dev, "MTT ioremap for FMR failed.\n"); 914 err = -ENOMEM; 915 goto err_fmr_mtt; 916 } 917 } 918 919 if (dev->limits.fmr_reserved_mtts) { 920 err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1)); 921 if (err) 922 goto err_fmr_mtt_buddy; 923 924 /* Prevent regular MRs from using FMR keys */ 925 err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1)); 926 if (err) 927 goto err_reserve_fmr; 928 929 dev->mr_table.fmr_mtt_buddy = 930 &dev->mr_table.tavor_fmr.mtt_buddy; 931 } else 932 dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy; 933 934 /* FMR table is always the first, take reserved MTTs out of there */ 935 if (dev->limits.reserved_mtts) { 936 i = fls(dev->limits.reserved_mtts - 1); 937 938 if (mthca_alloc_mtt_range(dev, i, 939 dev->mr_table.fmr_mtt_buddy) == -1) { 940 mthca_warn(dev, "MTT table of order %d is too small.\n", 941 dev->mr_table.fmr_mtt_buddy->max_order); 942 err = -ENOMEM; 943 goto err_reserve_mtts; 944 } 945 } 946 947 return 0; 948 949err_reserve_mtts: 950err_reserve_fmr: 951 if (dev->limits.fmr_reserved_mtts) 952 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy); 953 954err_fmr_mtt_buddy: 955 if (dev->mr_table.tavor_fmr.mtt_base) 956 iounmap(dev->mr_table.tavor_fmr.mtt_base); 957 958err_fmr_mtt: 959 if (dev->mr_table.tavor_fmr.mpt_base) 960 iounmap(dev->mr_table.tavor_fmr.mpt_base); 961 962err_fmr_mpt: 963 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy); 964 965err_mtt_buddy: 966 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc); 967 968 return err; 969} 970 971void mthca_cleanup_mr_table(struct mthca_dev *dev) 972{ 973 /* XXX check if any MRs are still allocated? */ 974 if (dev->limits.fmr_reserved_mtts) 975 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy); 976 977 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy); 978 979 if (dev->mr_table.tavor_fmr.mtt_base) 980 iounmap(dev->mr_table.tavor_fmr.mtt_base); 981 if (dev->mr_table.tavor_fmr.mpt_base) 982 iounmap(dev->mr_table.tavor_fmr.mpt_base); 983 984 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc); 985} 986