1/*
2 * Copyright (c) 2005 Cisco Systems.  All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <linux/jiffies.h>
34#include <linux/timer.h>
35#include <linux/workqueue.h>
36
37#include "mthca_dev.h"
38
39enum {
40	MTHCA_CATAS_TYPE_INTERNAL	= 0,
41	MTHCA_CATAS_TYPE_UPLINK		= 3,
42	MTHCA_CATAS_TYPE_DDR		= 4,
43	MTHCA_CATAS_TYPE_PARITY		= 5,
44};
45
46#define	MTHCA_CATAS_POLL_INTERVAL	(5 * HZ)
47
48static DEFINE_SPINLOCK(catas_lock);
49
50static LIST_HEAD(catas_list);
51static struct workqueue_struct *catas_wq;
52static struct work_struct catas_work;
53
54static int catas_reset_disable;
55module_param_named(catas_reset_disable, catas_reset_disable, int, 0644);
56MODULE_PARM_DESC(catas_reset_disable, "disable reset on catastrophic event if nonzero");
57
58static void catas_reset(struct work_struct *work)
59{
60	struct mthca_dev *dev, *tmpdev;
61	LIST_HEAD(tlist);
62	int ret;
63
64	mutex_lock(&mthca_device_mutex);
65
66	spin_lock_irq(&catas_lock);
67	list_splice_init(&catas_list, &tlist);
68	spin_unlock_irq(&catas_lock);
69
70	list_for_each_entry_safe(dev, tmpdev, &tlist, catas_err.list) {
71		struct pci_dev *pdev = dev->pdev;
72		ret = __mthca_restart_one(dev->pdev);
73		/* 'dev' now is not valid */
74		if (ret)
75			printk(KERN_ERR "mthca %s: Reset failed (%d)\n",
76			       pci_name(pdev), ret);
77		else {
78			struct mthca_dev *d = pci_get_drvdata(pdev);
79			mthca_dbg(d, "Reset succeeded\n");
80		}
81	}
82
83	mutex_unlock(&mthca_device_mutex);
84}
85
86static void handle_catas(struct mthca_dev *dev)
87{
88	struct ib_event event;
89	unsigned long flags;
90	const char *type;
91	int i;
92
93	event.device = &dev->ib_dev;
94	event.event  = IB_EVENT_DEVICE_FATAL;
95	event.element.port_num = 0;
96	dev->active = 0;
97
98	ib_dispatch_event(&event);
99
100	switch (swab32(readl(dev->catas_err.map)) >> 24) {
101	case MTHCA_CATAS_TYPE_INTERNAL:
102		type = "internal error";
103		break;
104	case MTHCA_CATAS_TYPE_UPLINK:
105		type = "uplink bus error";
106		break;
107	case MTHCA_CATAS_TYPE_DDR:
108		type = "DDR data error";
109		break;
110	case MTHCA_CATAS_TYPE_PARITY:
111		type = "internal parity error";
112		break;
113	default:
114		type = "unknown error";
115		break;
116	}
117
118	mthca_err(dev, "Catastrophic error detected: %s\n", type);
119	for (i = 0; i < dev->catas_err.size; ++i)
120		mthca_err(dev, "  buf[%02x]: %08x\n",
121			  i, swab32(readl(dev->catas_err.map + i)));
122
123	if (catas_reset_disable)
124		return;
125
126	spin_lock_irqsave(&catas_lock, flags);
127	list_add(&dev->catas_err.list, &catas_list);
128	queue_work(catas_wq, &catas_work);
129	spin_unlock_irqrestore(&catas_lock, flags);
130}
131
132static void poll_catas(unsigned long dev_ptr)
133{
134	struct mthca_dev *dev = (struct mthca_dev *) dev_ptr;
135	int i;
136
137	for (i = 0; i < dev->catas_err.size; ++i)
138		if (readl(dev->catas_err.map + i)) {
139			handle_catas(dev);
140			return;
141		}
142
143	mod_timer(&dev->catas_err.timer,
144		  round_jiffies(jiffies + MTHCA_CATAS_POLL_INTERVAL));
145}
146
147void mthca_start_catas_poll(struct mthca_dev *dev)
148{
149	unsigned long addr;
150
151	init_timer(&dev->catas_err.timer);
152	dev->catas_err.map  = NULL;
153
154	addr = pci_resource_start(dev->pdev, 0) +
155		((pci_resource_len(dev->pdev, 0) - 1) &
156		 dev->catas_err.addr);
157
158	dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4);
159	if (!dev->catas_err.map) {
160		mthca_warn(dev, "couldn't map catastrophic error region "
161			   "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4);
162		return;
163	}
164
165	dev->catas_err.timer.data     = (unsigned long) dev;
166	dev->catas_err.timer.function = poll_catas;
167	dev->catas_err.timer.expires  = jiffies + MTHCA_CATAS_POLL_INTERVAL;
168	INIT_LIST_HEAD(&dev->catas_err.list);
169	add_timer(&dev->catas_err.timer);
170}
171
172void mthca_stop_catas_poll(struct mthca_dev *dev)
173{
174	del_timer_sync(&dev->catas_err.timer);
175
176	if (dev->catas_err.map)
177		iounmap(dev->catas_err.map);
178
179	spin_lock_irq(&catas_lock);
180	list_del(&dev->catas_err.list);
181	spin_unlock_irq(&catas_lock);
182}
183
184int __init mthca_catas_init(void)
185{
186	INIT_WORK(&catas_work, catas_reset);
187
188	catas_wq = create_singlethread_workqueue("mthcacatas");
189	if (!catas_wq)
190		return -ENOMEM;
191
192	return 0;
193}
194
195void mthca_catas_cleanup(void)
196{
197	destroy_workqueue(catas_wq);
198}
199