msgring.h revision 206895
1107572Sgrehan/*-
2107572Sgrehan * Copyright (c) 2003-2009 RMI Corporation
3107572Sgrehan * All rights reserved.
4107572Sgrehan *
5107572Sgrehan * Redistribution and use in source and binary forms, with or without
6107572Sgrehan * modification, are permitted provided that the following conditions
7107572Sgrehan * are met:
8107572Sgrehan * 1. Redistributions of source code must retain the above copyright
9107572Sgrehan *    notice, this list of conditions and the following disclaimer.
10107572Sgrehan * 2. Redistributions in binary form must reproduce the above copyright
11107572Sgrehan *    notice, this list of conditions and the following disclaimer in the
12107572Sgrehan *    documentation and/or other materials provided with the distribution.
13107572Sgrehan * 3. Neither the name of RMI Corporation, nor the names of its contributors,
14107572Sgrehan *    may be used to endorse or promote products derived from this software
15107572Sgrehan *    without specific prior written permission.
16107572Sgrehan *
17107572Sgrehan * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18107572Sgrehan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19107572Sgrehan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20107572Sgrehan * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21107572Sgrehan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22107572Sgrehan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23107572Sgrehan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24107572Sgrehan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25107572Sgrehan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26107572Sgrehan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27107572Sgrehan * SUCH DAMAGE.
28107572Sgrehan *
29107572Sgrehan * RMI_BSD */
30107572Sgrehan#ifndef _RMI_MSGRING_H_
31107572Sgrehan#define _RMI_MSGRING_H_
32107572Sgrehan
33107572Sgrehan#include <mips/rmi/xlrconfig.h>
34107572Sgrehan
35107572Sgrehan#define MSGRNG_TX_BUF_REG 0
36107572Sgrehan#define MSGRNG_RX_BUF_REG 1
37107572Sgrehan
38107572Sgrehan#define MSGRNG_MSG_STATUS_REG 2
39107572Sgrehan#define MSGRNG_MSG_CONFIG_REG 3
40107572Sgrehan
41173745Sjb#define MSGRNG_MSG_BUCKSIZE_REG 4
42107572Sgrehan
43107572Sgrehan#define MSGRNG_CC_0_REG  16
44107572Sgrehan#define MSGRNG_CC_1_REG  17
45107572Sgrehan#define MSGRNG_CC_2_REG  18
46209885Snwhitehorn#define MSGRNG_CC_3_REG  19
47209885Snwhitehorn#define MSGRNG_CC_4_REG  20
48209885Snwhitehorn#define MSGRNG_CC_5_REG  21
49209885Snwhitehorn#define MSGRNG_CC_6_REG  22
50209885Snwhitehorn#define MSGRNG_CC_7_REG  23
51107572Sgrehan#define MSGRNG_CC_8_REG  24
52107572Sgrehan#define MSGRNG_CC_9_REG  25
53107572Sgrehan#define MSGRNG_CC_10_REG 26
54107572Sgrehan#define MSGRNG_CC_11_REG 27
55107572Sgrehan#define MSGRNG_CC_12_REG 28
56107572Sgrehan#define MSGRNG_CC_13_REG 29
57107572Sgrehan#define MSGRNG_CC_14_REG 30
58107572Sgrehan#define MSGRNG_CC_15_REG 31
59107572Sgrehan
60107572Sgrehan#define msgrng_read_status() read_c2_register32(MSGRNG_MSG_STATUS_REG, 0)
61115396Skan
62107572Sgrehan#define msgrng_read_config() read_c2_register32(MSGRNG_MSG_CONFIG_REG, 0)
63107572Sgrehan#define msgrng_write_config(value) write_c2_register32(MSGRNG_MSG_CONFIG_REG, 0, value)
64115396Skan
65107572Sgrehan#define msgrng_read_bucksize(bucket) read_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, bucket)
66115396Skan#define msgrng_write_bucksize(bucket, value) write_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, bucket, value)
67107572Sgrehan
68107572Sgrehan#define msgrng_read_cc(reg, pri) read_c2_register32(reg, pri)
69107572Sgrehan#define msgrng_write_cc(reg, value, pri) write_c2_register32(reg, pri, value)
70107572Sgrehan
71107572Sgrehan#define msgrng_load_rx_msg0() read_c2_register64(MSGRNG_RX_BUF_REG, 0)
72107572Sgrehan#define msgrng_load_rx_msg1() read_c2_register64(MSGRNG_RX_BUF_REG, 1)
73107572Sgrehan#define msgrng_load_rx_msg2() read_c2_register64(MSGRNG_RX_BUF_REG, 2)
74107572Sgrehan#define msgrng_load_rx_msg3() read_c2_register64(MSGRNG_RX_BUF_REG, 3)
75216695Skib
76216695Skib#define msgrng_load_tx_msg0(value) write_c2_register64(MSGRNG_TX_BUF_REG, 0, value)
77216695Skib#define msgrng_load_tx_msg1(value) write_c2_register64(MSGRNG_TX_BUF_REG, 1, value)
78107572Sgrehan#define msgrng_load_tx_msg2(value) write_c2_register64(MSGRNG_TX_BUF_REG, 2, value)
79107572Sgrehan#define msgrng_load_tx_msg3(value) write_c2_register64(MSGRNG_TX_BUF_REG, 3, value)
80107572Sgrehan
81107572Sgrehan/* Station IDs */
82107572Sgrehan#define MSGRNG_STNID_CPU0  0x00
83107572Sgrehan#define MSGRNG_STNID_CPU1  0x08
84107572Sgrehan#define MSGRNG_STNID_CPU2  0x10
85107572Sgrehan#define MSGRNG_STNID_CPU3  0x18
86107572Sgrehan#define MSGRNG_STNID_CPU4  0x20
87216695Skib#define MSGRNG_STNID_CPU5  0x28
88216695Skib#define MSGRNG_STNID_CPU6  0x30
89115396Skan#define MSGRNG_STNID_CPU7  0x38
90115396Skan#define MSGRNG_STNID_XGS0_TX 64
91107572Sgrehan#define MSGRNG_STNID_XMAC0_00_TX 64
92216695Skib#define MSGRNG_STNID_XMAC0_01_TX 65
93216695Skib#define MSGRNG_STNID_XMAC0_02_TX 66
94216695Skib#define MSGRNG_STNID_XMAC0_03_TX 67
95216695Skib#define MSGRNG_STNID_XMAC0_04_TX 68
96107572Sgrehan#define MSGRNG_STNID_XMAC0_05_TX 69
97107572Sgrehan#define MSGRNG_STNID_XMAC0_06_TX 70
98107572Sgrehan#define MSGRNG_STNID_XMAC0_07_TX 71
99107572Sgrehan#define MSGRNG_STNID_XMAC0_08_TX 72
100107572Sgrehan#define MSGRNG_STNID_XMAC0_09_TX 73
101107572Sgrehan#define MSGRNG_STNID_XMAC0_10_TX 74
102107572Sgrehan#define MSGRNG_STNID_XMAC0_11_TX 75
103107572Sgrehan#define MSGRNG_STNID_XMAC0_12_TX 76
104107572Sgrehan#define MSGRNG_STNID_XMAC0_13_TX 77
105107572Sgrehan#define MSGRNG_STNID_XMAC0_14_TX 78
106115396Skan#define MSGRNG_STNID_XMAC0_15_TX 79
107216695Skib
108115396Skan#define MSGRNG_STNID_XGS1_TX 80
109209885Snwhitehorn#define MSGRNG_STNID_XMAC1_00_TX 80
110107572Sgrehan#define MSGRNG_STNID_XMAC1_01_TX 81
111115396Skan#define MSGRNG_STNID_XMAC1_02_TX 82
112107572Sgrehan#define MSGRNG_STNID_XMAC1_03_TX 83
113107572Sgrehan#define MSGRNG_STNID_XMAC1_04_TX 84
114107572Sgrehan#define MSGRNG_STNID_XMAC1_05_TX 85
115107572Sgrehan#define MSGRNG_STNID_XMAC1_06_TX 86
116107572Sgrehan#define MSGRNG_STNID_XMAC1_07_TX 87
117107572Sgrehan#define MSGRNG_STNID_XMAC1_08_TX 88
118107572Sgrehan#define MSGRNG_STNID_XMAC1_09_TX 89
119107572Sgrehan#define MSGRNG_STNID_XMAC1_10_TX 90
120107572Sgrehan#define MSGRNG_STNID_XMAC1_11_TX 91
121107572Sgrehan#define MSGRNG_STNID_XMAC1_12_TX 92
122107572Sgrehan#define MSGRNG_STNID_XMAC1_13_TX 93
123107572Sgrehan#define MSGRNG_STNID_XMAC1_14_TX 94
124107572Sgrehan#define MSGRNG_STNID_XMAC1_15_TX 95
125107572Sgrehan
126107572Sgrehan#define MSGRNG_STNID_GMAC 96
127107572Sgrehan#define MSGRNG_STNID_GMACJFR_0  96
128107572Sgrehan#define MSGRNG_STNID_GMACRFR_0  97
129107572Sgrehan#define MSGRNG_STNID_GMACTX0    98
130107572Sgrehan#define MSGRNG_STNID_GMACTX1    99
131107572Sgrehan#define MSGRNG_STNID_GMACTX2    100
132107572Sgrehan#define MSGRNG_STNID_GMACTX3    101
133107572Sgrehan#define MSGRNG_STNID_GMACJFR_1  102
134107572Sgrehan#define MSGRNG_STNID_GMACRFR_1  103
135107572Sgrehan
136107572Sgrehan#define MSGRNG_STNID_DMA      104
137107572Sgrehan#define MSGRNG_STNID_DMA_0    104
138107572Sgrehan#define MSGRNG_STNID_DMA_1    105
139107572Sgrehan#define MSGRNG_STNID_DMA_2    106
140107572Sgrehan#define MSGRNG_STNID_DMA_3    107
141115396Skan
142107572Sgrehan#define MSGRNG_STNID_XGS0FR 112
143107572Sgrehan#define MSGRNG_STNID_XMAC0JFR 112
144107572Sgrehan#define MSGRNG_STNID_XMAC0RFR 113
145107572Sgrehan
146107572Sgrehan#define MSGRNG_STNID_XGS1FR 114
147107572Sgrehan#define MSGRNG_STNID_XMAC1JFR 114
148107572Sgrehan#define MSGRNG_STNID_XMAC1RFR 115
149107572Sgrehan#define MSGRNG_STNID_SEC 120
150107572Sgrehan#define MSGRNG_STNID_SEC0 120
151107572Sgrehan#define MSGRNG_STNID_SEC1 121
152115396Skan#define MSGRNG_STNID_SEC2 122
153107572Sgrehan#define MSGRNG_STNID_SEC3 123
154107572Sgrehan#define MSGRNG_STNID_PK0  124
155107572Sgrehan#define MSGRNG_STNID_SEC_RSA 124
156216695Skib#define MSGRNG_STNID_SEC_RSVD0 125
157107572Sgrehan#define MSGRNG_STNID_SEC_RSVD1 126
158107572Sgrehan#define MSGRNG_STNID_SEC_RSVD2 127
159107572Sgrehan
160107572Sgrehan#define MSGRNG_STNID_GMAC1      80
161107572Sgrehan#define MSGRNG_STNID_GMAC1_FR_0   81
162107572Sgrehan#define MSGRNG_STNID_GMAC1_TX0  82
163107572Sgrehan#define MSGRNG_STNID_GMAC1_TX1  83
164115396Skan#define MSGRNG_STNID_GMAC1_TX2  84
165107572Sgrehan#define MSGRNG_STNID_GMAC1_TX3  85
166107572Sgrehan#define MSGRNG_STNID_GMAC1_FR_1   87
167107572Sgrehan#define MSGRNG_STNID_GMAC0      96
168209885Snwhitehorn#define MSGRNG_STNID_GMAC0_FR_0   97
169209885Snwhitehorn#define MSGRNG_STNID_GMAC0_TX0  98
170107572Sgrehan#define MSGRNG_STNID_GMAC0_TX1  99
171216695Skib#define MSGRNG_STNID_GMAC0_TX2  100
172107572Sgrehan#define MSGRNG_STNID_GMAC0_TX3  101
173107572Sgrehan#define MSGRNG_STNID_GMAC0_FR_1   103
174107572Sgrehan#define MSGRNG_STNID_CMP_0      108
175107572Sgrehan#define MSGRNG_STNID_CMP_1      109
176107572Sgrehan#define MSGRNG_STNID_CMP_2      110
177107572Sgrehan#define MSGRNG_STNID_CMP_3      111
178107572Sgrehan#define MSGRNG_STNID_PCIE_0     116
179107572Sgrehan#define MSGRNG_STNID_PCIE_1     117
180107572Sgrehan#define MSGRNG_STNID_PCIE_2     118
181107572Sgrehan#define MSGRNG_STNID_PCIE_3     119
182107572Sgrehan#define MSGRNG_STNID_XLS_PK0    121
183107572Sgrehan
184107572Sgrehan#define MSGRNG_CODE_MAC 0
185209885Snwhitehorn#define MSGRNG_CODE_XGMAC 2
186107572Sgrehan#define MSGRNG_CODE_SEC 0
187115396Skan#define MSGRNG_CODE_BOOT_WAKEUP 200
188107572Sgrehan#define MSGRNG_CODE_SPI4 3
189107572Sgrehan
190107572Sgrehanstatic inline int
191107572Sgrehanmsgrng_xgmac_stid_rfr(int id)
192107572Sgrehan{
193107572Sgrehan	return !id ? MSGRNG_STNID_XMAC0RFR : MSGRNG_STNID_XMAC1RFR;
194107572Sgrehan}
195107572Sgrehan
196107572Sgrehanstatic inline int
197107572Sgrehanmsgrng_xgmac_stid_jfr(int id)
198107572Sgrehan{
199107572Sgrehan	return !id ? MSGRNG_STNID_XMAC0JFR : MSGRNG_STNID_XMAC1JFR;
200107572Sgrehan}
201107572Sgrehan
202107572Sgrehanstatic inline int
203107572Sgrehanmsgrng_xgmac_stid_tx(int id)
204107572Sgrehan{
205107572Sgrehan	return !id ? MSGRNG_STNID_XMAC0_00_TX : MSGRNG_STNID_XMAC1_00_TX;
206107572Sgrehan}
207115396Skan
208107572Sgrehanstatic inline int
209107572Sgrehanmsgrng_gmac_stid_rfr(int id)
210107572Sgrehan{
211107572Sgrehan	return (MSGRNG_STNID_GMACRFR_0);
212107572Sgrehan}
213107572Sgrehan
214107572Sgrehanstatic inline int
215107572Sgrehanmsgrng_gmac_stid_rfr_split_mode(int id)
216209885Snwhitehorn{
217137122Sssouhlal	return ((id >> 1) ? MSGRNG_STNID_GMACRFR_1 : MSGRNG_STNID_GMACRFR_0);
218216695Skib}
219137122Sssouhlal
220137122Sssouhlalstatic inline int
221137122Sssouhlalmsgrng_gmac_stid_jfr(int id)
222137122Sssouhlal{
223137122Sssouhlal	return MSGRNG_STNID_GMACJFR_0;
224137122Sssouhlal}
225137122Sssouhlal
226137122Sssouhlalstatic inline int
227209885Snwhitehornmsgrng_gmac_stid_jfr_split_mode(int id)
228137122Sssouhlal{
229216695Skib	return ((id >> 1) ? MSGRNG_STNID_GMACJFR_1 : MSGRNG_STNID_GMACJFR_0);
230137122Sssouhlal}
231137122Sssouhlal
232137122Sssouhlalstatic inline int
233137122Sssouhlalmsgrng_gmac_stid_tx(int id)
234137122Sssouhlal{
235137122Sssouhlal	return (MSGRNG_STNID_GMACTX0 + id);
236137122Sssouhlal}
237137122Sssouhlal
238137122Sssouhlalstatic inline void
239137122Sssouhlalmsgrng_send(unsigned int stid)
240137122Sssouhlal{
241137122Sssouhlal	__asm__ volatile (
242137122Sssouhlal	             ".set push\n"
243137122Sssouhlal	             ".set noreorder\n"
244137122Sssouhlal	             "sync\n"
245137122Sssouhlal	    //       "msgsnd %0\n"
246137122Sssouhlal	             "move  $8, %0\n"
247137122Sssouhlal	             "c2    0x80001\n"
248137122Sssouhlal	             ".set pop\n"
249137122Sssouhlal	    ::       "r" (stid):"$8"
250137122Sssouhlal	);
251137122Sssouhlal}
252161799Smarcel
253137122Sssouhlalstatic inline void
254137122Sssouhlalmsgrng_receive(unsigned int pri)
255137122Sssouhlal{
256209885Snwhitehorn	__asm__ volatile (
257137122Sssouhlal	             ".set push\n"
258216695Skib	             ".set noreorder\n"
259137122Sssouhlal	    //       "msgld %0\n"
260137122Sssouhlal	             "move $8, %0\n"
261137122Sssouhlal	             "c2   0x80002\n"
262137122Sssouhlal	             ".set pop\n"
263137122Sssouhlal	    ::       "r" (pri):"$8"
264137122Sssouhlal	);
265137122Sssouhlal}
266137122Sssouhlalstatic inline void
267137122Sssouhlalmsgrng_wait(unsigned int mask)
268107572Sgrehan{
269209885Snwhitehorn	__asm__ volatile (
270107572Sgrehan	             ".set push\n"
271115396Skan	             ".set noreorder\n"
272107572Sgrehan	    //       "msgwait %0\n"
273107572Sgrehan	             "move $8, %0\n"
274115396Skan	             "c2   0x80003\n"
275107572Sgrehan	             ".set pop\n"
276107572Sgrehan	    ::       "r" (mask):"$8"
277107572Sgrehan	);
278107572Sgrehan}
279107572Sgrehan
280107572Sgrehan#define msgrng_enable(flags)                        \
281107572Sgrehando {                                                \
282216695Skib  __asm__ volatile (                                \
283107572Sgrehan		    ".set push\n\t"                 \
284107572Sgrehan		    ".set reorder\n\t"              \
285107572Sgrehan		    ".set noat\n\t"                 \
286107572Sgrehan		    "mfc0 %0, $12\n\t"              \
287209885Snwhitehorn		    "li  $8, 0x40000001\n\t"        \
288107572Sgrehan		    "or  $1, %0, $8\n\t"            \
289107572Sgrehan		    "xori $1, 1\n\t"                \
290107572Sgrehan		    ".set noreorder\n\t"            \
291107572Sgrehan		    "mtc0 $1, $12\n\t"              \
292107572Sgrehan		    ".set\tpop\n\t"                 \
293107572Sgrehan		    : "=r" (flags)                  \
294171462Smarcel		    :                               \
295209885Snwhitehorn		    : "$8"                          \
296209885Snwhitehorn		    );                              \
297209885Snwhitehorn} while (0)
298209885Snwhitehorn
299171462Smarcel#define msgrng_disable(flags) __asm__ volatile (    \
300107572Sgrehan                 "mtc0 %0, $12" : : "r" (flags))
301107572Sgrehan
302107572Sgrehan#define msgrng_flags_save(flags) msgrng_enable(flags)
303107572Sgrehan#define msgrng_flags_restore(flags) msgrng_disable(flags)
304115396Skan
305107572Sgrehanstruct msgrng_msg {
306107572Sgrehan	__uint64_t msg0;
307107572Sgrehan	__uint64_t msg1;
308107572Sgrehan	__uint64_t msg2;
309216695Skib	__uint64_t msg3;
310216695Skib};
311107572Sgrehan
312107572Sgrehanstatic inline void
313107572Sgrehanmessage_send_block_fast(int size, unsigned int code, unsigned int stid,
314107572Sgrehan    unsigned long long msg0, unsigned long long msg1,
315209885Snwhitehorn    unsigned long long msg2, unsigned long long msg3)
316209885Snwhitehorn{
317209885Snwhitehorn	__asm__ __volatile__(".set push\n"
318107572Sgrehan	            ".set noreorder\n"
319107572Sgrehan	            ".set mips64\n"
320107572Sgrehan	            "dmtc2 %1, $0, 0\n"
321209885Snwhitehorn	            "dmtc2 %2, $0, 1\n"
322107572Sgrehan	            "dmtc2 %3, $0, 2\n"
323107572Sgrehan	            "dmtc2 %4, $0, 3\n"
324107572Sgrehan	            "move $8, %0\n"
325107572Sgrehan	            "1: c2 0x80001\n"
326107572Sgrehan	            "mfc2 $8, $2\n"
327107572Sgrehan	            "andi $8, $8, 0x6\n"
328209885Snwhitehorn	            "bnez $8, 1b\n"
329209885Snwhitehorn	            "move $8, %0\n"
330209885Snwhitehorn	            ".set pop\n"
331107572Sgrehan	    :
332107572Sgrehan	    :       "r"(((size - 1) << 16) | (code << 8) | stid), "r"(msg0), "r"(msg1), "r"(msg2), "r"(msg3)
333107572Sgrehan	    :       "$8"
334209885Snwhitehorn	);
335209885Snwhitehorn}
336209885Snwhitehorn
337209885Snwhitehorn#define message_receive_fast(bucket, size, code, stid, msg0, msg1, msg2, msg3)      \
338209885Snwhitehorn        ( { unsigned int _status=0, _tmp=0;                     \
339107572Sgrehan           msgrng_receive(bucket);                              \
340209885Snwhitehorn           while ( (_status=msgrng_read_status()) & 0x08) ;     \
341107572Sgrehan           _tmp = _status & 0x30;                               \
342209885Snwhitehorn           if (__builtin_expect((!_tmp), 1)) {                  \
343107572Sgrehan                 (size)=((_status & 0xc0)>>6)+1;                \
344209885Snwhitehorn                 (code)=(_status & 0xff00)>>8;                  \
345209885Snwhitehorn                 (stid)=(_status & 0x7f0000)>>16;               \
346209885Snwhitehorn                 (msg0)=msgrng_load_rx_msg0();                  \
347209885Snwhitehorn                 (msg1)=msgrng_load_rx_msg1();                  \
348107572Sgrehan                 (msg2)=msgrng_load_rx_msg2();                  \
349107572Sgrehan                 (msg3)=msgrng_load_rx_msg3();                  \
350107572Sgrehan                 _tmp=0;                                        \
351107572Sgrehan                }                                               \
352107572Sgrehan           _tmp;                                                \
353107572Sgrehan        } )
354107572Sgrehan
355107572Sgrehanstatic __inline__ int
356107572Sgrehanmessage_send(unsigned int size, unsigned int code,
357107572Sgrehan    unsigned int stid, struct msgrng_msg *msg)
358107572Sgrehan{
359107572Sgrehan	unsigned int dest = 0;
360107572Sgrehan	unsigned long long status = 0;
361107572Sgrehan	int i = 0;
362107572Sgrehan
363115396Skan	msgrng_load_tx_msg0(msg->msg0);
364107572Sgrehan	msgrng_load_tx_msg1(msg->msg1);
365107572Sgrehan	msgrng_load_tx_msg2(msg->msg2);
366107572Sgrehan	msgrng_load_tx_msg3(msg->msg3);
367107572Sgrehan
368107572Sgrehan	dest = ((size - 1) << 16) | (code << 8) | (stid);
369107572Sgrehan
370107572Sgrehan	//dbg_msg("Sending msg<%Lx,%Lx,%Lx,%Lx> to dest = %x\n",
371107572Sgrehan	    //msg->msg0, msg->msg1, msg->msg2, msg->msg3, dest);
372107572Sgrehan
373107572Sgrehan	msgrng_send(dest);
374107572Sgrehan
375107572Sgrehan	for (i = 0; i < 16; i++) {
376107572Sgrehan		status = msgrng_read_status();
377107572Sgrehan		//dbg_msg("status = %Lx\n", status);
378107572Sgrehan
379107572Sgrehan		if (status & 0x6) {
380107572Sgrehan			continue;
381107572Sgrehan		} else
382216695Skib			break;
383107572Sgrehan	}
384107572Sgrehan	if (i == 16) {
385107572Sgrehan		if (dest == 0x61)
386107572Sgrehan			//dbg_msg("Processor %x: Unable to send msg to %llx\n", processor_id(), dest);
387107572Sgrehan		return status & 0x6;
388107572Sgrehan	}
389107572Sgrehan	return msgrng_read_status() & 0x06;
390107572Sgrehan}
391107572Sgrehan
392107572Sgrehanstatic __inline__ int
393107572Sgrehanmessage_send_retry(unsigned int size, unsigned int code,
394107572Sgrehan    unsigned int stid, struct msgrng_msg *msg)
395107572Sgrehan{
396216695Skib	int res = 0;
397107572Sgrehan	int retry = 0;
398107572Sgrehan
399107572Sgrehan	for (;;) {
400107572Sgrehan		res = message_send(size, code, stid, msg);
401107572Sgrehan		/* retry a pending fail */
402107572Sgrehan		if (res & 0x02)
403107572Sgrehan			continue;
404107572Sgrehan		/* credit fail */
405107572Sgrehan		if (res & 0x04)
406107572Sgrehan			retry++;
407107572Sgrehan		else
408107572Sgrehan			break;
409107572Sgrehan		if (retry == 4)
410107572Sgrehan			return res & 0x06;
411212497Snwhitehorn	}
412212497Snwhitehorn
413212497Snwhitehorn	return 0;
414212497Snwhitehorn}
415212497Snwhitehorn
416212497Snwhitehornstatic __inline__ int
417212497Snwhitehornmessage_receive(int pri, int *size, int *code, int *src_id,
418107572Sgrehan    struct msgrng_msg *msg)
419107572Sgrehan{
420107572Sgrehan	int res = message_receive_fast(pri, *size, *code, *src_id, msg->msg0, msg->msg1, msg->msg2, msg->msg3);
421107572Sgrehan
422107572Sgrehan#ifdef MSGRING_DUMP_MESSAGES
423107572Sgrehan	if (!res) {
424107572Sgrehan		dbg_msg("Received msg <%llx, %llx, %llx, %llx> <%d,%d,%d>\n",
425107572Sgrehan		    msg->msg0, msg->msg1, msg->msg2, msg->msg3,
426107572Sgrehan		    *size, *code, *src_id);
427209885Snwhitehorn	}
428107572Sgrehan#endif
429107572Sgrehan
430107572Sgrehan	return res;
431107572Sgrehan}
432107572Sgrehan
433209885Snwhitehorn#define MSGRNG_STN_RX_QSIZE 256
434209885Snwhitehorn
435209885Snwhitehornstruct stn_cc {
436107572Sgrehan	unsigned short counters[16][8];
437107572Sgrehan};
438107572Sgrehan
439107572Sgrehanstruct bucket_size {
440107572Sgrehan	unsigned short bucket[128];
441107572Sgrehan};
442107572Sgrehan
443209885Snwhitehornextern struct bucket_size bucket_sizes;
444209885Snwhitehorn
445209885Snwhitehornextern struct stn_cc cc_table_cpu_0;
446209885Snwhitehornextern struct stn_cc cc_table_cpu_1;
447209885Snwhitehornextern struct stn_cc cc_table_cpu_2;
448209885Snwhitehornextern struct stn_cc cc_table_cpu_3;
449209885Snwhitehornextern struct stn_cc cc_table_cpu_4;
450107572Sgrehanextern struct stn_cc cc_table_cpu_5;
451209885Snwhitehornextern struct stn_cc cc_table_cpu_6;
452209885Snwhitehornextern struct stn_cc cc_table_cpu_7;
453209885Snwhitehornextern struct stn_cc cc_table_xgs_0;
454209885Snwhitehornextern struct stn_cc cc_table_xgs_1;
455209885Snwhitehornextern struct stn_cc cc_table_gmac;
456107572Sgrehanextern struct stn_cc cc_table_dma;
457209885Snwhitehornextern struct stn_cc cc_table_sec;
458107572Sgrehan
459107572Sgrehanextern struct bucket_size xls_bucket_sizes;
460107572Sgrehan
461107572Sgrehanextern struct stn_cc xls_cc_table_cpu_0;
462107572Sgrehanextern struct stn_cc xls_cc_table_cpu_1;
463107572Sgrehanextern struct stn_cc xls_cc_table_cpu_2;
464107572Sgrehanextern struct stn_cc xls_cc_table_cpu_3;
465107572Sgrehanextern struct stn_cc xls_cc_table_gmac0;
466133133Sdfrextern struct stn_cc xls_cc_table_gmac1;
467133133Sdfrextern struct stn_cc xls_cc_table_cmp;
468133133Sdfrextern struct stn_cc xls_cc_table_pcie;
469133133Sdfrextern struct stn_cc xls_cc_table_dma;
470209885Snwhitehornextern struct stn_cc xls_cc_table_sec;
471137122Sssouhlal
472133133Sdfr
473133133Sdfr#define msgrng_access_save(lock, mflags) do {                \
474133133Sdfr  if (rmi_spin_mutex_safe) mtx_lock_spin(lock);              \
475133133Sdfr  msgrng_flags_save(mflags);                                 \
476133133Sdfr }while(0)
477133133Sdfr
478133133Sdfr#define msgrng_access_restore(lock, mflags) do {             \
479133133Sdfr  msgrng_flags_restore(mflags);                              \
480133133Sdfr  if (rmi_spin_mutex_safe) mtx_unlock_spin(lock);            \
481209885Snwhitehorn }while(0)
482137122Sssouhlal
483137122Sssouhlal#define msgrng_access_enable(mflags) do {   \
484137122Sssouhlal  critical_enter();                         \
485137122Sssouhlal  msgrng_flags_save(mflags);                \
486137122Sssouhlal} while(0)
487137122Sssouhlal
488137122Sssouhlal#define msgrng_access_disable(mflags) do {   \
489133133Sdfr  msgrng_flags_restore(mflags);              \
490133133Sdfr  critical_exit();                           \
491133133Sdfr} while(0)
492133133Sdfr
493133133Sdfr/*
494209885Snwhitehorn * NOTE: this is not stationid/8, ie the station numbers below are just
495133133Sdfr * for internal use
496133133Sdfr */
497137122Sssouhlalenum {
498137122Sssouhlal	TX_STN_CPU_0,
499137122Sssouhlal	TX_STN_CPU_1,
500137122Sssouhlal	TX_STN_CPU_2,
501133133Sdfr	TX_STN_CPU_3,
502	TX_STN_CPU_4,
503	TX_STN_CPU_5,
504	TX_STN_CPU_6,
505	TX_STN_CPU_7,
506	TX_STN_GMAC,
507	TX_STN_DMA,
508	TX_STN_XGS_0,
509	TX_STN_XGS_1,
510	TX_STN_SAE,
511	TX_STN_GMAC0,
512	TX_STN_GMAC1,
513	TX_STN_CDE,
514	TX_STN_PCIE,
515	TX_STN_INVALID,
516	MAX_TX_STNS
517};
518
519extern int
520register_msgring_handler(int major,
521    void (*action) (int, int, int, int, struct msgrng_msg *, void *),
522    void *dev_id);
523	extern void xlr_msgring_cpu_init(void);
524
525	extern void xlr_msgring_config(void);
526
527#define cpu_to_msgring_bucket(cpu) ((((cpu) >> 2)<<3)|((cpu) & 0x03))
528
529#endif
530