1/*-
2 * Copyright (c) 2010 RMI Technologies Ltd.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29#include <machine/asm.h>
30#include <machine/cpu.h>
31#include <machine/cpuregs.h>
32
33#include "assym.s"
34
35	.text
36	.set	noat
37	.set	noreorder
38
39/*
40 * On XLR the slave processors and threads will be executing boot
41 * loader code on startup. We need to make them run our code before
42 * blowing away boot loader memory.
43 */
44LEAF(mpwait)
45	PTR_LA  gp, _C_LABEL(_gp)
46	PTR_LA  t1, _C_LABEL(xlr_ap_release)
47	mfc0	t2, $15, 1
48	andi	t2, 0x1f
49	sll	t2, t2, 2
50	add	t1, t2
51
521:	lw	t0, 0(t1)
53	bnez	t0, 2f
54	nop     /* We should not busy wait in core0 threads */
55	nop     /* on bootup, this will slow the cpu0 thread */
56	nop     /* down - TODO - wait with IPI based wakeup */
57	nop
58	nop
59	nop
60	nop
61	nop
62	j	1b
63	nop
642:
65	PTR_LA  t1, _C_LABEL(mpentry)
66	jr	t1
67	nop
68END(mpwait)
69