1/*- 2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights 3 * reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in 13 * the documentation and/or other materials provided with the 14 * distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * NETLOGIC_BSD 29 * $FreeBSD$ 30 */ 31 32#ifndef __NLM_USB_H__ 33#define __NLM_USB_H__ 34 35#define USB_CTL_0 0x01 36#define USB_PHY_0 0x0A 37#define USB_PHY_RESET 0x01 38#define USB_PHY_PORT_RESET_0 0x10 39#define USB_PHY_PORT_RESET_1 0x20 40#define USB_CONTROLLER_RESET 0x01 41#define USB_INT_STATUS 0x0E 42#define USB_INT_EN 0x0F 43#define USB_PHY_INTERRUPT_EN 0x01 44#define USB_OHCI_INTERRUPT_EN 0x02 45#define USB_OHCI_INTERRUPT1_EN 0x04 46#define USB_OHCI_INTERRUPT2_EN 0x08 47#define USB_CTRL_INTERRUPT_EN 0x10 48 49 50#if !defined(LOCORE) && !defined(__ASSEMBLY__) 51 52#define nlm_read_usb_reg(b, r) nlm_read_reg(b,r) 53#define nlm_write_usb_reg(b, r, v) nlm_write_reg(b,r,v) 54#define nlm_get_usb_pcibase(node, inst) nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst)) 55#define nlm_get_usb_hcd_base(node, inst) nlm_xkphys_map_pcibar0(nlm_get_usb_pcibase(node, inst)) 56#define nlm_get_usb_regbase(node, inst) (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) 57 58#endif 59#endif 60