1/*	$OpenBSD: regnum.h,v 1.3 1999/01/27 04:46:06 imp Exp $	*/
2
3/*-
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1992, 1993
6 *	The Regents of the University of California.  All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department and Ralph Campbell.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 * 4. Neither the name of the University nor the names of its contributors
21 *    may be used to endorse or promote products derived from this software
22 *    without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 *	from: Utah Hdr: reg.h 1.1 90/07/09
37 *	@(#)reg.h	8.2 (Berkeley) 1/11/94
38 *	JNPR: regnum.h,v 1.6 2007/08/09 11:23:32 katta
39 * $FreeBSD$
40 */
41
42#ifndef _MACHINE_REGNUM_H_
43#define	_MACHINE_REGNUM_H_
44
45/* This must match the numbers
46 * in pcb.h and is used by
47 * swtch.S
48 */
49#define PREG_S0	0
50#define PREG_S1	1
51#define PREG_S2	2
52#define PREG_S3	3
53#define PREG_S4	4
54#define PREG_S5	5
55#define PREG_S6	6
56#define PREG_S7	7
57#define PREG_SP	8
58#define PREG_S8	9
59#define PREG_RA	10
60#define PREG_SR	11
61#define PREG_GP	12
62#define PREG_PC	13
63
64/*
65 * Location of the saved registers relative to ZERO.
66 * This must match struct trapframe defined in frame.h exactly.
67 */
68#define	ZERO	0
69#define	AST	1
70#define	V0	2
71#define	V1	3
72#define	A0	4
73#define	A1	5
74#define	A2	6
75#define	A3	7
76#define	T0	8
77#define	T1	9
78#define	T2	10
79#define	T3	11
80#define	TA0	12
81#define	TA1	13
82#define	TA2	14
83#define	TA3	15
84#define	S0	16
85#define	S1	17
86#define	S2	18
87#define	S3	19
88#define	S4	20
89#define	S5	21
90#define	S6	22
91#define	S7	23
92#define	T8	24
93#define	T9	25
94#define	K0	26
95#define	K1	27
96#define	GP	28
97#define	SP	29
98#define	S8	30
99#define	RA	31
100#define	SR	32
101#define	PS	SR	/* alias for SR */
102#define	MULLO	33
103#define	MULHI	34
104#define	BADVADDR 35
105#define	CAUSE	36
106#define	PC	37
107/*
108 * IC is valid only on RM7K and RM9K processors. Access to this is
109 * controlled by IC_INT_REG which defined in kernel config
110 */
111#define	IC	38
112#define	DUMMY	39	/* for 8 byte alignment */
113#define	NUMSAVEREGS 40
114
115/*
116 * Index of FP registers in 'struct frame', counting from the beginning
117 * of the frame (i.e., including the general registers).
118 */
119#define	FPBASE	NUMSAVEREGS
120#define	F0	(FPBASE+0)
121#define	F1	(FPBASE+1)
122#define	F2	(FPBASE+2)
123#define	F3	(FPBASE+3)
124#define	F4	(FPBASE+4)
125#define	F5	(FPBASE+5)
126#define	F6	(FPBASE+6)
127#define	F7	(FPBASE+7)
128#define	F8	(FPBASE+8)
129#define	F9	(FPBASE+9)
130#define	F10	(FPBASE+10)
131#define	F11	(FPBASE+11)
132#define	F12	(FPBASE+12)
133#define	F13	(FPBASE+13)
134#define	F14	(FPBASE+14)
135#define	F15	(FPBASE+15)
136#define	F16	(FPBASE+16)
137#define	F17	(FPBASE+17)
138#define	F18	(FPBASE+18)
139#define	F19	(FPBASE+19)
140#define	F20	(FPBASE+20)
141#define	F21	(FPBASE+21)
142#define	F22	(FPBASE+22)
143#define	F23	(FPBASE+23)
144#define	F24	(FPBASE+24)
145#define	F25	(FPBASE+25)
146#define	F26	(FPBASE+26)
147#define	F27	(FPBASE+27)
148#define	F28	(FPBASE+28)
149#define	F29	(FPBASE+29)
150#define	F30	(FPBASE+30)
151#define	F31	(FPBASE+31)
152#define	FSR	(FPBASE+32)
153#define FSR_DUMMY (FPBASE+33) /* For 8 byte alignment */
154
155#define	NUMFPREGS	34
156
157#define	NREGS	(NUMSAVEREGS + NUMFPREGS)
158
159/*
160 * Index of FP registers in 'struct frame', relative to the base
161 * of the FP registers in frame (i.e., *not* including the general
162 * registers).
163 */
164#define	F0_NUM	(0)
165#define	F1_NUM	(1)
166#define	F2_NUM	(2)
167#define	F3_NUM	(3)
168#define	F4_NUM	(4)
169#define	F5_NUM	(5)
170#define	F6_NUM	(6)
171#define	F7_NUM	(7)
172#define	F8_NUM	(8)
173#define	F9_NUM	(9)
174#define	F10_NUM	(10)
175#define	F11_NUM	(11)
176#define	F12_NUM	(12)
177#define	F13_NUM	(13)
178#define	F14_NUM	(14)
179#define	F15_NUM	(15)
180#define	F16_NUM	(16)
181#define	F17_NUM	(17)
182#define	F18_NUM	(18)
183#define	F19_NUM	(19)
184#define	F20_NUM	(20)
185#define	F21_NUM	(21)
186#define	F22_NUM	(22)
187#define	F23_NUM	(23)
188#define	F24_NUM	(24)
189#define	F25_NUM	(25)
190#define	F26_NUM	(26)
191#define	F27_NUM	(27)
192#define	F28_NUM	(28)
193#define	F29_NUM	(29)
194#define	F30_NUM	(30)
195#define	F31_NUM	(31)
196#define	FSR_NUM	(32)
197
198#endif /* !_MACHINE_REGNUM_H_ */
199