1/*-
2 * Copyright (c) 2004 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33
34#include <machine/bus.h>
35#include <machine/vmparam.h>
36
37#include <dev/uart/uart.h>
38#include <dev/uart/uart_cpu.h>
39
40#define	UART_TAG_BR	0
41#define	UART_TAG_CH	1
42#define	UART_TAG_DB	2
43#define	UART_TAG_DT	3
44#define	UART_TAG_IO	4
45#define	UART_TAG_MM	5
46#define	UART_TAG_PA	6
47#define	UART_TAG_RS	7
48#define	UART_TAG_SB	8
49#define	UART_TAG_XO	9
50
51static struct uart_class *uart_classes[] = {
52	&uart_ns8250_class,
53	&uart_sab82532_class,
54	&uart_z8530_class,
55};
56static size_t uart_nclasses = sizeof(uart_classes) / sizeof(uart_classes[0]);
57
58static bus_addr_t
59uart_parse_addr(__const char **p)
60{
61	return (strtoul(*p, (char**)(uintptr_t)p, 0));
62}
63
64static struct uart_class *
65uart_parse_class(struct uart_class *class, __const char **p)
66{
67	struct uart_class *uc;
68	const char *nm;
69	size_t len;
70	u_int i;
71
72	for (i = 0; i < uart_nclasses; i++) {
73		uc = uart_classes[i];
74		nm = uart_getname(uc);
75		if (nm == NULL || *nm == '\0')
76			continue;
77		len = strlen(nm);
78		if (strncmp(nm, *p, len) == 0) {
79			*p += len;
80			return (uc);
81		}
82	}
83	return (class);
84}
85
86static long
87uart_parse_long(__const char **p)
88{
89	return (strtol(*p, (char**)(uintptr_t)p, 0));
90}
91
92static int
93uart_parse_parity(__const char **p)
94{
95	if (!strncmp(*p, "even", 4)) {
96		*p += 4;
97		return UART_PARITY_EVEN;
98	}
99	if (!strncmp(*p, "mark", 4)) {
100		*p += 4;
101		return UART_PARITY_MARK;
102	}
103	if (!strncmp(*p, "none", 4)) {
104		*p += 4;
105		return UART_PARITY_NONE;
106	}
107	if (!strncmp(*p, "odd", 3)) {
108		*p += 3;
109		return UART_PARITY_ODD;
110	}
111	if (!strncmp(*p, "space", 5)) {
112		*p += 5;
113		return UART_PARITY_SPACE;
114	}
115	return (-1);
116}
117
118static int
119uart_parse_tag(__const char **p)
120{
121	int tag;
122
123	if ((*p)[0] == 'b' && (*p)[1] == 'r') {
124		tag = UART_TAG_BR;
125		goto out;
126	}
127	if ((*p)[0] == 'c' && (*p)[1] == 'h') {
128		tag = UART_TAG_CH;
129		goto out;
130	}
131	if ((*p)[0] == 'd' && (*p)[1] == 'b') {
132		tag = UART_TAG_DB;
133		goto out;
134	}
135	if ((*p)[0] == 'd' && (*p)[1] == 't') {
136		tag = UART_TAG_DT;
137		goto out;
138	}
139	if ((*p)[0] == 'i' && (*p)[1] == 'o') {
140		tag = UART_TAG_IO;
141		goto out;
142	}
143	if ((*p)[0] == 'm' && (*p)[1] == 'm') {
144		tag = UART_TAG_MM;
145		goto out;
146	}
147	if ((*p)[0] == 'p' && (*p)[1] == 'a') {
148		tag = UART_TAG_PA;
149		goto out;
150	}
151	if ((*p)[0] == 'r' && (*p)[1] == 's') {
152		tag = UART_TAG_RS;
153		goto out;
154	}
155	if ((*p)[0] == 's' && (*p)[1] == 'b') {
156		tag = UART_TAG_SB;
157		goto out;
158	}
159	if ((*p)[0] == 'x' && (*p)[1] == 'o') {
160		tag = UART_TAG_XO;
161		goto out;
162	}
163	return (-1);
164
165out:
166	*p += 2;
167	if ((*p)[0] != ':')
168		return (-1);
169	(*p)++;
170	return (tag);
171}
172
173/*
174 * Parse a device specification. The specification is a list of attributes
175 * separated by commas. Each attribute is a tag-value pair with the tag and
176 * value separated by a colon. Supported tags are:
177 *
178 *	br = Baudrate
179 *	ch = Channel
180 *	db = Data bits
181 *	dt = Device type
182 *	io = I/O port address
183 *	mm = Memory mapped I/O address
184 *	pa = Parity
185 *	rs = Register shift
186 *	sb = Stopbits
187 *	xo = Device clock (xtal oscillator)
188 *
189 * The io and mm tags are mutually exclusive.
190 */
191
192int
193uart_getenv(int devtype, struct uart_devinfo *di, struct uart_class *class)
194{
195	__const char *spec;
196	bus_addr_t addr = ~0U;
197	int error;
198
199	/*
200	 * All uart_class references are weak. Make sure the default
201	 * device class has been compiled-in.
202	 */
203	if (class == NULL)
204		return (ENXIO);
205
206	/*
207	 * Check the environment variables "hw.uart.console" and
208	 * "hw.uart.dbgport". These variables, when present, specify
209	 * which UART port is to be used as serial console or debug
210	 * port (resp).
211	 */
212	if (devtype == UART_DEV_CONSOLE)
213		spec = getenv("hw.uart.console");
214	else if (devtype == UART_DEV_DBGPORT)
215		spec = getenv("hw.uart.dbgport");
216	else
217		spec = NULL;
218	if (spec == NULL)
219		return (ENXIO);
220
221	/* Set defaults. */
222	di->bas.chan = 0;
223	di->bas.regshft = 0;
224	di->bas.rclk = 0;
225	di->baudrate = 0;
226	di->databits = 8;
227	di->stopbits = 1;
228	di->parity = UART_PARITY_NONE;
229
230	/* Parse the attributes. */
231	while (1) {
232		switch (uart_parse_tag(&spec)) {
233		case UART_TAG_BR:
234			di->baudrate = uart_parse_long(&spec);
235			break;
236		case UART_TAG_CH:
237			di->bas.chan = uart_parse_long(&spec);
238			break;
239		case UART_TAG_DB:
240			di->databits = uart_parse_long(&spec);
241			break;
242		case UART_TAG_DT:
243			class = uart_parse_class(class, &spec);
244			break;
245		case UART_TAG_IO:
246			di->bas.bst = uart_bus_space_io;
247			addr = uart_parse_addr(&spec);
248			break;
249		case UART_TAG_MM:
250			di->bas.bst = uart_bus_space_mem;
251			addr = uart_parse_addr(&spec);
252			break;
253		case UART_TAG_PA:
254			di->parity = uart_parse_parity(&spec);
255			break;
256		case UART_TAG_RS:
257			di->bas.regshft = uart_parse_long(&spec);
258			break;
259		case UART_TAG_SB:
260			di->stopbits = uart_parse_long(&spec);
261			break;
262		case UART_TAG_XO:
263			di->bas.rclk = uart_parse_long(&spec);
264			break;
265		default:
266			return (EINVAL);
267		}
268		if (*spec == '\0')
269			break;
270		if (*spec != ',')
271			return (EINVAL);
272		spec++;
273	}
274
275	/*
276	 * If we still have an invalid address, the specification must be
277	 * missing an I/O port or memory address. We don't like that.
278	 */
279	if (addr == ~0U)
280		return (EINVAL);
281
282	/*
283	 * Accept only the well-known baudrates. Any invalid baudrate
284	 * is silently replaced with a 0-valued baudrate. The 0 baudrate
285	 * has special meaning. It means that we're not supposed to
286	 * program the baudrate and simply communicate with whatever
287	 * speed the hardware is currently programmed for.
288	 */
289	if (di->baudrate >= 19200) {
290		if (di->baudrate % 19200)
291			di->baudrate = 0;
292	} else if (di->baudrate >= 1200) {
293		if (di->baudrate % 1200)
294			di->baudrate = 0;
295	} else if (di->baudrate > 0) {
296		if (di->baudrate % 75)
297			di->baudrate = 0;
298	} else
299		di->baudrate = 0;
300
301	/* Set the ops and create a bus space handle. */
302	di->ops = uart_getops(class);
303	error = bus_space_map(di->bas.bst, addr, uart_getrange(class), 0,
304	    &di->bas.bsh);
305	return (error);
306}
307