1/*-
2 * Copyright 2009 Solarflare Communications Inc.  All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD$
26 */
27
28#ifndef _SYS_SIENA_IMPL_H
29#define	_SYS_SIENA_IMPL_H
30
31#include "efx.h"
32#include "efx_regs.h"
33#include "efx_mcdi.h"
34#include "siena_flash.h"
35
36#ifdef	__cplusplus
37extern "C" {
38#endif
39
40#if EFSYS_OPT_PHY_PROPS
41
42/* START MKCONFIG GENERATED SienaPhyHeaderPropsBlock a8db1f8eb5106efd */
43typedef enum siena_phy_prop_e {
44	SIENA_PHY_NPROPS
45} siena_phy_prop_t;
46
47/* END MKCONFIG GENERATED SienaPhyHeaderPropsBlock */
48
49#endif  /* EFSYS_OPT_PHY_PROPS */
50
51#define	SIENA_NVRAM_CHUNK 0x80
52
53extern	__checkReturn	int
54siena_nic_probe(
55	__in		efx_nic_t *enp);
56
57#if EFSYS_OPT_PCIE_TUNE
58
59extern	__checkReturn	int
60siena_nic_pcie_extended_sync(
61	__in		efx_nic_t *enp);
62
63#endif
64
65extern	__checkReturn	int
66siena_nic_reset(
67	__in		efx_nic_t *enp);
68
69extern	__checkReturn	int
70siena_nic_init(
71	__in		efx_nic_t *enp);
72
73#if EFSYS_OPT_DIAG
74
75extern	__checkReturn	int
76siena_nic_register_test(
77	__in		efx_nic_t *enp);
78
79#endif	/* EFSYS_OPT_DIAG */
80
81extern			void
82siena_nic_fini(
83	__in		efx_nic_t *enp);
84
85extern			void
86siena_nic_unprobe(
87	__in		efx_nic_t *enp);
88
89#define	SIENA_SRAM_ROWS	0x12000
90
91extern			void
92siena_sram_init(
93	__in		efx_nic_t *enp);
94
95#if EFSYS_OPT_DIAG
96
97extern	__checkReturn	int
98siena_sram_test(
99	__in		efx_nic_t *enp,
100	__in		efx_sram_pattern_fn_t func);
101
102#endif	/* EFSYS_OPT_DIAG */
103
104
105#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
106
107extern	__checkReturn		int
108siena_nvram_partn_size(
109	__in			efx_nic_t *enp,
110	__in			unsigned int partn,
111	__out			size_t *sizep);
112
113extern	__checkReturn		int
114siena_nvram_partn_lock(
115	__in			efx_nic_t *enp,
116	__in			unsigned int partn);
117
118extern	__checkReturn		int
119siena_nvram_partn_read(
120	__in			efx_nic_t *enp,
121	__in			unsigned int partn,
122	__in			unsigned int offset,
123	__out_bcount(size)	caddr_t data,
124	__in			size_t size);
125
126extern	__checkReturn		int
127siena_nvram_partn_erase(
128	__in			efx_nic_t *enp,
129	__in			unsigned int partn,
130	__in			unsigned int offset,
131	__in			size_t size);
132
133extern	__checkReturn		int
134siena_nvram_partn_write(
135	__in			efx_nic_t *enp,
136	__in			unsigned int partn,
137	__in			unsigned int offset,
138	__out_bcount(size)	caddr_t data,
139	__in			size_t size);
140
141extern				void
142siena_nvram_partn_unlock(
143	__in			efx_nic_t *enp,
144	__in			unsigned int partn);
145
146extern	__checkReturn		int
147siena_nvram_get_dynamic_cfg(
148	__in			efx_nic_t *enp,
149	__in			unsigned int index,
150	__in			boolean_t vpd,
151	__out			siena_mc_dynamic_config_hdr_t **dcfgp,
152	__out			size_t *sizep);
153
154#endif	/* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
155
156#if EFSYS_OPT_NVRAM
157
158#if EFSYS_OPT_DIAG
159
160extern	__checkReturn		int
161siena_nvram_test(
162	__in			efx_nic_t *enp);
163
164#endif	/* EFSYS_OPT_DIAG */
165
166extern	__checkReturn		int
167siena_nvram_size(
168	__in			efx_nic_t *enp,
169	__in			efx_nvram_type_t type,
170	__out			size_t *sizep);
171
172extern	__checkReturn		int
173siena_nvram_get_version(
174	__in			efx_nic_t *enp,
175	__in			efx_nvram_type_t type,
176	__out			uint32_t *subtypep,
177	__out_ecount(4)		uint16_t version[4]);
178
179extern	__checkReturn		int
180siena_nvram_rw_start(
181	__in			efx_nic_t *enp,
182	__in			efx_nvram_type_t type,
183	__out			size_t *pref_chunkp);
184
185extern	__checkReturn		int
186siena_nvram_read_chunk(
187	__in			efx_nic_t *enp,
188	__in			efx_nvram_type_t type,
189	__in			unsigned int offset,
190	__out_bcount(size)	caddr_t data,
191	__in			size_t size);
192
193extern	 __checkReturn		int
194siena_nvram_erase(
195	__in			efx_nic_t *enp,
196	__in			efx_nvram_type_t type);
197
198extern	__checkReturn		int
199siena_nvram_write_chunk(
200	__in			efx_nic_t *enp,
201	__in			efx_nvram_type_t type,
202	__in			unsigned int offset,
203	__in_bcount(size)	caddr_t data,
204	__in			size_t size);
205
206extern				void
207siena_nvram_rw_finish(
208	__in			efx_nic_t *enp,
209	__in			efx_nvram_type_t type);
210
211extern	__checkReturn		int
212siena_nvram_set_version(
213	__in			efx_nic_t *enp,
214	__in			efx_nvram_type_t type,
215	__out			uint16_t version[4]);
216
217#endif	/* EFSYS_OPT_NVRAM */
218
219#if EFSYS_OPT_VPD
220
221extern	__checkReturn		int
222siena_vpd_init(
223	__in			efx_nic_t *enp);
224
225extern	__checkReturn		int
226siena_vpd_size(
227	__in			efx_nic_t *enp,
228	__out			size_t *sizep);
229
230extern	__checkReturn		int
231siena_vpd_read(
232	__in			efx_nic_t *enp,
233	__out_bcount(size)	caddr_t data,
234	__in			size_t size);
235
236extern	__checkReturn		int
237siena_vpd_verify(
238	__in			efx_nic_t *enp,
239	__in_bcount(size)	caddr_t data,
240	__in			size_t size);
241
242extern	__checkReturn		int
243siena_vpd_reinit(
244	__in			efx_nic_t *enp,
245	__in_bcount(size)	caddr_t data,
246	__in			size_t size);
247
248extern	__checkReturn		int
249siena_vpd_get(
250	__in			efx_nic_t *enp,
251	__in_bcount(size)	caddr_t data,
252	__in			size_t size,
253	__inout			efx_vpd_value_t *evvp);
254
255extern	__checkReturn		int
256siena_vpd_set(
257	__in			efx_nic_t *enp,
258	__in_bcount(size)	caddr_t data,
259	__in			size_t size,
260	__in			efx_vpd_value_t *evvp);
261
262extern	__checkReturn		int
263siena_vpd_next(
264	__in			efx_nic_t *enp,
265	__in_bcount(size)	caddr_t data,
266	__in			size_t size,
267	__out			efx_vpd_value_t *evvp,
268	__inout			unsigned int *contp);
269
270extern __checkReturn		int
271siena_vpd_write(
272	__in			efx_nic_t *enp,
273	__in_bcount(size)	caddr_t data,
274	__in			size_t size);
275
276extern				void
277siena_vpd_fini(
278	__in			efx_nic_t *enp);
279
280#endif	/* EFSYS_OPT_VPD */
281
282typedef struct siena_link_state_s {
283	uint32_t		sls_adv_cap_mask;
284	uint32_t		sls_lp_cap_mask;
285	unsigned int 		sls_fcntl;
286	efx_link_mode_t		sls_link_mode;
287#if EFSYS_OPT_LOOPBACK
288	efx_loopback_type_t	sls_loopback;
289#endif
290	boolean_t		sls_mac_up;
291} siena_link_state_t;
292
293extern			void
294siena_phy_link_ev(
295	__in		efx_nic_t *enp,
296	__in		efx_qword_t *eqp,
297	__out		efx_link_mode_t *link_modep);
298
299extern	__checkReturn	int
300siena_phy_get_link(
301	__in		efx_nic_t *enp,
302	__out		siena_link_state_t *slsp);
303
304extern	__checkReturn	int
305siena_phy_power(
306	__in		efx_nic_t *enp,
307	__in		boolean_t on);
308
309extern	__checkReturn	int
310siena_phy_reconfigure(
311	__in		efx_nic_t *enp);
312
313extern	__checkReturn	int
314siena_phy_verify(
315	__in		efx_nic_t *enp);
316
317extern	__checkReturn	int
318siena_phy_oui_get(
319	__in		efx_nic_t *enp,
320	__out		uint32_t *ouip);
321
322#if EFSYS_OPT_PHY_STATS
323
324extern					void
325siena_phy_decode_stats(
326	__in				efx_nic_t *enp,
327	__in				uint32_t vmask,
328	__in_opt			efsys_mem_t *esmp,
329	__out_opt			uint64_t *smaskp,
330	__out_ecount_opt(EFX_PHY_NSTATS)	uint32_t *stat);
331
332extern	__checkReturn			int
333siena_phy_stats_update(
334	__in				efx_nic_t *enp,
335	__in				efsys_mem_t *esmp,
336	__out_ecount(EFX_PHY_NSTATS)	uint32_t *stat);
337
338#endif	/* EFSYS_OPT_PHY_STATS */
339
340#if EFSYS_OPT_PHY_PROPS
341
342#if EFSYS_OPT_NAMES
343
344extern		const char __cs *
345siena_phy_prop_name(
346	__in	efx_nic_t *enp,
347	__in	unsigned int id);
348
349#endif	/* EFSYS_OPT_NAMES */
350
351extern	__checkReturn	int
352siena_phy_prop_get(
353	__in		efx_nic_t *enp,
354	__in		unsigned int id,
355	__in		uint32_t flags,
356	__out		uint32_t *valp);
357
358extern	__checkReturn	int
359siena_phy_prop_set(
360	__in		efx_nic_t *enp,
361	__in		unsigned int id,
362	__in		uint32_t val);
363
364#endif	/* EFSYS_OPT_PHY_PROPS */
365
366#if EFSYS_OPT_PHY_BIST
367
368extern	__checkReturn		int
369siena_phy_bist_start(
370	__in			efx_nic_t *enp,
371	__in			efx_phy_bist_type_t type);
372
373extern	__checkReturn		int
374siena_phy_bist_poll(
375	__in			efx_nic_t *enp,
376	__in			efx_phy_bist_type_t type,
377	__out			efx_phy_bist_result_t *resultp,
378	__out_opt __drv_when(count > 0, __notnull)
379	uint32_t 	*value_maskp,
380	__out_ecount_opt(count)	__drv_when(count > 0, __notnull)
381	unsigned long	*valuesp,
382	__in			size_t count);
383
384extern				void
385siena_phy_bist_stop(
386	__in			efx_nic_t *enp,
387	__in			efx_phy_bist_type_t type);
388
389#endif	/* EFSYS_OPT_PHY_BIST */
390
391extern	__checkReturn	int
392siena_mac_poll(
393	__in		efx_nic_t *enp,
394	__out		efx_link_mode_t *link_modep);
395
396extern	__checkReturn	int
397siena_mac_up(
398	__in		efx_nic_t *enp,
399	__out		boolean_t *mac_upp);
400
401extern	__checkReturn	int
402siena_mac_reconfigure(
403	__in	efx_nic_t *enp);
404
405#if EFSYS_OPT_LOOPBACK
406
407extern	__checkReturn	int
408siena_mac_loopback_set(
409	__in		efx_nic_t *enp,
410	__in		efx_link_mode_t link_mode,
411	__in		efx_loopback_type_t loopback_type);
412
413#endif	/* EFSYS_OPT_LOOPBACK */
414
415#if EFSYS_OPT_MAC_STATS
416
417extern	__checkReturn			int
418siena_mac_stats_clear(
419	__in				efx_nic_t *enp);
420
421extern	__checkReturn			int
422siena_mac_stats_upload(
423	__in				efx_nic_t *enp,
424	__in				efsys_mem_t *esmp);
425
426extern	__checkReturn			int
427siena_mac_stats_periodic(
428	__in				efx_nic_t *enp,
429	__in				efsys_mem_t *esmp,
430	__in				uint16_t period_ms,
431	__in				boolean_t events);
432
433extern	__checkReturn			int
434siena_mac_stats_update(
435	__in				efx_nic_t *enp,
436	__in				efsys_mem_t *esmp,
437	__out_ecount(EFX_MAC_NSTATS)	efsys_stat_t *stat,
438	__out_opt			uint32_t *generationp);
439
440#endif	/* EFSYS_OPT_MAC_STATS */
441
442extern	__checkReturn	int
443siena_mon_reset(
444	__in		efx_nic_t *enp);
445
446extern	__checkReturn	int
447siena_mon_reconfigure(
448	__in		efx_nic_t *enp);
449
450#if EFSYS_OPT_MON_STATS
451
452extern					void
453siena_mon_decode_stats(
454	__in				efx_nic_t *enp,
455	__in				uint32_t dmask,
456	__in_opt			efsys_mem_t *esmp,
457	__out_opt				uint32_t *vmaskp,
458	__out_ecount_opt(EFX_MON_NSTATS)	efx_mon_stat_value_t *value);
459
460extern	__checkReturn			int
461siena_mon_ev(
462	__in				efx_nic_t *enp,
463	__in				efx_qword_t *eqp,
464	__out				efx_mon_stat_t *idp,
465	__out				efx_mon_stat_value_t *valuep);
466
467extern	__checkReturn			int
468siena_mon_stats_update(
469	__in				efx_nic_t *enp,
470	__in				efsys_mem_t *esmp,
471	__out_ecount(EFX_MON_NSTATS)	efx_mon_stat_value_t *values);
472
473#endif	/* EFSYS_OPT_MON_STATS */
474
475#ifdef	__cplusplus
476}
477#endif
478
479#endif	/* _SYS_SIENA_IMPL_H */
480