pcib_private.h revision 107172 
1/*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 *    derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: head/sys/dev/pci/pcib_private.h 107172 2002-11-22 17:50:47Z jhb $
31 */
32
33#ifndef __PCIB_PRIVATE_H__
34#define	__PCIB_PRIVATE_H__
35
36/*
37 * Export portions of generic PCI:PCI bridge support so that it can be
38 * used by subclasses.
39 */
40
41/*
42 * Bridge-specific data.
43 */
44struct pcib_softc
45{
46    device_t	dev;
47    u_int16_t	command;	/* command register */
48    u_int8_t	secbus;		/* secondary bus number */
49    u_int8_t	subbus;		/* subordinate bus number */
50    pci_addr_t	pmembase;	/* base address of prefetchable memory */
51    pci_addr_t	pmemlimit;	/* topmost address of prefetchable memory */
52    pci_addr_t	membase;	/* base address of memory window */
53    pci_addr_t	memlimit;	/* topmost address of memory window */
54    u_int32_t	iobase;		/* base address of port window */
55    u_int32_t	iolimit;	/* topmost address of port window */
56    u_int16_t	secstat;	/* secondary bus status register */
57    u_int16_t	bridgectl;	/* bridge control register */
58    u_int8_t	seclat;		/* secondary bus latency timer */
59};
60
61typedef u_int32_t pci_read_config_fn(int b, int s, int f, int reg, int width);
62
63int		host_pcib_get_busno(pci_read_config_fn read_config, int bus,
64    int slot, int func, u_int8_t *busnum);
65int		pcib_attach(device_t dev);
66void		pcib_attach_common(device_t dev);
67int		pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
68int		pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
69struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
70					    u_long start, u_long end, u_long count, u_int flags);
71int		pcib_maxslots(device_t dev);
72u_int32_t	pcib_read_config(device_t dev, int b, int s, int f, int reg, int width);
73void		pcib_write_config(device_t dev, int b, int s, int f, int reg, u_int32_t val, int width);
74
75extern devclass_t pcib_devclass;
76
77#endif
78