1/*- 2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>. 3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $Id: if_nv.c,v 1.19 2004/08/12 14:00:05 q Exp $ 28 */ 29/* 30 * NVIDIA nForce MCP Networking Adapter driver 31 * 32 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA 33 * through their web site. 34 * 35 * All mainstream nForce and nForce2 motherboards are supported. This module 36 * is as stable, sometimes more stable, than the linux version. (Recent 37 * Linux stability issues seem to be related to some issues with newer 38 * distributions using GCC 3.x, however this don't appear to effect FreeBSD 39 * 5.x). 40 * 41 * In accordance with the NVIDIA distribution license it is necessary to 42 * link this module against the nvlibnet.o binary object included in the 43 * Linux driver source distribution. The binary component is not modified in 44 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c 45 * linux kernel module "wrapper". 46 * 47 * The Linux driver uses a common code API that is shared between Win32 and 48 * i386 Linux. This abstracts the low level driver functions and uses 49 * callbacks and hooks to access the underlying hardware device. By using 50 * this same API in a FreeBSD kernel module it is possible to support the 51 * hardware without breaching the Linux source distributions licensing 52 * requirements, or obtaining the hardware programming specifications. 53 * 54 * Although not conventional, it works, and given the relatively small 55 * amount of hardware centric code, it's hopefully no more buggy than its 56 * linux counterpart. 57 * 58 * NVIDIA now support the nForce3 AMD64 platform, however I have been 59 * unable to access such a system to verify support. However, the code is 60 * reported to work with little modification when compiled with the AMD64 61 * version of the NVIDIA Linux library. All that should be necessary to make 62 * the driver work is to link it directly into the kernel, instead of as a 63 * module, and apply the docs/amd64.diff patch in this source distribution to 64 * the NVIDIA Linux driver source. 65 * 66 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well 67 * as recent versions of DragonFly. 68 * 69 * Written by Quinton Dolan <q@onthenet.com.au> 70 * Portions based on existing FreeBSD network drivers. 71 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files. 72 */ 73 74#include <sys/cdefs.h> 75__FBSDID("$FreeBSD$"); 76 77#include <sys/param.h> 78#include <sys/systm.h> 79#include <sys/sockio.h> 80#include <sys/mbuf.h> 81#include <sys/malloc.h> 82#include <sys/kernel.h> 83#include <sys/socket.h> 84#include <sys/sysctl.h> 85#include <sys/queue.h> 86#include <sys/module.h> 87 88#include <net/if.h> 89#include <net/if_arp.h> 90#include <net/ethernet.h> 91#include <net/if_dl.h> 92#include <net/if_media.h> 93#include <net/if_types.h> 94#include <net/bpf.h> 95#include <net/if_vlan_var.h> 96 97#include <machine/bus.h> 98#include <machine/resource.h> 99 100#include <vm/vm.h> /* for vtophys */ 101#include <vm/pmap.h> /* for vtophys */ 102#include <sys/bus.h> 103#include <sys/rman.h> 104 105#include <dev/pci/pcireg.h> 106#include <dev/pci/pcivar.h> 107#include <dev/mii/mii.h> 108#include <dev/mii/miivar.h> 109#include "miibus_if.h" 110 111/* Include NVIDIA Linux driver header files */ 112#include <contrib/dev/nve/nvenet_version.h> 113#define linux 114#include <contrib/dev/nve/basetype.h> 115#include <contrib/dev/nve/phy.h> 116#include "os+%DIKED-nve.h" 117#include <contrib/dev/nve/drvinfo.h> 118#include <contrib/dev/nve/adapter.h> 119#undef linux 120 121#include <dev/nve/if_nvereg.h> 122 123MODULE_DEPEND(nve, pci, 1, 1, 1); 124MODULE_DEPEND(nve, ether, 1, 1, 1); 125MODULE_DEPEND(nve, miibus, 1, 1, 1); 126 127static int nve_probe(device_t); 128static int nve_attach(device_t); 129static int nve_detach(device_t); 130static void nve_init(void *); 131static void nve_init_locked(struct nve_softc *); 132static void nve_stop(struct nve_softc *); 133static int nve_shutdown(device_t); 134static int nve_init_rings(struct nve_softc *); 135static void nve_free_rings(struct nve_softc *); 136 137static void nve_ifstart(struct ifnet *); 138static void nve_ifstart_locked(struct ifnet *); 139static int nve_ioctl(struct ifnet *, u_long, caddr_t); 140static void nve_intr(void *); 141static void nve_tick(void *); 142static void nve_setmulti(struct nve_softc *); 143static void nve_watchdog(struct nve_softc *); 144static void nve_update_stats(struct nve_softc *); 145 146static int nve_ifmedia_upd(struct ifnet *); 147static void nve_ifmedia_upd_locked(struct ifnet *); 148static void nve_ifmedia_sts(struct ifnet *, struct ifmediareq *); 149static int nve_miibus_readreg(device_t, int, int); 150static int nve_miibus_writereg(device_t, int, int, int); 151 152static void nve_dmamap_cb(void *, bus_dma_segment_t *, int, int); 153static void nve_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int); 154 155static NV_API_CALL NV_SINT32 nve_osalloc(PNV_VOID, PMEMORY_BLOCK); 156static NV_API_CALL NV_SINT32 nve_osfree(PNV_VOID, PMEMORY_BLOCK); 157static NV_API_CALL NV_SINT32 nve_osallocex(PNV_VOID, PMEMORY_BLOCKEX); 158static NV_API_CALL NV_SINT32 nve_osfreeex(PNV_VOID, PMEMORY_BLOCKEX); 159static NV_API_CALL NV_SINT32 nve_osclear(PNV_VOID, PNV_VOID, NV_SINT32); 160static NV_API_CALL NV_SINT32 nve_osdelay(PNV_VOID, NV_UINT32); 161static NV_API_CALL NV_SINT32 nve_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *); 162static NV_API_CALL NV_SINT32 nve_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID); 163static NV_API_CALL NV_SINT32 nve_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32); 164static NV_API_CALL NV_SINT32 nve_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8); 165static NV_API_CALL NV_SINT32 nve_oslinkchg(PNV_VOID, NV_SINT32); 166static NV_API_CALL NV_SINT32 nve_osalloctimer(PNV_VOID, PNV_VOID *); 167static NV_API_CALL NV_SINT32 nve_osfreetimer(PNV_VOID, PNV_VOID); 168static NV_API_CALL NV_SINT32 nve_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID); 169static NV_API_CALL NV_SINT32 nve_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32); 170static NV_API_CALL NV_SINT32 nve_oscanceltimer(PNV_VOID, PNV_VOID); 171 172static NV_API_CALL NV_SINT32 nve_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8); 173static NV_API_CALL PNV_VOID nve_ospreprocpktnopq(PNV_VOID, PNV_VOID); 174static NV_API_CALL NV_SINT32 nve_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32); 175static NV_API_CALL NV_SINT32 nve_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *); 176static NV_API_CALL NV_SINT32 nve_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID); 177static NV_API_CALL NV_SINT32 nve_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID); 178static NV_API_CALL PNV_VOID nve_osreturnbufvirt(PNV_VOID, PNV_VOID); 179 180static device_method_t nve_methods[] = { 181 /* Device interface */ 182 DEVMETHOD(device_probe, nve_probe), 183 DEVMETHOD(device_attach, nve_attach), 184 DEVMETHOD(device_detach, nve_detach), 185 DEVMETHOD(device_shutdown, nve_shutdown), 186 187 /* MII interface */ 188 DEVMETHOD(miibus_readreg, nve_miibus_readreg), 189 DEVMETHOD(miibus_writereg, nve_miibus_writereg), 190 191 DEVMETHOD_END 192}; 193 194static driver_t nve_driver = { 195 "nve", 196 nve_methods, 197 sizeof(struct nve_softc) 198}; 199 200static devclass_t nve_devclass; 201 202static int nve_pollinterval = 0; 203SYSCTL_INT(_hw, OID_AUTO, nve_pollinterval, CTLFLAG_RW, 204 &nve_pollinterval, 0, "delay between interface polls"); 205 206DRIVER_MODULE(nve, pci, nve_driver, nve_devclass, 0, 0); 207DRIVER_MODULE(miibus, nve, miibus_driver, miibus_devclass, 0, 0); 208 209static struct nve_type nve_devs[] = { 210 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN, 211 "NVIDIA nForce MCP Networking Adapter"}, 212 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN, 213 "NVIDIA nForce2 MCP2 Networking Adapter"}, 214 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1, 215 "NVIDIA nForce2 400 MCP4 Networking Adapter"}, 216 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2, 217 "NVIDIA nForce2 400 MCP5 Networking Adapter"}, 218 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1, 219 "NVIDIA nForce3 MCP3 Networking Adapter"}, 220 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN, 221 "NVIDIA nForce3 250 MCP6 Networking Adapter"}, 222 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4, 223 "NVIDIA nForce3 MCP7 Networking Adapter"}, 224 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN1, 225 "NVIDIA nForce4 CK804 MCP8 Networking Adapter"}, 226 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN2, 227 "NVIDIA nForce4 CK804 MCP9 Networking Adapter"}, 228 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1, 229 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP10 230 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2, 231 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP11 232 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN1, 233 "NVIDIA nForce 430 MCP12 Networking Adapter"}, 234 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN2, 235 "NVIDIA nForce 430 MCP13 Networking Adapter"}, 236 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1, 237 "NVIDIA nForce MCP55 Networking Adapter"}, 238 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2, 239 "NVIDIA nForce MCP55 Networking Adapter"}, 240 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN1, 241 "NVIDIA nForce MCP61 Networking Adapter"}, 242 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN2, 243 "NVIDIA nForce MCP61 Networking Adapter"}, 244 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN3, 245 "NVIDIA nForce MCP61 Networking Adapter"}, 246 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN4, 247 "NVIDIA nForce MCP61 Networking Adapter"}, 248 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN1, 249 "NVIDIA nForce MCP65 Networking Adapter"}, 250 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN2, 251 "NVIDIA nForce MCP65 Networking Adapter"}, 252 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN3, 253 "NVIDIA nForce MCP65 Networking Adapter"}, 254 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN4, 255 "NVIDIA nForce MCP65 Networking Adapter"}, 256 {0, 0, NULL} 257}; 258 259/* DMA MEM map callback function to get data segment physical address */ 260static void 261nve_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error) 262{ 263 if (error) 264 return; 265 266 KASSERT(nsegs == 1, 267 ("Too many DMA segments returned when mapping DMA memory")); 268 *(bus_addr_t *)arg = segs->ds_addr; 269} 270 271/* DMA RX map callback function to get data segment physical address */ 272static void 273nve_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, 274 bus_size_t mapsize, int error) 275{ 276 if (error) 277 return; 278 *(bus_addr_t *)arg = segs->ds_addr; 279} 280 281/* 282 * DMA TX buffer callback function to allocate fragment data segment 283 * addresses 284 */ 285static void 286nve_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error) 287{ 288 struct nve_tx_desc *info; 289 290 info = arg; 291 if (error) 292 return; 293 KASSERT(nsegs < NV_MAX_FRAGS, 294 ("Too many DMA segments returned when mapping mbuf")); 295 info->numfrags = nsegs; 296 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t)); 297} 298 299/* Probe for supported hardware ID's */ 300static int 301nve_probe(device_t dev) 302{ 303 struct nve_type *t; 304 305 t = nve_devs; 306 /* Check for matching PCI DEVICE ID's */ 307 while (t->name != NULL) { 308 if ((pci_get_vendor(dev) == t->vid_id) && 309 (pci_get_device(dev) == t->dev_id)) { 310 device_set_desc(dev, t->name); 311 return (BUS_PROBE_LOW_PRIORITY); 312 } 313 t++; 314 } 315 316 return (ENXIO); 317} 318 319/* Attach driver and initialise hardware for use */ 320static int 321nve_attach(device_t dev) 322{ 323 u_char eaddr[ETHER_ADDR_LEN]; 324 struct nve_softc *sc; 325 struct ifnet *ifp; 326 OS_API *osapi; 327 ADAPTER_OPEN_PARAMS OpenParams; 328 int error = 0, i, rid; 329 330 if (bootverbose) 331 device_printf(dev, "nvenetlib.o version %s\n", DRIVER_VERSION); 332 333 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - entry\n"); 334 335 sc = device_get_softc(dev); 336 337 /* Allocate mutex */ 338 mtx_init(&sc->mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 339 MTX_DEF); 340 callout_init_mtx(&sc->stat_callout, &sc->mtx, 0); 341 342 sc->dev = dev; 343 344 /* Preinitialize data structures */ 345 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS)); 346 347 /* Enable bus mastering */ 348 pci_enable_busmaster(dev); 349 350 /* Allocate memory mapped address space */ 351 rid = NV_RID; 352 sc->res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1, 353 RF_ACTIVE); 354 355 if (sc->res == NULL) { 356 device_printf(dev, "couldn't map memory\n"); 357 error = ENXIO; 358 goto fail; 359 } 360 sc->sc_st = rman_get_bustag(sc->res); 361 sc->sc_sh = rman_get_bushandle(sc->res); 362 363 /* Allocate interrupt */ 364 rid = 0; 365 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 366 RF_SHAREABLE | RF_ACTIVE); 367 368 if (sc->irq == NULL) { 369 device_printf(dev, "couldn't map interrupt\n"); 370 error = ENXIO; 371 goto fail; 372 } 373 /* Allocate DMA tags */ 374 error = bus_dma_tag_create(bus_get_dma_tag(dev), 375 4, 0, BUS_SPACE_MAXADDR_32BIT, 376 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS, 377 NV_MAX_FRAGS, MCLBYTES, 0, 378 busdma_lock_mutex, &Giant, 379 &sc->mtag); 380 if (error) { 381 device_printf(dev, "couldn't allocate dma tag\n"); 382 goto fail; 383 } 384 error = bus_dma_tag_create(bus_get_dma_tag(dev), 385 4, 0, BUS_SPACE_MAXADDR_32BIT, 386 BUS_SPACE_MAXADDR, NULL, NULL, 387 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 1, 388 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 0, 389 busdma_lock_mutex, &Giant, 390 &sc->rtag); 391 if (error) { 392 device_printf(dev, "couldn't allocate dma tag\n"); 393 goto fail; 394 } 395 error = bus_dma_tag_create(bus_get_dma_tag(dev), 396 4, 0, BUS_SPACE_MAXADDR_32BIT, 397 BUS_SPACE_MAXADDR, NULL, NULL, 398 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 1, 399 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 0, 400 busdma_lock_mutex, &Giant, 401 &sc->ttag); 402 if (error) { 403 device_printf(dev, "couldn't allocate dma tag\n"); 404 goto fail; 405 } 406 /* Allocate DMA safe memory and get the DMA addresses. */ 407 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc, 408 BUS_DMA_WAITOK, &sc->tmap); 409 if (error) { 410 device_printf(dev, "couldn't allocate dma memory\n"); 411 goto fail; 412 } 413 bzero(sc->tx_desc, sizeof(struct nve_tx_desc) * TX_RING_SIZE); 414 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc, 415 sizeof(struct nve_tx_desc) * TX_RING_SIZE, nve_dmamap_cb, 416 &sc->tx_addr, 0); 417 if (error) { 418 device_printf(dev, "couldn't map dma memory\n"); 419 goto fail; 420 } 421 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc, 422 BUS_DMA_WAITOK, &sc->rmap); 423 if (error) { 424 device_printf(dev, "couldn't allocate dma memory\n"); 425 goto fail; 426 } 427 bzero(sc->rx_desc, sizeof(struct nve_rx_desc) * RX_RING_SIZE); 428 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc, 429 sizeof(struct nve_rx_desc) * RX_RING_SIZE, nve_dmamap_cb, 430 &sc->rx_addr, 0); 431 if (error) { 432 device_printf(dev, "couldn't map dma memory\n"); 433 goto fail; 434 } 435 /* Initialize rings. */ 436 if (nve_init_rings(sc)) { 437 device_printf(dev, "failed to init rings\n"); 438 error = ENXIO; 439 goto fail; 440 } 441 /* Setup NVIDIA API callback routines */ 442 osapi = &sc->osapi; 443 osapi->pOSCX = sc; 444 osapi->pfnAllocMemory = nve_osalloc; 445 osapi->pfnFreeMemory = nve_osfree; 446 osapi->pfnAllocMemoryEx = nve_osallocex; 447 osapi->pfnFreeMemoryEx = nve_osfreeex; 448 osapi->pfnClearMemory = nve_osclear; 449 osapi->pfnStallExecution = nve_osdelay; 450 osapi->pfnAllocReceiveBuffer = nve_osallocrxbuf; 451 osapi->pfnFreeReceiveBuffer = nve_osfreerxbuf; 452 osapi->pfnPacketWasSent = nve_ospackettx; 453 osapi->pfnPacketWasReceived = nve_ospacketrx; 454 osapi->pfnLinkStateHasChanged = nve_oslinkchg; 455 osapi->pfnAllocTimer = nve_osalloctimer; 456 osapi->pfnFreeTimer = nve_osfreetimer; 457 osapi->pfnInitializeTimer = nve_osinittimer; 458 osapi->pfnSetTimer = nve_ossettimer; 459 osapi->pfnCancelTimer = nve_oscanceltimer; 460 osapi->pfnPreprocessPacket = nve_ospreprocpkt; 461 osapi->pfnPreprocessPacketNopq = nve_ospreprocpktnopq; 462 osapi->pfnIndicatePackets = nve_osindicatepkt; 463 osapi->pfnLockAlloc = nve_oslockalloc; 464 osapi->pfnLockAcquire = nve_oslockacquire; 465 osapi->pfnLockRelease = nve_oslockrelease; 466 osapi->pfnReturnBufferVirtual = nve_osreturnbufvirt; 467 468 sc->linkup = FALSE; 469 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN; 470 471 /* TODO - We don't support hardware offload yet */ 472 sc->hwmode = 1; 473 sc->media = 0; 474 475 /* Set NVIDIA API startup parameters */ 476 OpenParams.MaxDpcLoop = 2; 477 OpenParams.MaxRxPkt = RX_RING_SIZE; 478 OpenParams.MaxTxPkt = TX_RING_SIZE; 479 OpenParams.SentPacketStatusSuccess = 1; 480 OpenParams.SentPacketStatusFailure = 0; 481 OpenParams.MaxRxPktToAccumulate = 6; 482 OpenParams.ulPollInterval = nve_pollinterval; 483 OpenParams.SetForcedModeEveryNthRxPacket = 0; 484 OpenParams.SetForcedModeEveryNthTxPacket = 0; 485 OpenParams.RxForcedInterrupt = 0; 486 OpenParams.TxForcedInterrupt = 0; 487 OpenParams.pOSApi = osapi; 488 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res); 489 OpenParams.bASFEnabled = 0; 490 OpenParams.ulDescriptorVersion = sc->hwmode; 491 OpenParams.ulMaxPacketSize = sc->max_frame_size; 492 OpenParams.DeviceId = pci_get_device(dev); 493 494 /* Open NVIDIA Hardware API */ 495 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr); 496 if (error) { 497 device_printf(dev, 498 "failed to open NVIDIA Hardware API: 0x%x\n", error); 499 goto fail; 500 } 501 502 /* TODO - Add support for MODE2 hardware offload */ 503 504 bzero(&sc->adapterdata, sizeof(sc->adapterdata)); 505 506 sc->adapterdata.ulMediaIF = sc->media; 507 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1; 508 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata); 509 510 /* MAC is loaded backwards into h/w reg */ 511 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr); 512 for (i = 0; i < 6; i++) { 513 eaddr[i] = sc->original_mac_addr[5 - i]; 514 } 515 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr); 516 517 /* Display ethernet address ,... */ 518 device_printf(dev, "Ethernet address %6D\n", eaddr, ":"); 519 520 /* Allocate interface structures */ 521 ifp = sc->ifp = if_alloc(IFT_ETHER); 522 if (ifp == NULL) { 523 device_printf(dev, "can not if_alloc()\n"); 524 error = ENOSPC; 525 goto fail; 526 } 527 528 /* Setup interface parameters */ 529 ifp->if_softc = sc; 530 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 531 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 532 ifp->if_ioctl = nve_ioctl; 533 ifp->if_start = nve_ifstart; 534 ifp->if_init = nve_init; 535 ifp->if_mtu = ETHERMTU; 536 ifp->if_baudrate = IF_Mbps(100); 537 IFQ_SET_MAXLEN(&ifp->if_snd, TX_RING_SIZE - 1); 538 ifp->if_snd.ifq_drv_maxlen = TX_RING_SIZE - 1; 539 IFQ_SET_READY(&ifp->if_snd); 540 ifp->if_capabilities |= IFCAP_VLAN_MTU; 541 ifp->if_capenable |= IFCAP_VLAN_MTU; 542 543 /* Attach device for MII interface to PHY */ 544 DEBUGOUT(NVE_DEBUG_INIT, "nve: do mii_attach\n"); 545 error = mii_attach(dev, &sc->miibus, ifp, nve_ifmedia_upd, 546 nve_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0); 547 if (error != 0) { 548 device_printf(dev, "attaching PHYs failed\n"); 549 goto fail; 550 } 551 552 /* Attach to OS's managers. */ 553 ether_ifattach(ifp, eaddr); 554 555 /* Activate our interrupt handler. - attach last to avoid lock */ 556 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE, 557 NULL, nve_intr, sc, &sc->sc_ih); 558 if (error) { 559 device_printf(dev, "couldn't set up interrupt handler\n"); 560 goto fail; 561 } 562 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - exit\n"); 563 564fail: 565 if (error) 566 nve_detach(dev); 567 568 return (error); 569} 570 571/* Detach interface for module unload */ 572static int 573nve_detach(device_t dev) 574{ 575 struct nve_softc *sc = device_get_softc(dev); 576 struct ifnet *ifp; 577 578 KASSERT(mtx_initialized(&sc->mtx), ("mutex not initialized")); 579 580 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - entry\n"); 581 582 ifp = sc->ifp; 583 584 if (device_is_attached(dev)) { 585 ether_ifdetach(ifp); 586 NVE_LOCK(sc); 587 nve_stop(sc); 588 NVE_UNLOCK(sc); 589 callout_drain(&sc->stat_callout); 590 } 591 592 if (sc->miibus) 593 device_delete_child(dev, sc->miibus); 594 bus_generic_detach(dev); 595 596 /* Reload unreversed address back into MAC in original state */ 597 if (sc->original_mac_addr) 598 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, 599 sc->original_mac_addr); 600 601 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnClose\n"); 602 /* Detach from NVIDIA hardware API */ 603 if (sc->hwapi->pfnClose) 604 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE); 605 /* Release resources */ 606 if (sc->sc_ih) 607 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih); 608 if (sc->irq) 609 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq); 610 if (sc->res) 611 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res); 612 613 nve_free_rings(sc); 614 615 if (sc->tx_desc) { 616 bus_dmamap_unload(sc->rtag, sc->rmap); 617 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap); 618 bus_dmamap_destroy(sc->rtag, sc->rmap); 619 } 620 if (sc->mtag) 621 bus_dma_tag_destroy(sc->mtag); 622 if (sc->ttag) 623 bus_dma_tag_destroy(sc->ttag); 624 if (sc->rtag) 625 bus_dma_tag_destroy(sc->rtag); 626 627 if (ifp) 628 if_free(ifp); 629 mtx_destroy(&sc->mtx); 630 631 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - exit\n"); 632 633 return (0); 634} 635 636/* Initialise interface and start it "RUNNING" */ 637static void 638nve_init(void *xsc) 639{ 640 struct nve_softc *sc = xsc; 641 642 NVE_LOCK(sc); 643 nve_init_locked(sc); 644 NVE_UNLOCK(sc); 645} 646 647static void 648nve_init_locked(struct nve_softc *sc) 649{ 650 struct ifnet *ifp; 651 int error; 652 653 NVE_LOCK_ASSERT(sc); 654 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - entry (%d)\n", sc->linkup); 655 656 ifp = sc->ifp; 657 658 /* Do nothing if already running */ 659 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 660 return; 661 662 nve_stop(sc); 663 DEBUGOUT(NVE_DEBUG_INIT, "nve: do pfnInit\n"); 664 665 nve_ifmedia_upd_locked(ifp); 666 667 /* Setup Hardware interface and allocate memory structures */ 668 error = sc->hwapi->pfnInit(sc->hwapi->pADCX, 669 0, /* force speed */ 670 0, /* force full duplex */ 671 0, /* force mode */ 672 0, /* force async mode */ 673 &sc->linkup); 674 675 if (error) { 676 device_printf(sc->dev, 677 "failed to start NVIDIA Hardware interface\n"); 678 return; 679 } 680 /* Set the MAC address */ 681 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, IF_LLADDR(sc->ifp)); 682 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 683 sc->hwapi->pfnStart(sc->hwapi->pADCX); 684 685 /* Setup multicast filter */ 686 nve_setmulti(sc); 687 688 /* Update interface parameters */ 689 ifp->if_drv_flags |= IFF_DRV_RUNNING; 690 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 691 692 callout_reset(&sc->stat_callout, hz, nve_tick, sc); 693 694 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - exit\n"); 695 696 return; 697} 698 699/* Stop interface activity ie. not "RUNNING" */ 700static void 701nve_stop(struct nve_softc *sc) 702{ 703 struct ifnet *ifp; 704 705 NVE_LOCK_ASSERT(sc); 706 707 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - entry\n"); 708 709 ifp = sc->ifp; 710 sc->tx_timer = 0; 711 712 /* Cancel tick timer */ 713 callout_stop(&sc->stat_callout); 714 715 /* Stop hardware activity */ 716 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX); 717 sc->hwapi->pfnStop(sc->hwapi->pADCX, 0); 718 719 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnDeinit\n"); 720 /* Shutdown interface and deallocate memory buffers */ 721 if (sc->hwapi->pfnDeinit) 722 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0); 723 724 sc->linkup = 0; 725 sc->cur_rx = 0; 726 sc->pending_rxs = 0; 727 sc->pending_txs = 0; 728 729 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 730 731 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - exit\n"); 732 733 return; 734} 735 736/* Shutdown interface for unload/reboot */ 737static int 738nve_shutdown(device_t dev) 739{ 740 struct nve_softc *sc; 741 742 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_shutdown\n"); 743 744 sc = device_get_softc(dev); 745 746 /* Stop hardware activity */ 747 NVE_LOCK(sc); 748 nve_stop(sc); 749 NVE_UNLOCK(sc); 750 751 return (0); 752} 753 754/* Allocate TX ring buffers */ 755static int 756nve_init_rings(struct nve_softc *sc) 757{ 758 int error, i; 759 760 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - entry\n"); 761 762 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0; 763 /* Initialise RX ring */ 764 for (i = 0; i < RX_RING_SIZE; i++) { 765 struct nve_rx_desc *desc = sc->rx_desc + i; 766 struct nve_map_buffer *buf = &desc->buf; 767 768 buf->mbuf = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 769 if (buf->mbuf == NULL) { 770 device_printf(sc->dev, "couldn't allocate mbuf\n"); 771 nve_free_rings(sc); 772 return (ENOBUFS); 773 } 774 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES; 775 m_adj(buf->mbuf, ETHER_ALIGN); 776 777 error = bus_dmamap_create(sc->mtag, 0, &buf->map); 778 if (error) { 779 device_printf(sc->dev, "couldn't create dma map\n"); 780 nve_free_rings(sc); 781 return (error); 782 } 783 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf, 784 nve_dmamap_rx_cb, &desc->paddr, 0); 785 if (error) { 786 device_printf(sc->dev, "couldn't dma map mbuf\n"); 787 nve_free_rings(sc); 788 return (error); 789 } 790 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD); 791 792 desc->buflength = buf->mbuf->m_len; 793 desc->vaddr = mtod(buf->mbuf, caddr_t); 794 } 795 bus_dmamap_sync(sc->rtag, sc->rmap, 796 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 797 798 /* Initialize TX ring */ 799 for (i = 0; i < TX_RING_SIZE; i++) { 800 struct nve_tx_desc *desc = sc->tx_desc + i; 801 struct nve_map_buffer *buf = &desc->buf; 802 803 buf->mbuf = NULL; 804 805 error = bus_dmamap_create(sc->mtag, 0, &buf->map); 806 if (error) { 807 device_printf(sc->dev, "couldn't create dma map\n"); 808 nve_free_rings(sc); 809 return (error); 810 } 811 } 812 bus_dmamap_sync(sc->ttag, sc->tmap, 813 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 814 815 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - exit\n"); 816 817 return (error); 818} 819 820/* Free the TX ring buffers */ 821static void 822nve_free_rings(struct nve_softc *sc) 823{ 824 int i; 825 826 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - entry\n"); 827 828 for (i = 0; i < RX_RING_SIZE; i++) { 829 struct nve_rx_desc *desc = sc->rx_desc + i; 830 struct nve_map_buffer *buf = &desc->buf; 831 832 if (buf->mbuf) { 833 bus_dmamap_unload(sc->mtag, buf->map); 834 bus_dmamap_destroy(sc->mtag, buf->map); 835 m_freem(buf->mbuf); 836 } 837 buf->mbuf = NULL; 838 } 839 840 for (i = 0; i < TX_RING_SIZE; i++) { 841 struct nve_tx_desc *desc = sc->tx_desc + i; 842 struct nve_map_buffer *buf = &desc->buf; 843 844 if (buf->mbuf) { 845 bus_dmamap_unload(sc->mtag, buf->map); 846 bus_dmamap_destroy(sc->mtag, buf->map); 847 m_freem(buf->mbuf); 848 } 849 buf->mbuf = NULL; 850 } 851 852 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - exit\n"); 853} 854 855/* Main loop for sending packets from OS to interface */ 856static void 857nve_ifstart(struct ifnet *ifp) 858{ 859 struct nve_softc *sc = ifp->if_softc; 860 861 NVE_LOCK(sc); 862 nve_ifstart_locked(ifp); 863 NVE_UNLOCK(sc); 864} 865 866static void 867nve_ifstart_locked(struct ifnet *ifp) 868{ 869 struct nve_softc *sc = ifp->if_softc; 870 struct nve_map_buffer *buf; 871 struct mbuf *m0, *m; 872 struct nve_tx_desc *desc; 873 ADAPTER_WRITE_DATA txdata; 874 int error, i; 875 876 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - entry\n"); 877 878 NVE_LOCK_ASSERT(sc); 879 880 /* If link is down/busy or queue is empty do nothing */ 881 if (ifp->if_drv_flags & IFF_DRV_OACTIVE || 882 IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 883 return; 884 885 /* Transmit queued packets until sent or TX ring is full */ 886 while (sc->pending_txs < TX_RING_SIZE) { 887 desc = sc->tx_desc + sc->cur_tx; 888 buf = &desc->buf; 889 890 /* Get next packet to send. */ 891 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0); 892 893 /* If nothing to send, return. */ 894 if (m0 == NULL) 895 return; 896 897 /* 898 * On nForce4, the chip doesn't interrupt on transmit, 899 * so try to flush transmitted packets from the queue 900 * if it's getting large (see note in nve_watchdog). 901 */ 902 if (sc->pending_txs > TX_RING_SIZE/2) { 903 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX); 904 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX); 905 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 906 } 907 908 /* Map MBUF for DMA access */ 909 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0, 910 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT); 911 912 if (error && error != EFBIG) { 913 m_freem(m0); 914 sc->tx_errors++; 915 continue; 916 } 917 /* 918 * Packet has too many fragments - defrag into new mbuf 919 * cluster 920 */ 921 if (error) { 922 m = m_defrag(m0, M_NOWAIT); 923 if (m == NULL) { 924 m_freem(m0); 925 sc->tx_errors++; 926 continue; 927 } 928 m0 = m; 929 930 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m, 931 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT); 932 if (error) { 933 m_freem(m); 934 sc->tx_errors++; 935 continue; 936 } 937 } 938 /* Do sync on DMA bounce buffer */ 939 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE); 940 941 buf->mbuf = m0; 942 txdata.ulNumberOfElements = desc->numfrags; 943 txdata.pvID = (PVOID)desc; 944 945 /* Put fragments into API element list */ 946 txdata.ulTotalLength = buf->mbuf->m_len; 947 for (i = 0; i < desc->numfrags; i++) { 948 txdata.sElement[i].ulLength = 949 (ulong)desc->frags[i].ds_len; 950 txdata.sElement[i].pPhysical = 951 (PVOID)desc->frags[i].ds_addr; 952 } 953 954 /* Send packet to Nvidia API for transmission */ 955 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata); 956 957 switch (error) { 958 case ADAPTERERR_NONE: 959 /* Packet was queued in API TX queue successfully */ 960 sc->pending_txs++; 961 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE; 962 break; 963 964 case ADAPTERERR_TRANSMIT_QUEUE_FULL: 965 /* The API TX queue is full - requeue the packet */ 966 device_printf(sc->dev, 967 "nve_ifstart: transmit queue is full\n"); 968 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 969 bus_dmamap_unload(sc->mtag, buf->map); 970 IFQ_DRV_PREPEND(&ifp->if_snd, buf->mbuf); 971 buf->mbuf = NULL; 972 return; 973 974 default: 975 /* The API failed to queue/send the packet so dump it */ 976 device_printf(sc->dev, "nve_ifstart: transmit error\n"); 977 bus_dmamap_unload(sc->mtag, buf->map); 978 m_freem(buf->mbuf); 979 buf->mbuf = NULL; 980 sc->tx_errors++; 981 return; 982 } 983 /* Set watchdog timer. */ 984 sc->tx_timer = 8; 985 986 /* Copy packet to BPF tap */ 987 BPF_MTAP(ifp, m0); 988 } 989 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 990 991 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - exit\n"); 992} 993 994/* Handle IOCTL events */ 995static int 996nve_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 997{ 998 struct nve_softc *sc = ifp->if_softc; 999 struct ifreq *ifr = (struct ifreq *) data; 1000 struct mii_data *mii; 1001 int error = 0; 1002 1003 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - entry\n"); 1004 1005 switch (command) { 1006 case SIOCSIFMTU: 1007 /* Set MTU size */ 1008 NVE_LOCK(sc); 1009 if (ifp->if_mtu == ifr->ifr_mtu) { 1010 NVE_UNLOCK(sc); 1011 break; 1012 } 1013 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) { 1014 ifp->if_mtu = ifr->ifr_mtu; 1015 nve_stop(sc); 1016 nve_init_locked(sc); 1017 } else 1018 error = EINVAL; 1019 NVE_UNLOCK(sc); 1020 break; 1021 1022 case SIOCSIFFLAGS: 1023 /* Setup interface flags */ 1024 NVE_LOCK(sc); 1025 if (ifp->if_flags & IFF_UP) { 1026 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1027 nve_init_locked(sc); 1028 NVE_UNLOCK(sc); 1029 break; 1030 } 1031 } else { 1032 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1033 nve_stop(sc); 1034 NVE_UNLOCK(sc); 1035 break; 1036 } 1037 } 1038 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */ 1039 nve_setmulti(sc); 1040 NVE_UNLOCK(sc); 1041 break; 1042 1043 case SIOCADDMULTI: 1044 case SIOCDELMULTI: 1045 /* Setup multicast filter */ 1046 NVE_LOCK(sc); 1047 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1048 nve_setmulti(sc); 1049 } 1050 NVE_UNLOCK(sc); 1051 break; 1052 1053 case SIOCGIFMEDIA: 1054 case SIOCSIFMEDIA: 1055 /* Get/Set interface media parameters */ 1056 mii = device_get_softc(sc->miibus); 1057 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 1058 break; 1059 1060 default: 1061 /* Everything else we forward to generic ether ioctl */ 1062 error = ether_ioctl(ifp, command, data); 1063 break; 1064 } 1065 1066 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - exit\n"); 1067 1068 return (error); 1069} 1070 1071/* Interrupt service routine */ 1072static void 1073nve_intr(void *arg) 1074{ 1075 struct nve_softc *sc = arg; 1076 struct ifnet *ifp = sc->ifp; 1077 1078 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - entry\n"); 1079 1080 NVE_LOCK(sc); 1081 if (!ifp->if_flags & IFF_UP) { 1082 nve_stop(sc); 1083 NVE_UNLOCK(sc); 1084 return; 1085 } 1086 /* Handle interrupt event */ 1087 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) { 1088 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX); 1089 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 1090 } 1091 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1092 nve_ifstart_locked(ifp); 1093 1094 /* If no pending packets we don't need a timeout */ 1095 if (sc->pending_txs == 0) 1096 sc->tx_timer = 0; 1097 NVE_UNLOCK(sc); 1098 1099 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - exit\n"); 1100 1101 return; 1102} 1103 1104/* Setup multicast filters */ 1105static void 1106nve_setmulti(struct nve_softc *sc) 1107{ 1108 struct ifnet *ifp; 1109 struct ifmultiaddr *ifma; 1110 PACKET_FILTER hwfilter; 1111 int i; 1112 u_int8_t andaddr[6], oraddr[6]; 1113 1114 NVE_LOCK_ASSERT(sc); 1115 1116 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - entry\n"); 1117 1118 ifp = sc->ifp; 1119 1120 /* Initialize filter */ 1121 hwfilter.ulFilterFlags = 0; 1122 for (i = 0; i < 6; i++) { 1123 hwfilter.acMulticastAddress[i] = 0; 1124 hwfilter.acMulticastMask[i] = 0; 1125 } 1126 1127 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { 1128 /* Accept all packets */ 1129 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS; 1130 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter); 1131 return; 1132 } 1133 /* Setup multicast filter */ 1134 if_maddr_rlock(ifp); 1135 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1136 u_char *addrp; 1137 1138 if (ifma->ifma_addr->sa_family != AF_LINK) 1139 continue; 1140 1141 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1142 for (i = 0; i < 6; i++) { 1143 u_int8_t mcaddr = addrp[i]; 1144 andaddr[i] &= mcaddr; 1145 oraddr[i] |= mcaddr; 1146 } 1147 } 1148 if_maddr_runlock(ifp); 1149 for (i = 0; i < 6; i++) { 1150 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i]; 1151 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]); 1152 } 1153 1154 /* Send filter to NVIDIA API */ 1155 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter); 1156 1157 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - exit\n"); 1158 1159 return; 1160} 1161 1162/* Change the current media/mediaopts */ 1163static int 1164nve_ifmedia_upd(struct ifnet *ifp) 1165{ 1166 struct nve_softc *sc = ifp->if_softc; 1167 1168 NVE_LOCK(sc); 1169 nve_ifmedia_upd_locked(ifp); 1170 NVE_UNLOCK(sc); 1171 return (0); 1172} 1173 1174static void 1175nve_ifmedia_upd_locked(struct ifnet *ifp) 1176{ 1177 struct nve_softc *sc = ifp->if_softc; 1178 struct mii_data *mii; 1179 struct mii_softc *miisc; 1180 1181 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_upd\n"); 1182 1183 NVE_LOCK_ASSERT(sc); 1184 mii = device_get_softc(sc->miibus); 1185 1186 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1187 PHY_RESET(miisc); 1188 mii_mediachg(mii); 1189} 1190 1191/* Update current miibus PHY status of media */ 1192static void 1193nve_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1194{ 1195 struct nve_softc *sc; 1196 struct mii_data *mii; 1197 1198 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_sts\n"); 1199 1200 sc = ifp->if_softc; 1201 NVE_LOCK(sc); 1202 mii = device_get_softc(sc->miibus); 1203 mii_pollstat(mii); 1204 1205 ifmr->ifm_active = mii->mii_media_active; 1206 ifmr->ifm_status = mii->mii_media_status; 1207 NVE_UNLOCK(sc); 1208 1209 return; 1210} 1211 1212/* miibus tick timer - maintain link status */ 1213static void 1214nve_tick(void *xsc) 1215{ 1216 struct nve_softc *sc = xsc; 1217 struct mii_data *mii; 1218 struct ifnet *ifp; 1219 1220 NVE_LOCK_ASSERT(sc); 1221 1222 ifp = sc->ifp; 1223 nve_update_stats(sc); 1224 1225 mii = device_get_softc(sc->miibus); 1226 mii_tick(mii); 1227 1228 if (mii->mii_media_status & IFM_ACTIVE && 1229 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 1230 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1231 nve_ifstart_locked(ifp); 1232 } 1233 1234 if (sc->tx_timer > 0 && --sc->tx_timer == 0) 1235 nve_watchdog(sc); 1236 callout_reset(&sc->stat_callout, hz, nve_tick, sc); 1237 1238 return; 1239} 1240 1241/* Update ifnet data structure with collected interface stats from API */ 1242static void 1243nve_update_stats(struct nve_softc *sc) 1244{ 1245 struct ifnet *ifp = sc->ifp; 1246 ADAPTER_STATS stats; 1247 1248 NVE_LOCK_ASSERT(sc); 1249 1250 if (sc->hwapi) { 1251 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats); 1252 1253 ifp->if_ipackets = stats.ulSuccessfulReceptions; 1254 ifp->if_ierrors = stats.ulMissedFrames + 1255 stats.ulFailedReceptions + 1256 stats.ulCRCErrors + 1257 stats.ulFramingErrors + 1258 stats.ulOverFlowErrors; 1259 1260 ifp->if_opackets = stats.ulSuccessfulTransmissions; 1261 ifp->if_oerrors = sc->tx_errors + 1262 stats.ulFailedTransmissions + 1263 stats.ulRetryErrors + 1264 stats.ulUnderflowErrors + 1265 stats.ulLossOfCarrierErrors + 1266 stats.ulLateCollisionErrors; 1267 1268 ifp->if_collisions = stats.ulLateCollisionErrors; 1269 } 1270 1271 return; 1272} 1273 1274/* miibus Read PHY register wrapper - calls Nvidia API entry point */ 1275static int 1276nve_miibus_readreg(device_t dev, int phy, int reg) 1277{ 1278 struct nve_softc *sc = device_get_softc(dev); 1279 ULONG data; 1280 1281 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - entry\n"); 1282 1283 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data); 1284 1285 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - exit\n"); 1286 1287 return (data); 1288} 1289 1290/* miibus Write PHY register wrapper - calls Nvidia API entry point */ 1291static int 1292nve_miibus_writereg(device_t dev, int phy, int reg, int data) 1293{ 1294 struct nve_softc *sc = device_get_softc(dev); 1295 1296 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - entry\n"); 1297 1298 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data); 1299 1300 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - exit\n"); 1301 1302 return 0; 1303} 1304 1305/* Watchdog timer to prevent PHY lockups */ 1306static void 1307nve_watchdog(struct nve_softc *sc) 1308{ 1309 struct ifnet *ifp; 1310 int pending_txs_start; 1311 1312 NVE_LOCK_ASSERT(sc); 1313 ifp = sc->ifp; 1314 1315 /* 1316 * The nvidia driver blob defers tx completion notifications. 1317 * Thus, sometimes the watchdog timer will go off when the 1318 * tx engine is fine, but the tx completions are just deferred. 1319 * Try kicking the driver blob to clear out any pending tx 1320 * completions. If that clears up any of the pending tx 1321 * operations, then just return without printing the warning 1322 * message or resetting the adapter, as we can then conclude 1323 * the chip hasn't actually crashed (it's still sending packets). 1324 */ 1325 pending_txs_start = sc->pending_txs; 1326 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX); 1327 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX); 1328 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 1329 if (sc->pending_txs < pending_txs_start) 1330 return; 1331 1332 device_printf(sc->dev, "device timeout (%d)\n", sc->pending_txs); 1333 1334 sc->tx_errors++; 1335 1336 nve_stop(sc); 1337 nve_init_locked(sc); 1338 1339 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1340 nve_ifstart_locked(ifp); 1341} 1342 1343/* --- Start of NVOSAPI interface --- */ 1344 1345/* Allocate DMA enabled general use memory for API */ 1346static NV_API_CALL NV_SINT32 1347nve_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem) 1348{ 1349 struct nve_softc *sc; 1350 bus_addr_t mem_physical; 1351 1352 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc - %d\n", mem->uiLength); 1353 1354 sc = (struct nve_softc *)ctx; 1355 1356 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF, 1357 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0); 1358 1359 if (!mem->pLogical) { 1360 device_printf(sc->dev, "memory allocation failed\n"); 1361 return (0); 1362 } 1363 memset(mem->pLogical, 0, (ulong)mem->uiLength); 1364 mem_physical = vtophys(mem->pLogical); 1365 mem->pPhysical = (PVOID)mem_physical; 1366 1367 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc 0x%x/0x%x - %d\n", 1368 (uint)mem->pLogical, (uint)mem->pPhysical, (uint)mem->uiLength); 1369 1370 return (1); 1371} 1372 1373/* Free allocated memory */ 1374static NV_API_CALL NV_SINT32 1375nve_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem) 1376{ 1377 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfree - 0x%x - %d\n", 1378 (uint)mem->pLogical, (uint) mem->uiLength); 1379 1380 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF); 1381 return (1); 1382} 1383 1384/* Copied directly from nvnet.c */ 1385static NV_API_CALL NV_SINT32 1386nve_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex) 1387{ 1388 MEMORY_BLOCK mem_block; 1389 1390 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocex\n"); 1391 1392 mem_block_ex->pLogical = NULL; 1393 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength; 1394 1395 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) && 1396 (mem_block_ex->AlignmentSize > 1)) { 1397 DEBUGOUT(NVE_DEBUG_API, " aligning on %d\n", 1398 mem_block_ex->AlignmentSize); 1399 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize; 1400 } 1401 mem_block.uiLength = mem_block_ex->uiLengthOrig; 1402 1403 if (nve_osalloc(ctx, &mem_block) == 0) { 1404 return (0); 1405 } 1406 mem_block_ex->pLogicalOrig = mem_block.pLogical; 1407 mem_block_ex->pPhysicalOrigLow = (unsigned long)mem_block.pPhysical; 1408 mem_block_ex->pPhysicalOrigHigh = 0; 1409 1410 mem_block_ex->pPhysical = mem_block.pPhysical; 1411 mem_block_ex->pLogical = mem_block.pLogical; 1412 1413 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) { 1414 unsigned int offset; 1415 offset = mem_block_ex->pPhysicalOrigLow & 1416 (mem_block_ex->AlignmentSize - 1); 1417 1418 if (offset) { 1419 mem_block_ex->pPhysical = 1420 (PVOID)((ulong)mem_block_ex->pPhysical + 1421 mem_block_ex->AlignmentSize - offset); 1422 mem_block_ex->pLogical = 1423 (PVOID)((ulong)mem_block_ex->pLogical + 1424 mem_block_ex->AlignmentSize - offset); 1425 } /* if (offset) */ 1426 } /* if (mem_block_ex->uiLength != *mem_block_ex->uiLengthOrig) */ 1427 return (1); 1428} 1429 1430/* Copied directly from nvnet.c */ 1431static NV_API_CALL NV_SINT32 1432nve_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex) 1433{ 1434 MEMORY_BLOCK mem_block; 1435 1436 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreeex\n"); 1437 1438 mem_block.pLogical = mem_block_ex->pLogicalOrig; 1439 mem_block.pPhysical = (PVOID)((ulong)mem_block_ex->pPhysicalOrigLow); 1440 mem_block.uiLength = mem_block_ex->uiLengthOrig; 1441 1442 return (nve_osfree(ctx, &mem_block)); 1443} 1444 1445/* Clear memory region */ 1446static NV_API_CALL NV_SINT32 1447nve_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length) 1448{ 1449 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osclear\n"); 1450 memset(mem, 0, length); 1451 return (1); 1452} 1453 1454/* Sleep for a tick */ 1455static NV_API_CALL NV_SINT32 1456nve_osdelay(PNV_VOID ctx, NV_UINT32 usec) 1457{ 1458 DELAY(usec); 1459 return (1); 1460} 1461 1462/* Allocate memory for rx buffer */ 1463static NV_API_CALL NV_SINT32 1464nve_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id) 1465{ 1466 struct nve_softc *sc = ctx; 1467 struct nve_rx_desc *desc; 1468 struct nve_map_buffer *buf; 1469 int error; 1470 1471 if (device_is_attached(sc->dev)) 1472 NVE_LOCK_ASSERT(sc); 1473 1474 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocrxbuf\n"); 1475 1476 if (sc->pending_rxs == RX_RING_SIZE) { 1477 device_printf(sc->dev, "rx ring buffer is full\n"); 1478 goto fail; 1479 } 1480 desc = sc->rx_desc + sc->cur_rx; 1481 buf = &desc->buf; 1482 1483 if (buf->mbuf == NULL) { 1484 buf->mbuf = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1485 if (buf->mbuf == NULL) { 1486 device_printf(sc->dev, "failed to allocate memory\n"); 1487 goto fail; 1488 } 1489 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES; 1490 m_adj(buf->mbuf, ETHER_ALIGN); 1491 1492 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf, 1493 nve_dmamap_rx_cb, &desc->paddr, 0); 1494 if (error) { 1495 device_printf(sc->dev, "failed to dmamap mbuf\n"); 1496 m_freem(buf->mbuf); 1497 buf->mbuf = NULL; 1498 goto fail; 1499 } 1500 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD); 1501 desc->buflength = buf->mbuf->m_len; 1502 desc->vaddr = mtod(buf->mbuf, caddr_t); 1503 } 1504 sc->pending_rxs++; 1505 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE; 1506 1507 mem->pLogical = (void *)desc->vaddr; 1508 mem->pPhysical = (void *)desc->paddr; 1509 mem->uiLength = desc->buflength; 1510 *id = (void *)desc; 1511 1512 return (1); 1513 1514fail: 1515 return (0); 1516} 1517 1518/* Free the rx buffer */ 1519static NV_API_CALL NV_SINT32 1520nve_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id) 1521{ 1522 struct nve_softc *sc = ctx; 1523 struct nve_rx_desc *desc; 1524 struct nve_map_buffer *buf; 1525 1526 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreerxbuf\n"); 1527 1528 desc = (struct nve_rx_desc *) id; 1529 buf = &desc->buf; 1530 1531 if (buf->mbuf) { 1532 bus_dmamap_unload(sc->mtag, buf->map); 1533 bus_dmamap_destroy(sc->mtag, buf->map); 1534 m_freem(buf->mbuf); 1535 } 1536 sc->pending_rxs--; 1537 buf->mbuf = NULL; 1538 1539 return (1); 1540} 1541 1542/* This gets called by the Nvidia API after our TX packet has been sent */ 1543static NV_API_CALL NV_SINT32 1544nve_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success) 1545{ 1546 struct nve_softc *sc = ctx; 1547 struct nve_map_buffer *buf; 1548 struct nve_tx_desc *desc = (struct nve_tx_desc *) id; 1549 struct ifnet *ifp; 1550 1551 NVE_LOCK_ASSERT(sc); 1552 1553 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospackettx\n"); 1554 1555 ifp = sc->ifp; 1556 buf = &desc->buf; 1557 sc->pending_txs--; 1558 1559 /* Unload and free mbuf cluster */ 1560 if (buf->mbuf == NULL) 1561 goto fail; 1562 1563 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE); 1564 bus_dmamap_unload(sc->mtag, buf->map); 1565 m_freem(buf->mbuf); 1566 buf->mbuf = NULL; 1567 1568 /* Send more packets if we have them */ 1569 if (sc->pending_txs < TX_RING_SIZE) 1570 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1571 1572 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd) && sc->pending_txs < TX_RING_SIZE) 1573 nve_ifstart_locked(ifp); 1574 1575fail: 1576 1577 return (1); 1578} 1579 1580/* This gets called by the Nvidia API when a new packet has been received */ 1581/* XXX What is newbuf used for? XXX */ 1582static NV_API_CALL NV_SINT32 1583nve_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success, NV_UINT8 *newbuf, 1584 NV_UINT8 priority) 1585{ 1586 struct nve_softc *sc = ctx; 1587 struct ifnet *ifp; 1588 struct nve_rx_desc *desc; 1589 struct nve_map_buffer *buf; 1590 ADAPTER_READ_DATA *readdata; 1591 struct mbuf *m; 1592 1593 NVE_LOCK_ASSERT(sc); 1594 1595 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospacketrx\n"); 1596 1597 ifp = sc->ifp; 1598 1599 readdata = (ADAPTER_READ_DATA *) data; 1600 desc = readdata->pvID; 1601 buf = &desc->buf; 1602 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1603 1604 if (success) { 1605 /* Sync DMA bounce buffer. */ 1606 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1607 1608 /* First mbuf in packet holds the ethernet and packet headers */ 1609 buf->mbuf->m_pkthdr.rcvif = ifp; 1610 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len = 1611 readdata->ulTotalLength; 1612 1613 bus_dmamap_unload(sc->mtag, buf->map); 1614 1615 /* Blat the mbuf pointer, kernel will free the mbuf cluster */ 1616 m = buf->mbuf; 1617 buf->mbuf = NULL; 1618 1619 /* Give mbuf to OS. */ 1620 NVE_UNLOCK(sc); 1621 (*ifp->if_input)(ifp, m); 1622 NVE_LOCK(sc); 1623 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH) 1624 ifp->if_imcasts++; 1625 1626 } else { 1627 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1628 bus_dmamap_unload(sc->mtag, buf->map); 1629 m_freem(buf->mbuf); 1630 buf->mbuf = NULL; 1631 } 1632 1633 sc->cur_rx = desc - sc->rx_desc; 1634 sc->pending_rxs--; 1635 1636 return (1); 1637} 1638 1639/* This gets called by NVIDIA API when the PHY link state changes */ 1640static NV_API_CALL NV_SINT32 1641nve_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled) 1642{ 1643 1644 DEBUGOUT(NVE_DEBUG_API, "nve: nve_oslinkchg\n"); 1645 1646 return (1); 1647} 1648 1649/* Setup a watchdog timer */ 1650static NV_API_CALL NV_SINT32 1651nve_osalloctimer(PNV_VOID ctx, PNV_VOID *timer) 1652{ 1653 struct nve_softc *sc = (struct nve_softc *)ctx; 1654 1655 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osalloctimer\n"); 1656 1657 callout_init(&sc->ostimer, CALLOUT_MPSAFE); 1658 *timer = &sc->ostimer; 1659 1660 return (1); 1661} 1662 1663/* Free the timer */ 1664static NV_API_CALL NV_SINT32 1665nve_osfreetimer(PNV_VOID ctx, PNV_VOID timer) 1666{ 1667 1668 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osfreetimer\n"); 1669 1670 callout_drain((struct callout *)timer); 1671 1672 return (1); 1673} 1674 1675/* Setup timer parameters */ 1676static NV_API_CALL NV_SINT32 1677nve_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters) 1678{ 1679 struct nve_softc *sc = (struct nve_softc *)ctx; 1680 1681 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osinittimer\n"); 1682 1683 sc->ostimer_func = func; 1684 sc->ostimer_params = parameters; 1685 1686 return (1); 1687} 1688 1689/* Set the timer to go off */ 1690static NV_API_CALL NV_SINT32 1691nve_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay) 1692{ 1693 struct nve_softc *sc = ctx; 1694 1695 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ossettimer\n"); 1696 1697 callout_reset((struct callout *)timer, delay, sc->ostimer_func, 1698 sc->ostimer_params); 1699 1700 return (1); 1701} 1702 1703/* Cancel the timer */ 1704static NV_API_CALL NV_SINT32 1705nve_oscanceltimer(PNV_VOID ctx, PNV_VOID timer) 1706{ 1707 1708 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_oscanceltimer\n"); 1709 1710 callout_stop((struct callout *)timer); 1711 1712 return (1); 1713} 1714 1715static NV_API_CALL NV_SINT32 1716nve_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id, 1717 NV_UINT8 *newbuffer, NV_UINT8 priority) 1718{ 1719 1720 /* Not implemented */ 1721 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n"); 1722 1723 return (1); 1724} 1725 1726static NV_API_CALL PNV_VOID 1727nve_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata) 1728{ 1729 1730 /* Not implemented */ 1731 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n"); 1732 1733 return (NULL); 1734} 1735 1736static NV_API_CALL NV_SINT32 1737nve_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno) 1738{ 1739 1740 /* Not implemented */ 1741 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osindicatepkt\n"); 1742 1743 return (1); 1744} 1745 1746/* Allocate mutex context (already done in nve_attach) */ 1747static NV_API_CALL NV_SINT32 1748nve_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock) 1749{ 1750 struct nve_softc *sc = (struct nve_softc *)ctx; 1751 1752 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockalloc\n"); 1753 1754 *pLock = (void **)sc; 1755 1756 return (1); 1757} 1758 1759/* Obtain a spin lock */ 1760static NV_API_CALL NV_SINT32 1761nve_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock) 1762{ 1763 1764 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockacquire\n"); 1765 1766 return (1); 1767} 1768 1769/* Release lock */ 1770static NV_API_CALL NV_SINT32 1771nve_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock) 1772{ 1773 1774 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockrelease\n"); 1775 1776 return (1); 1777} 1778 1779/* I have no idea what this is for */ 1780static NV_API_CALL PNV_VOID 1781nve_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata) 1782{ 1783 1784 /* Not implemented */ 1785 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_osreturnbufvirt\n"); 1786 panic("nve: nve_osreturnbufvirtual not implemented\n"); 1787 1788 return (NULL); 1789} 1790 1791/* --- End on NVOSAPI interface --- */ 1792