1265236Sken/*- 2265236Sken * Copyright (c) 2013 LSI Corp. 3265236Sken * All rights reserved. 4265236Sken * 5265236Sken * Redistribution and use in source and binary forms, with or without 6265236Sken * modification, are permitted provided that the following conditions 7265236Sken * are met: 8265236Sken * 1. Redistributions of source code must retain the above copyright 9265236Sken * notice, this list of conditions and the following disclaimer. 10265236Sken * 2. Redistributions in binary form must reproduce the above copyright 11265236Sken * notice, this list of conditions and the following disclaimer in the 12265236Sken * documentation and/or other materials provided with the distribution. 13265236Sken * 3. Neither the name of the author nor the names of any co-contributors 14265236Sken * may be used to endorse or promote products derived from this software 15265236Sken * without specific prior written permission. 16265236Sken * 17265236Sken * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18265236Sken * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19265236Sken * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20265236Sken * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21265236Sken * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22265236Sken * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23265236Sken * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24265236Sken * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25265236Sken * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26265236Sken * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27265236Sken * SUCH DAMAGE. 28265236Sken * 29265236Sken * LSI MPT-Fusion Host Adapter FreeBSD 30265236Sken * 31265236Sken * $FreeBSD$ 32265236Sken */ 33265236Sken 34265236Sken/* 35265236Sken * Copyright (c) 2000-2013 LSI Corporation. 36265236Sken * 37265236Sken * 38265236Sken * Name: mpi2_cnfg.h 39265236Sken * Title: MPI Configuration messages and pages 40265236Sken * Creation Date: November 10, 2006 41265236Sken * 42265236Sken * mpi2_cnfg.h Version: 02.00.27 43265236Sken * 44265236Sken * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 45265236Sken * prefix are for use only on MPI v2.5 products, and must not be used 46265236Sken * with MPI v2.0 products. Unless otherwise noted, names beginning with 47265236Sken * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 48265236Sken * 49265236Sken * Version History 50265236Sken * --------------- 51265236Sken * 52265236Sken * Date Version Description 53265236Sken * -------- -------- ------------------------------------------------------ 54265236Sken * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 55265236Sken * 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags. 56265236Sken * Added Manufacturing Page 11. 57265236Sken * Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE 58265236Sken * define. 59265236Sken * 06-26-07 02.00.02 Adding generic structure for product-specific 60265236Sken * Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS. 61265236Sken * Rework of BIOS Page 2 configuration page. 62265236Sken * Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the 63265236Sken * forms. 64265236Sken * Added configuration pages IOC Page 8 and Driver 65265236Sken * Persistent Mapping Page 0. 66265236Sken * 08-31-07 02.00.03 Modified configuration pages dealing with Integrated 67265236Sken * RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1, 68265236Sken * RAID Physical Disk Pages 0 and 1, RAID Configuration 69265236Sken * Page 0). 70265236Sken * Added new value for AccessStatus field of SAS Device 71265236Sken * Page 0 (_SATA_NEEDS_INITIALIZATION). 72265236Sken * 10-31-07 02.00.04 Added missing SEPDevHandle field to 73265236Sken * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0. 74265236Sken * 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for 75265236Sken * NVDATA. 76265236Sken * Modified IOC Page 7 to use masks and added field for 77265236Sken * SASBroadcastPrimitiveMasks. 78265236Sken * Added MPI2_CONFIG_PAGE_BIOS_4. 79265236Sken * Added MPI2_CONFIG_PAGE_LOG_0. 80265236Sken * 02-29-08 02.00.06 Modified various names to make them 32-character unique. 81265236Sken * Added SAS Device IDs. 82265236Sken * Updated Integrated RAID configuration pages including 83265236Sken * Manufacturing Page 4, IOC Page 6, and RAID Configuration 84265236Sken * Page 0. 85265236Sken * 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA. 86265236Sken * Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION. 87265236Sken * Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING. 88265236Sken * Added missing MaxNumRoutedSasAddresses field to 89265236Sken * MPI2_CONFIG_PAGE_EXPANDER_0. 90265236Sken * Added SAS Port Page 0. 91265236Sken * Modified structure layout for 92265236Sken * MPI2_CONFIG_PAGE_DRIVER_MAPPING_0. 93265236Sken * 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use 94265236Sken * MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array. 95265236Sken * 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF 96265236Sken * to 0x000000FF. 97265236Sken * Added two new values for the Physical Disk Coercion Size 98265236Sken * bits in the Flags field of Manufacturing Page 4. 99265236Sken * Added product-specific Manufacturing pages 16 to 31. 100265236Sken * Modified Flags bits for controlling write cache on SATA 101265236Sken * drives in IO Unit Page 1. 102265236Sken * Added new bit to AdditionalControlFlags of SAS IO Unit 103265236Sken * Page 1 to control Invalid Topology Correction. 104265236Sken * Added additional defines for RAID Volume Page 0 105265236Sken * VolumeStatusFlags field. 106265236Sken * Modified meaning of RAID Volume Page 0 VolumeSettings 107265236Sken * define for auto-configure of hot-swap drives. 108265236Sken * Added SupportedPhysDisks field to RAID Volume Page 1 and 109265236Sken * added related defines. 110265236Sken * Added PhysDiskAttributes field (and related defines) to 111265236Sken * RAID Physical Disk Page 0. 112265236Sken * Added MPI2_SAS_PHYINFO_PHY_VACANT define. 113265236Sken * Added three new DiscoveryStatus bits for SAS IO Unit 114265236Sken * Page 0 and SAS Expander Page 0. 115265236Sken * Removed multiplexing information from SAS IO Unit pages. 116265236Sken * Added BootDeviceWaitTime field to SAS IO Unit Page 4. 117265236Sken * Removed Zone Address Resolved bit from PhyInfo and from 118265236Sken * Expander Page 0 Flags field. 119265236Sken * Added two new AccessStatus values to SAS Device Page 0 120265236Sken * for indicating routing problems. Added 3 reserved words 121265236Sken * to this page. 122265236Sken * 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3. 123265236Sken * Inserted missing reserved field into structure for IOC 124265236Sken * Page 6. 125265236Sken * Added more pending task bits to RAID Volume Page 0 126265236Sken * VolumeStatusFlags defines. 127265236Sken * Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define. 128265236Sken * Added a new DiscoveryStatus bit for SAS IO Unit Page 0 129265236Sken * and SAS Expander Page 0 to flag a downstream initiator 130265236Sken * when in simplified routing mode. 131265236Sken * Removed SATA Init Failure defines for DiscoveryStatus 132265236Sken * fields of SAS IO Unit Page 0 and SAS Expander Page 0. 133265236Sken * Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define. 134265236Sken * Added PortGroups, DmaGroup, and ControlGroup fields to 135265236Sken * SAS Device Page 0. 136265236Sken * 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO 137265236Sken * Unit Page 6. 138265236Sken * Added expander reduced functionality data to SAS 139265236Sken * Expander Page 0. 140265236Sken * Added SAS PHY Page 2 and SAS PHY Page 3. 141265236Sken * 07-30-09 02.00.12 Added IO Unit Page 7. 142265236Sken * Added new device ids. 143265236Sken * Added SAS IO Unit Page 5. 144265236Sken * Added partial and slumber power management capable flags 145265236Sken * to SAS Device Page 0 Flags field. 146265236Sken * Added PhyInfo defines for power condition. 147265236Sken * Added Ethernet configuration pages. 148265236Sken * 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY. 149265236Sken * Added SAS PHY Page 4 structure and defines. 150265236Sken * 02-10-10 02.00.14 Modified the comments for the configuration page 151265236Sken * structures that contain an array of data. The host 152265236Sken * should use the "count" field in the page data (e.g. the 153265236Sken * NumPhys field) to determine the number of valid elements 154265236Sken * in the array. 155265236Sken * Added/modified some MPI2_MFGPAGE_DEVID_SAS defines. 156265236Sken * Added PowerManagementCapabilities to IO Unit Page 7. 157265236Sken * Added PortWidthModGroup field to 158265236Sken * MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS. 159265236Sken * Added MPI2_CONFIG_PAGE_SASIOUNIT_6 and related defines. 160265236Sken * Added MPI2_CONFIG_PAGE_SASIOUNIT_7 and related defines. 161265236Sken * Added MPI2_CONFIG_PAGE_SASIOUNIT_8 and related defines. 162265236Sken * 05-12-10 02.00.15 Added MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT 163265236Sken * define. 164265236Sken * Added MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE define. 165265236Sken * Added MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY define. 166265236Sken * 08-11-10 02.00.16 Removed IO Unit Page 1 device path (multi-pathing) 167265236Sken * defines. 168265236Sken * 11-10-10 02.00.17 Added ReceptacleID field (replacing Reserved1) to 169265236Sken * MPI2_MANPAGE7_CONNECTOR_INFO and reworked defines for 170265236Sken * the Pinout field. 171265236Sken * Added BoardTemperature and BoardTemperatureUnits fields 172265236Sken * to MPI2_CONFIG_PAGE_IO_UNIT_7. 173265236Sken * Added MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING define 174265236Sken * and MPI2_CONFIG_PAGE_EXT_MAN_PS structure. 175265236Sken * 02-23-11 02.00.18 Added ProxyVF_ID field to MPI2_CONFIG_REQUEST. 176265236Sken * Added IO Unit Page 8, IO Unit Page 9, 177265236Sken * and IO Unit Page 10. 178265236Sken * Added SASNotifyPrimitiveMasks field to 179265236Sken * MPI2_CONFIG_PAGE_IOC_7. 180265236Sken * 03-09-11 02.00.19 Fixed IO Unit Page 10 (to match the spec). 181265236Sken * 05-25-11 02.00.20 Cleaned up a few comments. 182265236Sken * 08-24-11 02.00.21 Marked the IO Unit Page 7 PowerManagementCapabilities 183265236Sken * for PCIe link as obsolete. 184265236Sken * Added SpinupFlags field containing a Disable Spin-up bit 185265236Sken * to the MPI2_SAS_IOUNIT4_SPINUP_GROUP fields of SAS IO 186265236Sken * Unit Page 4. 187265236Sken * 11-18-11 02.00.22 Added define MPI2_IOCPAGE6_CAP_FLAGS_4K_SECTORS_SUPPORT. 188265236Sken * Added UEFIVersion field to BIOS Page 1 and defined new 189265236Sken * BiosOptions bits. 190265236Sken * Incorporating additions for MPI v2.5. 191265236Sken * 11-27-12 02.00.23 Added MPI2_MANPAGE7_FLAG_EVENTREPLAY_SLOT_ORDER. 192265236Sken * Added MPI2_BIOSPAGE1_OPTIONS_MASK_OEM_ID. 193265236Sken * 12-20-12 02.00.24 Marked MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION as 194265236Sken * obsolete for MPI v2.5 and later. 195265236Sken * Added some defines for 12G SAS speeds. 196265236Sken * 04-09-13 02.00.25 Added MPI2_IOUNITPAGE1_ATA_SECURITY_FREEZE_LOCK. 197265236Sken * Fixed MPI2_IOUNITPAGE5_DMA_CAP_MASK_MAX_REQUESTS to 198265236Sken * match the specification. 199265236Sken * 08-19-13 02.00.26 Added reserved words to MPI2_CONFIG_PAGE_IO_UNIT_7 for 200265236Sken * future use. 201265236Sken * 12-05-13 02.00.27 Added MPI2_MANPAGE7_FLAG_BASE_ENCLOSURE_LEVEL for 202265236Sken * MPI2_CONFIG_PAGE_MAN_7. 203265236Sken * Added EnclosureLevel and ConnectorName fields to 204265236Sken * MPI2_CONFIG_PAGE_SAS_DEV_0. 205265236Sken * Added MPI2_SAS_DEVICE0_FLAGS_ENCL_LEVEL_VALID for 206265236Sken * MPI2_CONFIG_PAGE_SAS_DEV_0. 207265236Sken * Added EnclosureLevel field to 208265236Sken * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0. 209265236Sken * Added MPI2_SAS_ENCLS0_FLAGS_ENCL_LEVEL_VALID for 210265236Sken * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0. 211265236Sken * -------------------------------------------------------------------------- 212265236Sken */ 213265236Sken 214265236Sken#ifndef MPI2_CNFG_H 215265236Sken#define MPI2_CNFG_H 216265236Sken 217265236Sken/***************************************************************************** 218265236Sken* Configuration Page Header and defines 219265236Sken*****************************************************************************/ 220265236Sken 221265236Sken/* Config Page Header */ 222265236Skentypedef struct _MPI2_CONFIG_PAGE_HEADER 223265236Sken{ 224265236Sken U8 PageVersion; /* 0x00 */ 225265236Sken U8 PageLength; /* 0x01 */ 226265236Sken U8 PageNumber; /* 0x02 */ 227265236Sken U8 PageType; /* 0x03 */ 228265236Sken} MPI2_CONFIG_PAGE_HEADER, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER, 229265236Sken Mpi2ConfigPageHeader_t, MPI2_POINTER pMpi2ConfigPageHeader_t; 230265236Sken 231265236Skentypedef union _MPI2_CONFIG_PAGE_HEADER_UNION 232265236Sken{ 233265236Sken MPI2_CONFIG_PAGE_HEADER Struct; 234265236Sken U8 Bytes[4]; 235265236Sken U16 Word16[2]; 236265236Sken U32 Word32; 237265236Sken} MPI2_CONFIG_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER_UNION, 238265236Sken Mpi2ConfigPageHeaderUnion, MPI2_POINTER pMpi2ConfigPageHeaderUnion; 239265236Sken 240265236Sken/* Extended Config Page Header */ 241265236Skentypedef struct _MPI2_CONFIG_EXTENDED_PAGE_HEADER 242265236Sken{ 243265236Sken U8 PageVersion; /* 0x00 */ 244265236Sken U8 Reserved1; /* 0x01 */ 245265236Sken U8 PageNumber; /* 0x02 */ 246265236Sken U8 PageType; /* 0x03 */ 247265236Sken U16 ExtPageLength; /* 0x04 */ 248265236Sken U8 ExtPageType; /* 0x06 */ 249265236Sken U8 Reserved2; /* 0x07 */ 250265236Sken} MPI2_CONFIG_EXTENDED_PAGE_HEADER, 251265236Sken MPI2_POINTER PTR_MPI2_CONFIG_EXTENDED_PAGE_HEADER, 252265236Sken Mpi2ConfigExtendedPageHeader_t, MPI2_POINTER pMpi2ConfigExtendedPageHeader_t; 253265236Sken 254265236Skentypedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION 255265236Sken{ 256265236Sken MPI2_CONFIG_PAGE_HEADER Struct; 257265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Ext; 258265236Sken U8 Bytes[8]; 259265236Sken U16 Word16[4]; 260265236Sken U32 Word32[2]; 261265236Sken} MPI2_CONFIG_EXT_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_EXT_PAGE_HEADER_UNION, 262265236Sken Mpi2ConfigPageExtendedHeaderUnion, MPI2_POINTER pMpi2ConfigPageExtendedHeaderUnion; 263265236Sken 264265236Sken 265265236Sken/* PageType field values */ 266265236Sken#define MPI2_CONFIG_PAGEATTR_READ_ONLY (0x00) 267265236Sken#define MPI2_CONFIG_PAGEATTR_CHANGEABLE (0x10) 268265236Sken#define MPI2_CONFIG_PAGEATTR_PERSISTENT (0x20) 269265236Sken#define MPI2_CONFIG_PAGEATTR_MASK (0xF0) 270265236Sken 271265236Sken#define MPI2_CONFIG_PAGETYPE_IO_UNIT (0x00) 272265236Sken#define MPI2_CONFIG_PAGETYPE_IOC (0x01) 273265236Sken#define MPI2_CONFIG_PAGETYPE_BIOS (0x02) 274265236Sken#define MPI2_CONFIG_PAGETYPE_RAID_VOLUME (0x08) 275265236Sken#define MPI2_CONFIG_PAGETYPE_MANUFACTURING (0x09) 276265236Sken#define MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A) 277265236Sken#define MPI2_CONFIG_PAGETYPE_EXTENDED (0x0F) 278265236Sken#define MPI2_CONFIG_PAGETYPE_MASK (0x0F) 279265236Sken 280265236Sken#define MPI2_CONFIG_TYPENUM_MASK (0x0FFF) 281265236Sken 282265236Sken 283265236Sken/* ExtPageType field values */ 284265236Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10) 285265236Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11) 286265236Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12) 287265236Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_PHY (0x13) 288265236Sken#define MPI2_CONFIG_EXTPAGETYPE_LOG (0x14) 289265236Sken#define MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15) 290265236Sken#define MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG (0x16) 291265236Sken#define MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING (0x17) 292265236Sken#define MPI2_CONFIG_EXTPAGETYPE_SAS_PORT (0x18) 293265236Sken#define MPI2_CONFIG_EXTPAGETYPE_ETHERNET (0x19) 294265236Sken#define MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING (0x1A) 295265236Sken 296265236Sken 297265236Sken/***************************************************************************** 298265236Sken* PageAddress defines 299265236Sken*****************************************************************************/ 300265236Sken 301265236Sken/* RAID Volume PageAddress format */ 302265236Sken#define MPI2_RAID_VOLUME_PGAD_FORM_MASK (0xF0000000) 303265236Sken#define MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 304265236Sken#define MPI2_RAID_VOLUME_PGAD_FORM_HANDLE (0x10000000) 305265236Sken 306265236Sken#define MPI2_RAID_VOLUME_PGAD_HANDLE_MASK (0x0000FFFF) 307265236Sken 308265236Sken 309265236Sken/* RAID Physical Disk PageAddress format */ 310265236Sken#define MPI2_PHYSDISK_PGAD_FORM_MASK (0xF0000000) 311265236Sken#define MPI2_PHYSDISK_PGAD_FORM_GET_NEXT_PHYSDISKNUM (0x00000000) 312265236Sken#define MPI2_PHYSDISK_PGAD_FORM_PHYSDISKNUM (0x10000000) 313265236Sken#define MPI2_PHYSDISK_PGAD_FORM_DEVHANDLE (0x20000000) 314265236Sken 315265236Sken#define MPI2_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF) 316265236Sken#define MPI2_PHYSDISK_PGAD_DEVHANDLE_MASK (0x0000FFFF) 317265236Sken 318265236Sken 319265236Sken/* SAS Expander PageAddress format */ 320265236Sken#define MPI2_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000) 321265236Sken#define MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL (0x00000000) 322265236Sken#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM (0x10000000) 323265236Sken#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL (0x20000000) 324265236Sken 325265236Sken#define MPI2_SAS_EXPAND_PGAD_HANDLE_MASK (0x0000FFFF) 326265236Sken#define MPI2_SAS_EXPAND_PGAD_PHYNUM_MASK (0x00FF0000) 327265236Sken#define MPI2_SAS_EXPAND_PGAD_PHYNUM_SHIFT (16) 328265236Sken 329265236Sken 330265236Sken/* SAS Device PageAddress format */ 331265236Sken#define MPI2_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000) 332265236Sken#define MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 333265236Sken#define MPI2_SAS_DEVICE_PGAD_FORM_HANDLE (0x20000000) 334265236Sken 335265236Sken#define MPI2_SAS_DEVICE_PGAD_HANDLE_MASK (0x0000FFFF) 336265236Sken 337265236Sken 338265236Sken/* SAS PHY PageAddress format */ 339265236Sken#define MPI2_SAS_PHY_PGAD_FORM_MASK (0xF0000000) 340265236Sken#define MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x00000000) 341265236Sken#define MPI2_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x10000000) 342265236Sken 343265236Sken#define MPI2_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF) 344265236Sken#define MPI2_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF) 345265236Sken 346265236Sken 347265236Sken/* SAS Port PageAddress format */ 348265236Sken#define MPI2_SASPORT_PGAD_FORM_MASK (0xF0000000) 349265236Sken#define MPI2_SASPORT_PGAD_FORM_GET_NEXT_PORT (0x00000000) 350265236Sken#define MPI2_SASPORT_PGAD_FORM_PORT_NUM (0x10000000) 351265236Sken 352265236Sken#define MPI2_SASPORT_PGAD_PORTNUMBER_MASK (0x00000FFF) 353265236Sken 354265236Sken 355265236Sken/* SAS Enclosure PageAddress format */ 356265236Sken#define MPI2_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000) 357265236Sken#define MPI2_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) 358265236Sken#define MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE (0x10000000) 359265236Sken 360265236Sken#define MPI2_SAS_ENCLOS_PGAD_HANDLE_MASK (0x0000FFFF) 361265236Sken 362265236Sken 363265236Sken/* RAID Configuration PageAddress format */ 364265236Sken#define MPI2_RAID_PGAD_FORM_MASK (0xF0000000) 365265236Sken#define MPI2_RAID_PGAD_FORM_GET_NEXT_CONFIGNUM (0x00000000) 366265236Sken#define MPI2_RAID_PGAD_FORM_CONFIGNUM (0x10000000) 367265236Sken#define MPI2_RAID_PGAD_FORM_ACTIVE_CONFIG (0x20000000) 368265236Sken 369265236Sken#define MPI2_RAID_PGAD_CONFIGNUM_MASK (0x000000FF) 370265236Sken 371265236Sken 372265236Sken/* Driver Persistent Mapping PageAddress format */ 373265236Sken#define MPI2_DPM_PGAD_FORM_MASK (0xF0000000) 374265236Sken#define MPI2_DPM_PGAD_FORM_ENTRY_RANGE (0x00000000) 375265236Sken 376265236Sken#define MPI2_DPM_PGAD_ENTRY_COUNT_MASK (0x0FFF0000) 377265236Sken#define MPI2_DPM_PGAD_ENTRY_COUNT_SHIFT (16) 378265236Sken#define MPI2_DPM_PGAD_START_ENTRY_MASK (0x0000FFFF) 379265236Sken 380265236Sken 381265236Sken/* Ethernet PageAddress format */ 382265236Sken#define MPI2_ETHERNET_PGAD_FORM_MASK (0xF0000000) 383265236Sken#define MPI2_ETHERNET_PGAD_FORM_IF_NUM (0x00000000) 384265236Sken 385265236Sken#define MPI2_ETHERNET_PGAD_IF_NUMBER_MASK (0x000000FF) 386265236Sken 387265236Sken 388265236Sken 389265236Sken/**************************************************************************** 390265236Sken* Configuration messages 391265236Sken****************************************************************************/ 392265236Sken 393265236Sken/* Configuration Request Message */ 394265236Skentypedef struct _MPI2_CONFIG_REQUEST 395265236Sken{ 396265236Sken U8 Action; /* 0x00 */ 397265236Sken U8 SGLFlags; /* 0x01 */ 398265236Sken U8 ChainOffset; /* 0x02 */ 399265236Sken U8 Function; /* 0x03 */ 400265236Sken U16 ExtPageLength; /* 0x04 */ 401265236Sken U8 ExtPageType; /* 0x06 */ 402265236Sken U8 MsgFlags; /* 0x07 */ 403265236Sken U8 VP_ID; /* 0x08 */ 404265236Sken U8 VF_ID; /* 0x09 */ 405265236Sken U16 Reserved1; /* 0x0A */ 406265236Sken U8 Reserved2; /* 0x0C */ 407265236Sken U8 ProxyVF_ID; /* 0x0D */ 408265236Sken U16 Reserved4; /* 0x0E */ 409265236Sken U32 Reserved3; /* 0x10 */ 410265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ 411265236Sken U32 PageAddress; /* 0x18 */ 412265236Sken MPI2_SGE_IO_UNION PageBufferSGE; /* 0x1C */ 413265236Sken} MPI2_CONFIG_REQUEST, MPI2_POINTER PTR_MPI2_CONFIG_REQUEST, 414265236Sken Mpi2ConfigRequest_t, MPI2_POINTER pMpi2ConfigRequest_t; 415265236Sken 416265236Sken/* values for the Action field */ 417265236Sken#define MPI2_CONFIG_ACTION_PAGE_HEADER (0x00) 418265236Sken#define MPI2_CONFIG_ACTION_PAGE_READ_CURRENT (0x01) 419265236Sken#define MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02) 420265236Sken#define MPI2_CONFIG_ACTION_PAGE_DEFAULT (0x03) 421265236Sken#define MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04) 422265236Sken#define MPI2_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05) 423265236Sken#define MPI2_CONFIG_ACTION_PAGE_READ_NVRAM (0x06) 424265236Sken#define MPI2_CONFIG_ACTION_PAGE_GET_CHANGEABLE (0x07) 425265236Sken 426265236Sken/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */ 427265236Sken 428265236Sken 429265236Sken/* Config Reply Message */ 430265236Skentypedef struct _MPI2_CONFIG_REPLY 431265236Sken{ 432265236Sken U8 Action; /* 0x00 */ 433265236Sken U8 SGLFlags; /* 0x01 */ 434265236Sken U8 MsgLength; /* 0x02 */ 435265236Sken U8 Function; /* 0x03 */ 436265236Sken U16 ExtPageLength; /* 0x04 */ 437265236Sken U8 ExtPageType; /* 0x06 */ 438265236Sken U8 MsgFlags; /* 0x07 */ 439265236Sken U8 VP_ID; /* 0x08 */ 440265236Sken U8 VF_ID; /* 0x09 */ 441265236Sken U16 Reserved1; /* 0x0A */ 442265236Sken U16 Reserved2; /* 0x0C */ 443265236Sken U16 IOCStatus; /* 0x0E */ 444265236Sken U32 IOCLogInfo; /* 0x10 */ 445265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ 446265236Sken} MPI2_CONFIG_REPLY, MPI2_POINTER PTR_MPI2_CONFIG_REPLY, 447265236Sken Mpi2ConfigReply_t, MPI2_POINTER pMpi2ConfigReply_t; 448265236Sken 449265236Sken 450265236Sken 451265236Sken/***************************************************************************** 452265236Sken* 453265236Sken* C o n f i g u r a t i o n P a g e s 454265236Sken* 455265236Sken*****************************************************************************/ 456265236Sken 457265236Sken/**************************************************************************** 458265236Sken* Manufacturing Config pages 459265236Sken****************************************************************************/ 460265236Sken 461265236Sken#define MPI2_MFGPAGE_VENDORID_LSI (0x1000) 462265236Sken 463265236Sken/* MPI v2.0 SAS products */ 464265236Sken#define MPI2_MFGPAGE_DEVID_SAS2004 (0x0070) 465265236Sken#define MPI2_MFGPAGE_DEVID_SAS2008 (0x0072) 466265236Sken#define MPI2_MFGPAGE_DEVID_SAS2108_1 (0x0074) 467265236Sken#define MPI2_MFGPAGE_DEVID_SAS2108_2 (0x0076) 468265236Sken#define MPI2_MFGPAGE_DEVID_SAS2108_3 (0x0077) 469265236Sken#define MPI2_MFGPAGE_DEVID_SAS2116_1 (0x0064) 470265236Sken#define MPI2_MFGPAGE_DEVID_SAS2116_2 (0x0065) 471265236Sken 472265236Sken#define MPI2_MFGPAGE_DEVID_SSS6200 (0x007E) 473265236Sken 474265236Sken#define MPI2_MFGPAGE_DEVID_SAS2208_1 (0x0080) 475265236Sken#define MPI2_MFGPAGE_DEVID_SAS2208_2 (0x0081) 476265236Sken#define MPI2_MFGPAGE_DEVID_SAS2208_3 (0x0082) 477265236Sken#define MPI2_MFGPAGE_DEVID_SAS2208_4 (0x0083) 478265236Sken#define MPI2_MFGPAGE_DEVID_SAS2208_5 (0x0084) 479265236Sken#define MPI2_MFGPAGE_DEVID_SAS2208_6 (0x0085) 480265236Sken#define MPI2_MFGPAGE_DEVID_SAS2308_1 (0x0086) 481265236Sken#define MPI2_MFGPAGE_DEVID_SAS2308_2 (0x0087) 482265236Sken#define MPI2_MFGPAGE_DEVID_SAS2308_3 (0x006E) 483265236Sken 484265236Sken/* MPI v2.5 SAS products */ 485265236Sken#define MPI25_MFGPAGE_DEVID_SAS3004 (0x0096) 486265236Sken#define MPI25_MFGPAGE_DEVID_SAS3008 (0x0097) 487265236Sken#define MPI25_MFGPAGE_DEVID_SAS3108_1 (0x0090) 488265236Sken#define MPI25_MFGPAGE_DEVID_SAS3108_2 (0x0091) 489265236Sken#define MPI25_MFGPAGE_DEVID_SAS3108_5 (0x0094) 490265236Sken#define MPI25_MFGPAGE_DEVID_SAS3108_6 (0x0095) 491265236Sken 492265236Sken 493265236Sken 494265236Sken 495265236Sken/* Manufacturing Page 0 */ 496265236Sken 497265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_0 498265236Sken{ 499265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 500265236Sken U8 ChipName[16]; /* 0x04 */ 501265236Sken U8 ChipRevision[8]; /* 0x14 */ 502265236Sken U8 BoardName[16]; /* 0x1C */ 503265236Sken U8 BoardAssembly[16]; /* 0x2C */ 504265236Sken U8 BoardTracerNumber[16]; /* 0x3C */ 505265236Sken} MPI2_CONFIG_PAGE_MAN_0, 506265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_0, 507265236Sken Mpi2ManufacturingPage0_t, MPI2_POINTER pMpi2ManufacturingPage0_t; 508265236Sken 509265236Sken#define MPI2_MANUFACTURING0_PAGEVERSION (0x00) 510265236Sken 511265236Sken 512265236Sken/* Manufacturing Page 1 */ 513265236Sken 514265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_1 515265236Sken{ 516265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 517265236Sken U8 VPD[256]; /* 0x04 */ 518265236Sken} MPI2_CONFIG_PAGE_MAN_1, 519265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_1, 520265236Sken Mpi2ManufacturingPage1_t, MPI2_POINTER pMpi2ManufacturingPage1_t; 521265236Sken 522265236Sken#define MPI2_MANUFACTURING1_PAGEVERSION (0x00) 523265236Sken 524265236Sken 525265236Skentypedef struct _MPI2_CHIP_REVISION_ID 526265236Sken{ 527265236Sken U16 DeviceID; /* 0x00 */ 528265236Sken U8 PCIRevisionID; /* 0x02 */ 529265236Sken U8 Reserved; /* 0x03 */ 530265236Sken} MPI2_CHIP_REVISION_ID, MPI2_POINTER PTR_MPI2_CHIP_REVISION_ID, 531265236Sken Mpi2ChipRevisionId_t, MPI2_POINTER pMpi2ChipRevisionId_t; 532265236Sken 533265236Sken 534265236Sken/* Manufacturing Page 2 */ 535265236Sken 536265236Sken/* 537265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 538265236Sken * one and check Header.PageLength at runtime. 539265236Sken */ 540265236Sken#ifndef MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS 541265236Sken#define MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS (1) 542265236Sken#endif 543265236Sken 544265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_2 545265236Sken{ 546265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 547265236Sken MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ 548265236Sken U32 HwSettings[MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 0x08 */ 549265236Sken} MPI2_CONFIG_PAGE_MAN_2, 550265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_2, 551265236Sken Mpi2ManufacturingPage2_t, MPI2_POINTER pMpi2ManufacturingPage2_t; 552265236Sken 553265236Sken#define MPI2_MANUFACTURING2_PAGEVERSION (0x00) 554265236Sken 555265236Sken 556265236Sken/* Manufacturing Page 3 */ 557265236Sken 558265236Sken/* 559265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 560265236Sken * one and check Header.PageLength at runtime. 561265236Sken */ 562265236Sken#ifndef MPI2_MAN_PAGE_3_INFO_WORDS 563265236Sken#define MPI2_MAN_PAGE_3_INFO_WORDS (1) 564265236Sken#endif 565265236Sken 566265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_3 567265236Sken{ 568265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 569265236Sken MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ 570265236Sken U32 Info[MPI2_MAN_PAGE_3_INFO_WORDS];/* 0x08 */ 571265236Sken} MPI2_CONFIG_PAGE_MAN_3, 572265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_3, 573265236Sken Mpi2ManufacturingPage3_t, MPI2_POINTER pMpi2ManufacturingPage3_t; 574265236Sken 575265236Sken#define MPI2_MANUFACTURING3_PAGEVERSION (0x00) 576265236Sken 577265236Sken 578265236Sken/* Manufacturing Page 4 */ 579265236Sken 580265236Skentypedef struct _MPI2_MANPAGE4_PWR_SAVE_SETTINGS 581265236Sken{ 582265236Sken U8 PowerSaveFlags; /* 0x00 */ 583265236Sken U8 InternalOperationsSleepTime; /* 0x01 */ 584265236Sken U8 InternalOperationsRunTime; /* 0x02 */ 585265236Sken U8 HostIdleTime; /* 0x03 */ 586265236Sken} MPI2_MANPAGE4_PWR_SAVE_SETTINGS, 587265236Sken MPI2_POINTER PTR_MPI2_MANPAGE4_PWR_SAVE_SETTINGS, 588265236Sken Mpi2ManPage4PwrSaveSettings_t, MPI2_POINTER pMpi2ManPage4PwrSaveSettings_t; 589265236Sken 590265236Sken/* defines for the PowerSaveFlags field */ 591265236Sken#define MPI2_MANPAGE4_MASK_POWERSAVE_MODE (0x03) 592265236Sken#define MPI2_MANPAGE4_POWERSAVE_MODE_DISABLED (0x00) 593265236Sken#define MPI2_MANPAGE4_CUSTOM_POWERSAVE_MODE (0x01) 594265236Sken#define MPI2_MANPAGE4_FULL_POWERSAVE_MODE (0x02) 595265236Sken 596265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_4 597265236Sken{ 598265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 599265236Sken U32 Reserved1; /* 0x04 */ 600265236Sken U32 Flags; /* 0x08 */ 601265236Sken U8 InquirySize; /* 0x0C */ 602265236Sken U8 Reserved2; /* 0x0D */ 603265236Sken U16 Reserved3; /* 0x0E */ 604265236Sken U8 InquiryData[56]; /* 0x10 */ 605265236Sken U32 RAID0VolumeSettings; /* 0x48 */ 606265236Sken U32 RAID1EVolumeSettings; /* 0x4C */ 607265236Sken U32 RAID1VolumeSettings; /* 0x50 */ 608265236Sken U32 RAID10VolumeSettings; /* 0x54 */ 609265236Sken U32 Reserved4; /* 0x58 */ 610265236Sken U32 Reserved5; /* 0x5C */ 611265236Sken MPI2_MANPAGE4_PWR_SAVE_SETTINGS PowerSaveSettings; /* 0x60 */ 612265236Sken U8 MaxOCEDisks; /* 0x64 */ 613265236Sken U8 ResyncRate; /* 0x65 */ 614265236Sken U16 DataScrubDuration; /* 0x66 */ 615265236Sken U8 MaxHotSpares; /* 0x68 */ 616265236Sken U8 MaxPhysDisksPerVol; /* 0x69 */ 617265236Sken U8 MaxPhysDisks; /* 0x6A */ 618265236Sken U8 MaxVolumes; /* 0x6B */ 619265236Sken} MPI2_CONFIG_PAGE_MAN_4, 620265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_4, 621265236Sken Mpi2ManufacturingPage4_t, MPI2_POINTER pMpi2ManufacturingPage4_t; 622265236Sken 623265236Sken#define MPI2_MANUFACTURING4_PAGEVERSION (0x0A) 624265236Sken 625265236Sken/* Manufacturing Page 4 Flags field */ 626265236Sken#define MPI2_MANPAGE4_METADATA_SIZE_MASK (0x00030000) 627265236Sken#define MPI2_MANPAGE4_METADATA_512MB (0x00000000) 628265236Sken 629265236Sken#define MPI2_MANPAGE4_MIX_SSD_SAS_SATA (0x00008000) 630265236Sken#define MPI2_MANPAGE4_MIX_SSD_AND_NON_SSD (0x00004000) 631265236Sken#define MPI2_MANPAGE4_HIDE_PHYSDISK_NON_IR (0x00002000) 632265236Sken 633265236Sken#define MPI2_MANPAGE4_MASK_PHYSDISK_COERCION (0x00001C00) 634265236Sken#define MPI2_MANPAGE4_PHYSDISK_COERCION_1GB (0x00000000) 635265236Sken#define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION (0x00000400) 636265236Sken#define MPI2_MANPAGE4_PHYSDISK_ADAPTIVE_COERCION (0x00000800) 637265236Sken#define MPI2_MANPAGE4_PHYSDISK_ZERO_COERCION (0x00000C00) 638265236Sken 639265236Sken#define MPI2_MANPAGE4_MASK_BAD_BLOCK_MARKING (0x00000300) 640265236Sken#define MPI2_MANPAGE4_DEFAULT_BAD_BLOCK_MARKING (0x00000000) 641265236Sken#define MPI2_MANPAGE4_TABLE_BAD_BLOCK_MARKING (0x00000100) 642265236Sken#define MPI2_MANPAGE4_WRITE_LONG_BAD_BLOCK_MARKING (0x00000200) 643265236Sken 644265236Sken#define MPI2_MANPAGE4_FORCE_OFFLINE_FAILOVER (0x00000080) 645265236Sken#define MPI2_MANPAGE4_RAID10_DISABLE (0x00000040) 646265236Sken#define MPI2_MANPAGE4_RAID1E_DISABLE (0x00000020) 647265236Sken#define MPI2_MANPAGE4_RAID1_DISABLE (0x00000010) 648265236Sken#define MPI2_MANPAGE4_RAID0_DISABLE (0x00000008) 649265236Sken#define MPI2_MANPAGE4_IR_MODEPAGE8_DISABLE (0x00000004) 650265236Sken#define MPI2_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x00000002) 651265236Sken#define MPI2_MANPAGE4_IR_NO_MIX_SAS_SATA (0x00000001) 652265236Sken 653265236Sken 654265236Sken/* Manufacturing Page 5 */ 655265236Sken 656265236Sken/* 657265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 658265236Sken * one and check the value returned for NumPhys at runtime. 659265236Sken */ 660265236Sken#ifndef MPI2_MAN_PAGE_5_PHY_ENTRIES 661265236Sken#define MPI2_MAN_PAGE_5_PHY_ENTRIES (1) 662265236Sken#endif 663265236Sken 664265236Skentypedef struct _MPI2_MANUFACTURING5_ENTRY 665265236Sken{ 666265236Sken U64 WWID; /* 0x00 */ 667265236Sken U64 DeviceName; /* 0x08 */ 668265236Sken} MPI2_MANUFACTURING5_ENTRY, MPI2_POINTER PTR_MPI2_MANUFACTURING5_ENTRY, 669265236Sken Mpi2Manufacturing5Entry_t, MPI2_POINTER pMpi2Manufacturing5Entry_t; 670265236Sken 671265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_5 672265236Sken{ 673265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 674265236Sken U8 NumPhys; /* 0x04 */ 675265236Sken U8 Reserved1; /* 0x05 */ 676265236Sken U16 Reserved2; /* 0x06 */ 677265236Sken U32 Reserved3; /* 0x08 */ 678265236Sken U32 Reserved4; /* 0x0C */ 679265236Sken MPI2_MANUFACTURING5_ENTRY Phy[MPI2_MAN_PAGE_5_PHY_ENTRIES];/* 0x08 */ 680265236Sken} MPI2_CONFIG_PAGE_MAN_5, 681265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_5, 682265236Sken Mpi2ManufacturingPage5_t, MPI2_POINTER pMpi2ManufacturingPage5_t; 683265236Sken 684265236Sken#define MPI2_MANUFACTURING5_PAGEVERSION (0x03) 685265236Sken 686265236Sken 687265236Sken/* Manufacturing Page 6 */ 688265236Sken 689265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_6 690265236Sken{ 691265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 692265236Sken U32 ProductSpecificInfo;/* 0x04 */ 693265236Sken} MPI2_CONFIG_PAGE_MAN_6, 694265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_6, 695265236Sken Mpi2ManufacturingPage6_t, MPI2_POINTER pMpi2ManufacturingPage6_t; 696265236Sken 697265236Sken#define MPI2_MANUFACTURING6_PAGEVERSION (0x00) 698265236Sken 699265236Sken 700265236Sken/* Manufacturing Page 7 */ 701265236Sken 702265236Skentypedef struct _MPI2_MANPAGE7_CONNECTOR_INFO 703265236Sken{ 704265236Sken U32 Pinout; /* 0x00 */ 705265236Sken U8 Connector[16]; /* 0x04 */ 706265236Sken U8 Location; /* 0x14 */ 707265236Sken U8 ReceptacleID; /* 0x15 */ 708265236Sken U16 Slot; /* 0x16 */ 709265236Sken U32 Reserved2; /* 0x18 */ 710265236Sken} MPI2_MANPAGE7_CONNECTOR_INFO, MPI2_POINTER PTR_MPI2_MANPAGE7_CONNECTOR_INFO, 711265236Sken Mpi2ManPage7ConnectorInfo_t, MPI2_POINTER pMpi2ManPage7ConnectorInfo_t; 712265236Sken 713265236Sken/* defines for the Pinout field */ 714265236Sken#define MPI2_MANPAGE7_PINOUT_LANE_MASK (0x0000FF00) 715265236Sken#define MPI2_MANPAGE7_PINOUT_LANE_SHIFT (8) 716265236Sken 717265236Sken#define MPI2_MANPAGE7_PINOUT_TYPE_MASK (0x000000FF) 718265236Sken#define MPI2_MANPAGE7_PINOUT_TYPE_UNKNOWN (0x00) 719265236Sken#define MPI2_MANPAGE7_PINOUT_SATA_SINGLE (0x01) 720265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8482 (0x02) 721265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8486 (0x03) 722265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8484 (0x04) 723265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8087 (0x05) 724265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8643_4I (0x06) 725265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8643_8I (0x07) 726265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8470 (0x08) 727265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8088 (0x09) 728265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8644_4X (0x0A) 729265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8644_8X (0x0B) 730265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8644_16X (0x0C) 731265236Sken#define MPI2_MANPAGE7_PINOUT_SFF_8436 (0x0D) 732265236Sken 733265236Sken/* defines for the Location field */ 734265236Sken#define MPI2_MANPAGE7_LOCATION_UNKNOWN (0x01) 735265236Sken#define MPI2_MANPAGE7_LOCATION_INTERNAL (0x02) 736265236Sken#define MPI2_MANPAGE7_LOCATION_EXTERNAL (0x04) 737265236Sken#define MPI2_MANPAGE7_LOCATION_SWITCHABLE (0x08) 738265236Sken#define MPI2_MANPAGE7_LOCATION_AUTO (0x10) 739265236Sken#define MPI2_MANPAGE7_LOCATION_NOT_PRESENT (0x20) 740265236Sken#define MPI2_MANPAGE7_LOCATION_NOT_CONNECTED (0x80) 741265236Sken 742265236Sken/* 743265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 744265236Sken * one and check the value returned for NumPhys at runtime. 745265236Sken */ 746265236Sken#ifndef MPI2_MANPAGE7_CONNECTOR_INFO_MAX 747265236Sken#define MPI2_MANPAGE7_CONNECTOR_INFO_MAX (1) 748265236Sken#endif 749265236Sken 750265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_7 751265236Sken{ 752265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 753265236Sken U32 Reserved1; /* 0x04 */ 754265236Sken U32 Reserved2; /* 0x08 */ 755265236Sken U32 Flags; /* 0x0C */ 756265236Sken U8 EnclosureName[16]; /* 0x10 */ 757265236Sken U8 NumPhys; /* 0x20 */ 758265236Sken U8 Reserved3; /* 0x21 */ 759265236Sken U16 Reserved4; /* 0x22 */ 760265236Sken MPI2_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI2_MANPAGE7_CONNECTOR_INFO_MAX]; /* 0x24 */ 761265236Sken} MPI2_CONFIG_PAGE_MAN_7, 762265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_7, 763265236Sken Mpi2ManufacturingPage7_t, MPI2_POINTER pMpi2ManufacturingPage7_t; 764265236Sken 765265236Sken#define MPI2_MANUFACTURING7_PAGEVERSION (0x01) 766265236Sken 767265236Sken/* defines for the Flags field */ 768265236Sken#define MPI2_MANPAGE7_FLAG_BASE_ENCLOSURE_LEVEL (0x00000008) 769265236Sken#define MPI2_MANPAGE7_FLAG_EVENTREPLAY_SLOT_ORDER (0x00000002) 770265236Sken#define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001) 771265236Sken 772265236Sken 773265236Sken/* 774265236Sken * Generic structure to use for product-specific manufacturing pages 775265236Sken * (currently Manufacturing Page 8 through Manufacturing Page 31). 776265236Sken */ 777265236Sken 778265236Skentypedef struct _MPI2_CONFIG_PAGE_MAN_PS 779265236Sken{ 780265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 781265236Sken U32 ProductSpecificInfo;/* 0x04 */ 782265236Sken} MPI2_CONFIG_PAGE_MAN_PS, 783265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_PS, 784265236Sken Mpi2ManufacturingPagePS_t, MPI2_POINTER pMpi2ManufacturingPagePS_t; 785265236Sken 786265236Sken#define MPI2_MANUFACTURING8_PAGEVERSION (0x00) 787265236Sken#define MPI2_MANUFACTURING9_PAGEVERSION (0x00) 788265236Sken#define MPI2_MANUFACTURING10_PAGEVERSION (0x00) 789265236Sken#define MPI2_MANUFACTURING11_PAGEVERSION (0x00) 790265236Sken#define MPI2_MANUFACTURING12_PAGEVERSION (0x00) 791265236Sken#define MPI2_MANUFACTURING13_PAGEVERSION (0x00) 792265236Sken#define MPI2_MANUFACTURING14_PAGEVERSION (0x00) 793265236Sken#define MPI2_MANUFACTURING15_PAGEVERSION (0x00) 794265236Sken#define MPI2_MANUFACTURING16_PAGEVERSION (0x00) 795265236Sken#define MPI2_MANUFACTURING17_PAGEVERSION (0x00) 796265236Sken#define MPI2_MANUFACTURING18_PAGEVERSION (0x00) 797265236Sken#define MPI2_MANUFACTURING19_PAGEVERSION (0x00) 798265236Sken#define MPI2_MANUFACTURING20_PAGEVERSION (0x00) 799265236Sken#define MPI2_MANUFACTURING21_PAGEVERSION (0x00) 800265236Sken#define MPI2_MANUFACTURING22_PAGEVERSION (0x00) 801265236Sken#define MPI2_MANUFACTURING23_PAGEVERSION (0x00) 802265236Sken#define MPI2_MANUFACTURING24_PAGEVERSION (0x00) 803265236Sken#define MPI2_MANUFACTURING25_PAGEVERSION (0x00) 804265236Sken#define MPI2_MANUFACTURING26_PAGEVERSION (0x00) 805265236Sken#define MPI2_MANUFACTURING27_PAGEVERSION (0x00) 806265236Sken#define MPI2_MANUFACTURING28_PAGEVERSION (0x00) 807265236Sken#define MPI2_MANUFACTURING29_PAGEVERSION (0x00) 808265236Sken#define MPI2_MANUFACTURING30_PAGEVERSION (0x00) 809265236Sken#define MPI2_MANUFACTURING31_PAGEVERSION (0x00) 810265236Sken 811265236Sken 812265236Sken/**************************************************************************** 813265236Sken* IO Unit Config Pages 814265236Sken****************************************************************************/ 815265236Sken 816265236Sken/* IO Unit Page 0 */ 817265236Sken 818265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_0 819265236Sken{ 820265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 821265236Sken U64 UniqueValue; /* 0x04 */ 822265236Sken MPI2_VERSION_UNION NvdataVersionDefault; /* 0x08 */ 823265236Sken MPI2_VERSION_UNION NvdataVersionPersistent; /* 0x0A */ 824265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_0, 825265236Sken Mpi2IOUnitPage0_t, MPI2_POINTER pMpi2IOUnitPage0_t; 826265236Sken 827265236Sken#define MPI2_IOUNITPAGE0_PAGEVERSION (0x02) 828265236Sken 829265236Sken 830265236Sken/* IO Unit Page 1 */ 831265236Sken 832265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_1 833265236Sken{ 834265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 835265236Sken U32 Flags; /* 0x04 */ 836265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_1, 837265236Sken Mpi2IOUnitPage1_t, MPI2_POINTER pMpi2IOUnitPage1_t; 838265236Sken 839265236Sken#define MPI2_IOUNITPAGE1_PAGEVERSION (0x04) 840265236Sken 841265236Sken/* IO Unit Page 1 Flags defines */ 842265236Sken#define MPI2_IOUNITPAGE1_ATA_SECURITY_FREEZE_LOCK (0x00004000) 843265236Sken#define MPI25_IOUNITPAGE1_NEW_DEVICE_FAST_PATH_DISABLE (0x00002000) 844265236Sken#define MPI25_IOUNITPAGE1_DISABLE_FAST_PATH (0x00001000) 845265236Sken#define MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY (0x00000800) 846265236Sken#define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600) 847265236Sken#define MPI2_IOUNITPAGE1_SATA_WRITE_CACHE_SHIFT (9) 848265236Sken#define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000) 849265236Sken#define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200) 850265236Sken#define MPI2_IOUNITPAGE1_UNCHANGED_SATA_WRITE_CACHE (0x00000400) 851265236Sken#define MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100) 852265236Sken#define MPI2_IOUNITPAGE1_DISABLE_IR (0x00000040) 853265236Sken#define MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING (0x00000020) 854265236Sken#define MPI2_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004) 855265236Sken 856265236Sken 857265236Sken/* IO Unit Page 3 */ 858265236Sken 859265236Sken/* 860265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 861265236Sken * one and check the value returned for GPIOCount at runtime. 862265236Sken */ 863265236Sken#ifndef MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX 864265236Sken#define MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1) 865265236Sken#endif 866265236Sken 867265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_3 868265236Sken{ 869265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 870265236Sken U8 GPIOCount; /* 0x04 */ 871265236Sken U8 Reserved1; /* 0x05 */ 872265236Sken U16 Reserved2; /* 0x06 */ 873265236Sken U16 GPIOVal[MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX];/* 0x08 */ 874265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_3, 875265236Sken Mpi2IOUnitPage3_t, MPI2_POINTER pMpi2IOUnitPage3_t; 876265236Sken 877265236Sken#define MPI2_IOUNITPAGE3_PAGEVERSION (0x01) 878265236Sken 879265236Sken/* defines for IO Unit Page 3 GPIOVal field */ 880265236Sken#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFFFC) 881265236Sken#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2) 882265236Sken#define MPI2_IOUNITPAGE3_GPIO_SETTING_OFF (0x0000) 883265236Sken#define MPI2_IOUNITPAGE3_GPIO_SETTING_ON (0x0001) 884265236Sken 885265236Sken 886265236Sken/* IO Unit Page 5 */ 887265236Sken 888265236Sken/* 889265236Sken * Upper layer code (drivers, utilities, etc.) should leave this define set to 890265236Sken * one and check the value returned for NumDmaEngines at runtime. 891265236Sken */ 892265236Sken#ifndef MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES 893265236Sken#define MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES (1) 894265236Sken#endif 895265236Sken 896265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_5 897265236Sken{ 898265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 899265236Sken U64 RaidAcceleratorBufferBaseAddress; /* 0x04 */ 900265236Sken U64 RaidAcceleratorBufferSize; /* 0x0C */ 901265236Sken U64 RaidAcceleratorControlBaseAddress; /* 0x14 */ 902265236Sken U8 RAControlSize; /* 0x1C */ 903265236Sken U8 NumDmaEngines; /* 0x1D */ 904265236Sken U8 RAMinControlSize; /* 0x1E */ 905265236Sken U8 RAMaxControlSize; /* 0x1F */ 906265236Sken U32 Reserved1; /* 0x20 */ 907265236Sken U32 Reserved2; /* 0x24 */ 908265236Sken U32 Reserved3; /* 0x28 */ 909265236Sken U32 DmaEngineCapabilities[MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES]; /* 0x2C */ 910265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_5, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_5, 911265236Sken Mpi2IOUnitPage5_t, MPI2_POINTER pMpi2IOUnitPage5_t; 912265236Sken 913265236Sken#define MPI2_IOUNITPAGE5_PAGEVERSION (0x00) 914265236Sken 915265236Sken/* defines for IO Unit Page 5 DmaEngineCapabilities field */ 916265236Sken#define MPI2_IOUNITPAGE5_DMA_CAP_MASK_MAX_REQUESTS (0xFFFF0000) 917265236Sken#define MPI2_IOUNITPAGE5_DMA_CAP_SHIFT_MAX_REQUESTS (16) 918265236Sken 919265236Sken#define MPI2_IOUNITPAGE5_DMA_CAP_EEDP (0x0008) 920265236Sken#define MPI2_IOUNITPAGE5_DMA_CAP_PARITY_GENERATION (0x0004) 921265236Sken#define MPI2_IOUNITPAGE5_DMA_CAP_HASHING (0x0002) 922265236Sken#define MPI2_IOUNITPAGE5_DMA_CAP_ENCRYPTION (0x0001) 923265236Sken 924265236Sken 925265236Sken/* IO Unit Page 6 */ 926265236Sken 927265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_6 928265236Sken{ 929265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 930265236Sken U16 Flags; /* 0x04 */ 931265236Sken U8 RAHostControlSize; /* 0x06 */ 932265236Sken U8 Reserved0; /* 0x07 */ 933265236Sken U64 RaidAcceleratorHostControlBaseAddress; /* 0x08 */ 934265236Sken U32 Reserved1; /* 0x10 */ 935265236Sken U32 Reserved2; /* 0x14 */ 936265236Sken U32 Reserved3; /* 0x18 */ 937265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_6, 938265236Sken Mpi2IOUnitPage6_t, MPI2_POINTER pMpi2IOUnitPage6_t; 939265236Sken 940265236Sken#define MPI2_IOUNITPAGE6_PAGEVERSION (0x00) 941265236Sken 942265236Sken/* defines for IO Unit Page 6 Flags field */ 943265236Sken#define MPI2_IOUNITPAGE6_FLAGS_ENABLE_RAID_ACCELERATOR (0x0001) 944265236Sken 945265236Sken 946265236Sken/* IO Unit Page 7 */ 947265236Sken 948265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7 949265236Sken{ 950265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 951265236Sken U8 CurrentPowerMode; /* 0x04 */ /* reserved in MPI 2.0 */ 952265236Sken U8 PreviousPowerMode; /* 0x05 */ /* reserved in MPI 2.0 */ 953265236Sken U8 PCIeWidth; /* 0x06 */ 954265236Sken U8 PCIeSpeed; /* 0x07 */ 955265236Sken U32 ProcessorState; /* 0x08 */ 956265236Sken U32 PowerManagementCapabilities; /* 0x0C */ 957265236Sken U16 IOCTemperature; /* 0x10 */ 958265236Sken U8 IOCTemperatureUnits; /* 0x12 */ 959265236Sken U8 IOCSpeed; /* 0x13 */ 960265236Sken U16 BoardTemperature; /* 0x14 */ 961265236Sken U8 BoardTemperatureUnits; /* 0x16 */ 962265236Sken U8 Reserved3; /* 0x17 */ 963265236Sken U32 Reserved4; /* 0x18 */ 964265236Sken U32 Reserved5; /* 0x1C */ 965265236Sken U32 Reserved6; /* 0x20 */ 966265236Sken U32 Reserved7; /* 0x24 */ 967265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_7, 968265236Sken Mpi2IOUnitPage7_t, MPI2_POINTER pMpi2IOUnitPage7_t; 969265236Sken 970265236Sken#define MPI2_IOUNITPAGE7_PAGEVERSION (0x04) 971265236Sken 972265236Sken/* defines for IO Unit Page 7 CurrentPowerMode and PreviousPowerMode fields */ 973265236Sken#define MPI25_IOUNITPAGE7_PM_INIT_MASK (0xC0) 974265236Sken#define MPI25_IOUNITPAGE7_PM_INIT_UNAVAILABLE (0x00) 975265236Sken#define MPI25_IOUNITPAGE7_PM_INIT_HOST (0x40) 976265236Sken#define MPI25_IOUNITPAGE7_PM_INIT_IO_UNIT (0x80) 977265236Sken#define MPI25_IOUNITPAGE7_PM_INIT_PCIE_DPA (0xC0) 978265236Sken 979265236Sken#define MPI25_IOUNITPAGE7_PM_MODE_MASK (0x07) 980265236Sken#define MPI25_IOUNITPAGE7_PM_MODE_UNAVAILABLE (0x00) 981265236Sken#define MPI25_IOUNITPAGE7_PM_MODE_UNKNOWN (0x01) 982265236Sken#define MPI25_IOUNITPAGE7_PM_MODE_FULL_POWER (0x04) 983265236Sken#define MPI25_IOUNITPAGE7_PM_MODE_REDUCED_POWER (0x05) 984265236Sken#define MPI25_IOUNITPAGE7_PM_MODE_STANDBY (0x06) 985265236Sken 986265236Sken 987265236Sken/* defines for IO Unit Page 7 PCIeWidth field */ 988265236Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X1 (0x01) 989265236Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X2 (0x02) 990265236Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X4 (0x04) 991265236Sken#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X8 (0x08) 992265236Sken 993265236Sken/* defines for IO Unit Page 7 PCIeSpeed field */ 994265236Sken#define MPI2_IOUNITPAGE7_PCIE_SPEED_2_5_GBPS (0x00) 995265236Sken#define MPI2_IOUNITPAGE7_PCIE_SPEED_5_0_GBPS (0x01) 996265236Sken#define MPI2_IOUNITPAGE7_PCIE_SPEED_8_0_GBPS (0x02) 997265236Sken 998265236Sken/* defines for IO Unit Page 7 ProcessorState field */ 999265236Sken#define MPI2_IOUNITPAGE7_PSTATE_MASK_SECOND (0x0000000F) 1000265236Sken#define MPI2_IOUNITPAGE7_PSTATE_SHIFT_SECOND (0) 1001265236Sken 1002265236Sken#define MPI2_IOUNITPAGE7_PSTATE_NOT_PRESENT (0x00) 1003265236Sken#define MPI2_IOUNITPAGE7_PSTATE_DISABLED (0x01) 1004265236Sken#define MPI2_IOUNITPAGE7_PSTATE_ENABLED (0x02) 1005265236Sken 1006265236Sken/* defines for IO Unit Page 7 PowerManagementCapabilities field */ 1007265236Sken#define MPI25_IOUNITPAGE7_PMCAP_DPA_FULL_PWR_MODE (0x00400000) 1008265236Sken#define MPI25_IOUNITPAGE7_PMCAP_DPA_REDUCED_PWR_MODE (0x00200000) 1009265236Sken#define MPI25_IOUNITPAGE7_PMCAP_DPA_STANDBY_MODE (0x00100000) 1010265236Sken#define MPI25_IOUNITPAGE7_PMCAP_HOST_FULL_PWR_MODE (0x00040000) 1011265236Sken#define MPI25_IOUNITPAGE7_PMCAP_HOST_REDUCED_PWR_MODE (0x00020000) 1012265236Sken#define MPI25_IOUNITPAGE7_PMCAP_HOST_STANDBY_MODE (0x00010000) 1013265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_FULL_PWR_MODE (0x00004000) 1014265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_REDUCED_PWR_MODE (0x00002000) 1015265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_STANDBY_MODE (0x00001000) 1016265236Sken#define MPI2_IOUNITPAGE7_PMCAP_HOST_12_5_PCT_IOCSPEED (0x00000400) 1017265236Sken#define MPI2_IOUNITPAGE7_PMCAP_HOST_25_0_PCT_IOCSPEED (0x00000200) 1018265236Sken#define MPI2_IOUNITPAGE7_PMCAP_HOST_50_0_PCT_IOCSPEED (0x00000100) 1019265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_12_5_PCT_IOCSPEED (0x00000040) 1020265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_25_0_PCT_IOCSPEED (0x00000020) 1021265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_50_0_PCT_IOCSPEED (0x00000010) 1022265236Sken#define MPI2_IOUNITPAGE7_PMCAP_HOST_WIDTH_CHANGE_PCIE (0x00000008) /* obsolete */ 1023265236Sken#define MPI2_IOUNITPAGE7_PMCAP_HOST_SPEED_CHANGE_PCIE (0x00000004) /* obsolete */ 1024265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_WIDTH_CHANGE_PCIE (0x00000002) /* obsolete */ 1025265236Sken#define MPI25_IOUNITPAGE7_PMCAP_IO_SPEED_CHANGE_PCIE (0x00000001) /* obsolete */ 1026265236Sken 1027265236Sken/* obsolete names for the PowerManagementCapabilities bits (above) */ 1028265236Sken#define MPI2_IOUNITPAGE7_PMCAP_12_5_PCT_IOCSPEED (0x00000400) 1029265236Sken#define MPI2_IOUNITPAGE7_PMCAP_25_0_PCT_IOCSPEED (0x00000200) 1030265236Sken#define MPI2_IOUNITPAGE7_PMCAP_50_0_PCT_IOCSPEED (0x00000100) 1031265236Sken#define MPI2_IOUNITPAGE7_PMCAP_PCIE_WIDTH_CHANGE (0x00000008) /* obsolete */ 1032265236Sken#define MPI2_IOUNITPAGE7_PMCAP_PCIE_SPEED_CHANGE (0x00000004) /* obsolete */ 1033265236Sken 1034265236Sken 1035265236Sken/* defines for IO Unit Page 7 IOCTemperatureUnits field */ 1036265236Sken#define MPI2_IOUNITPAGE7_IOC_TEMP_NOT_PRESENT (0x00) 1037265236Sken#define MPI2_IOUNITPAGE7_IOC_TEMP_FAHRENHEIT (0x01) 1038265236Sken#define MPI2_IOUNITPAGE7_IOC_TEMP_CELSIUS (0x02) 1039265236Sken 1040265236Sken/* defines for IO Unit Page 7 IOCSpeed field */ 1041265236Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_FULL (0x01) 1042265236Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_HALF (0x02) 1043265236Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_QUARTER (0x04) 1044265236Sken#define MPI2_IOUNITPAGE7_IOC_SPEED_EIGHTH (0x08) 1045265236Sken 1046265236Sken/* defines for IO Unit Page 7 BoardTemperatureUnits field */ 1047265236Sken#define MPI2_IOUNITPAGE7_BOARD_TEMP_NOT_PRESENT (0x00) 1048265236Sken#define MPI2_IOUNITPAGE7_BOARD_TEMP_FAHRENHEIT (0x01) 1049265236Sken#define MPI2_IOUNITPAGE7_BOARD_TEMP_CELSIUS (0x02) 1050265236Sken 1051265236Sken 1052265236Sken/* IO Unit Page 8 */ 1053265236Sken 1054265236Sken#define MPI2_IOUNIT8_NUM_THRESHOLDS (4) 1055265236Sken 1056265236Skentypedef struct _MPI2_IOUNIT8_SENSOR 1057265236Sken{ 1058265236Sken U16 Flags; /* 0x00 */ 1059265236Sken U16 Reserved1; /* 0x02 */ 1060265236Sken U16 Threshold[MPI2_IOUNIT8_NUM_THRESHOLDS]; /* 0x04 */ 1061265236Sken U32 Reserved2; /* 0x0C */ 1062265236Sken U32 Reserved3; /* 0x10 */ 1063265236Sken U32 Reserved4; /* 0x14 */ 1064265236Sken} MPI2_IOUNIT8_SENSOR, MPI2_POINTER PTR_MPI2_IOUNIT8_SENSOR, 1065265236Sken Mpi2IOUnit8Sensor_t, MPI2_POINTER pMpi2IOUnit8Sensor_t; 1066265236Sken 1067265236Sken/* defines for IO Unit Page 8 Sensor Flags field */ 1068265236Sken#define MPI2_IOUNIT8_SENSOR_FLAGS_T3_ENABLE (0x0008) 1069265236Sken#define MPI2_IOUNIT8_SENSOR_FLAGS_T2_ENABLE (0x0004) 1070265236Sken#define MPI2_IOUNIT8_SENSOR_FLAGS_T1_ENABLE (0x0002) 1071265236Sken#define MPI2_IOUNIT8_SENSOR_FLAGS_T0_ENABLE (0x0001) 1072265236Sken 1073265236Sken/* 1074265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1075265236Sken * one and check the value returned for NumSensors at runtime. 1076265236Sken */ 1077265236Sken#ifndef MPI2_IOUNITPAGE8_SENSOR_ENTRIES 1078265236Sken#define MPI2_IOUNITPAGE8_SENSOR_ENTRIES (1) 1079265236Sken#endif 1080265236Sken 1081265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_8 1082265236Sken{ 1083265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1084265236Sken U32 Reserved1; /* 0x04 */ 1085265236Sken U32 Reserved2; /* 0x08 */ 1086265236Sken U8 NumSensors; /* 0x0C */ 1087265236Sken U8 PollingInterval; /* 0x0D */ 1088265236Sken U16 Reserved3; /* 0x0E */ 1089265236Sken MPI2_IOUNIT8_SENSOR Sensor[MPI2_IOUNITPAGE8_SENSOR_ENTRIES];/* 0x10 */ 1090265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_8, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_8, 1091265236Sken Mpi2IOUnitPage8_t, MPI2_POINTER pMpi2IOUnitPage8_t; 1092265236Sken 1093265236Sken#define MPI2_IOUNITPAGE8_PAGEVERSION (0x00) 1094265236Sken 1095265236Sken 1096265236Sken/* IO Unit Page 9 */ 1097265236Sken 1098265236Skentypedef struct _MPI2_IOUNIT9_SENSOR 1099265236Sken{ 1100265236Sken U16 CurrentTemperature; /* 0x00 */ 1101265236Sken U16 Reserved1; /* 0x02 */ 1102265236Sken U8 Flags; /* 0x04 */ 1103265236Sken U8 Reserved2; /* 0x05 */ 1104265236Sken U16 Reserved3; /* 0x06 */ 1105265236Sken U32 Reserved4; /* 0x08 */ 1106265236Sken U32 Reserved5; /* 0x0C */ 1107265236Sken} MPI2_IOUNIT9_SENSOR, MPI2_POINTER PTR_MPI2_IOUNIT9_SENSOR, 1108265236Sken Mpi2IOUnit9Sensor_t, MPI2_POINTER pMpi2IOUnit9Sensor_t; 1109265236Sken 1110265236Sken/* defines for IO Unit Page 9 Sensor Flags field */ 1111265236Sken#define MPI2_IOUNIT9_SENSOR_FLAGS_TEMP_VALID (0x01) 1112265236Sken 1113265236Sken/* 1114265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1115265236Sken * one and check the value returned for NumSensors at runtime. 1116265236Sken */ 1117265236Sken#ifndef MPI2_IOUNITPAGE9_SENSOR_ENTRIES 1118265236Sken#define MPI2_IOUNITPAGE9_SENSOR_ENTRIES (1) 1119265236Sken#endif 1120265236Sken 1121265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_9 1122265236Sken{ 1123265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1124265236Sken U32 Reserved1; /* 0x04 */ 1125265236Sken U32 Reserved2; /* 0x08 */ 1126265236Sken U8 NumSensors; /* 0x0C */ 1127265236Sken U8 Reserved4; /* 0x0D */ 1128265236Sken U16 Reserved3; /* 0x0E */ 1129265236Sken MPI2_IOUNIT9_SENSOR Sensor[MPI2_IOUNITPAGE9_SENSOR_ENTRIES];/* 0x10 */ 1130265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_9, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_9, 1131265236Sken Mpi2IOUnitPage9_t, MPI2_POINTER pMpi2IOUnitPage9_t; 1132265236Sken 1133265236Sken#define MPI2_IOUNITPAGE9_PAGEVERSION (0x00) 1134265236Sken 1135265236Sken 1136265236Sken/* IO Unit Page 10 */ 1137265236Sken 1138265236Skentypedef struct _MPI2_IOUNIT10_FUNCTION 1139265236Sken{ 1140265236Sken U8 CreditPercent; /* 0x00 */ 1141265236Sken U8 Reserved1; /* 0x01 */ 1142265236Sken U16 Reserved2; /* 0x02 */ 1143265236Sken} MPI2_IOUNIT10_FUNCTION, MPI2_POINTER PTR_MPI2_IOUNIT10_FUNCTION, 1144265236Sken Mpi2IOUnit10Function_t, MPI2_POINTER pMpi2IOUnit10Function_t; 1145265236Sken 1146265236Sken/* 1147265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1148265236Sken * one and check the value returned for NumFunctions at runtime. 1149265236Sken */ 1150265236Sken#ifndef MPI2_IOUNITPAGE10_FUNCTION_ENTRIES 1151265236Sken#define MPI2_IOUNITPAGE10_FUNCTION_ENTRIES (1) 1152265236Sken#endif 1153265236Sken 1154265236Skentypedef struct _MPI2_CONFIG_PAGE_IO_UNIT_10 1155265236Sken{ 1156265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1157265236Sken U8 NumFunctions; /* 0x04 */ 1158265236Sken U8 Reserved1; /* 0x05 */ 1159265236Sken U16 Reserved2; /* 0x06 */ 1160265236Sken U32 Reserved3; /* 0x08 */ 1161265236Sken U32 Reserved4; /* 0x0C */ 1162265236Sken MPI2_IOUNIT10_FUNCTION Function[MPI2_IOUNITPAGE10_FUNCTION_ENTRIES]; /* 0x10 */ 1163265236Sken} MPI2_CONFIG_PAGE_IO_UNIT_10, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_10, 1164265236Sken Mpi2IOUnitPage10_t, MPI2_POINTER pMpi2IOUnitPage10_t; 1165265236Sken 1166265236Sken#define MPI2_IOUNITPAGE10_PAGEVERSION (0x01) 1167265236Sken 1168265236Sken 1169265236Sken 1170265236Sken/**************************************************************************** 1171265236Sken* IOC Config Pages 1172265236Sken****************************************************************************/ 1173265236Sken 1174265236Sken/* IOC Page 0 */ 1175265236Sken 1176265236Skentypedef struct _MPI2_CONFIG_PAGE_IOC_0 1177265236Sken{ 1178265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1179265236Sken U32 Reserved1; /* 0x04 */ 1180265236Sken U32 Reserved2; /* 0x08 */ 1181265236Sken U16 VendorID; /* 0x0C */ 1182265236Sken U16 DeviceID; /* 0x0E */ 1183265236Sken U8 RevisionID; /* 0x10 */ 1184265236Sken U8 Reserved3; /* 0x11 */ 1185265236Sken U16 Reserved4; /* 0x12 */ 1186265236Sken U32 ClassCode; /* 0x14 */ 1187265236Sken U16 SubsystemVendorID; /* 0x18 */ 1188265236Sken U16 SubsystemID; /* 0x1A */ 1189265236Sken} MPI2_CONFIG_PAGE_IOC_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_0, 1190265236Sken Mpi2IOCPage0_t, MPI2_POINTER pMpi2IOCPage0_t; 1191265236Sken 1192265236Sken#define MPI2_IOCPAGE0_PAGEVERSION (0x02) 1193265236Sken 1194265236Sken 1195265236Sken/* IOC Page 1 */ 1196265236Sken 1197265236Skentypedef struct _MPI2_CONFIG_PAGE_IOC_1 1198265236Sken{ 1199265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1200265236Sken U32 Flags; /* 0x04 */ 1201265236Sken U32 CoalescingTimeout; /* 0x08 */ 1202265236Sken U8 CoalescingDepth; /* 0x0C */ 1203265236Sken U8 PCISlotNum; /* 0x0D */ 1204265236Sken U8 PCIBusNum; /* 0x0E */ 1205265236Sken U8 PCIDomainSegment; /* 0x0F */ 1206265236Sken U32 Reserved1; /* 0x10 */ 1207265236Sken U32 Reserved2; /* 0x14 */ 1208265236Sken} MPI2_CONFIG_PAGE_IOC_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_1, 1209265236Sken Mpi2IOCPage1_t, MPI2_POINTER pMpi2IOCPage1_t; 1210265236Sken 1211265236Sken#define MPI2_IOCPAGE1_PAGEVERSION (0x05) 1212265236Sken 1213265236Sken/* defines for IOC Page 1 Flags field */ 1214265236Sken#define MPI2_IOCPAGE1_REPLY_COALESCING (0x00000001) 1215265236Sken 1216265236Sken#define MPI2_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF) 1217265236Sken#define MPI2_IOCPAGE1_PCIBUSNUM_UNKNOWN (0xFF) 1218265236Sken#define MPI2_IOCPAGE1_PCIDOMAIN_UNKNOWN (0xFF) 1219265236Sken 1220265236Sken/* IOC Page 6 */ 1221265236Sken 1222265236Skentypedef struct _MPI2_CONFIG_PAGE_IOC_6 1223265236Sken{ 1224265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1225265236Sken U32 CapabilitiesFlags; /* 0x04 */ 1226265236Sken U8 MaxDrivesRAID0; /* 0x08 */ 1227265236Sken U8 MaxDrivesRAID1; /* 0x09 */ 1228265236Sken U8 MaxDrivesRAID1E; /* 0x0A */ 1229265236Sken U8 MaxDrivesRAID10; /* 0x0B */ 1230265236Sken U8 MinDrivesRAID0; /* 0x0C */ 1231265236Sken U8 MinDrivesRAID1; /* 0x0D */ 1232265236Sken U8 MinDrivesRAID1E; /* 0x0E */ 1233265236Sken U8 MinDrivesRAID10; /* 0x0F */ 1234265236Sken U32 Reserved1; /* 0x10 */ 1235265236Sken U8 MaxGlobalHotSpares; /* 0x14 */ 1236265236Sken U8 MaxPhysDisks; /* 0x15 */ 1237265236Sken U8 MaxVolumes; /* 0x16 */ 1238265236Sken U8 MaxConfigs; /* 0x17 */ 1239265236Sken U8 MaxOCEDisks; /* 0x18 */ 1240265236Sken U8 Reserved2; /* 0x19 */ 1241265236Sken U16 Reserved3; /* 0x1A */ 1242265236Sken U32 SupportedStripeSizeMapRAID0; /* 0x1C */ 1243265236Sken U32 SupportedStripeSizeMapRAID1E; /* 0x20 */ 1244265236Sken U32 SupportedStripeSizeMapRAID10; /* 0x24 */ 1245265236Sken U32 Reserved4; /* 0x28 */ 1246265236Sken U32 Reserved5; /* 0x2C */ 1247265236Sken U16 DefaultMetadataSize; /* 0x30 */ 1248265236Sken U16 Reserved6; /* 0x32 */ 1249265236Sken U16 MaxBadBlockTableEntries; /* 0x34 */ 1250265236Sken U16 Reserved7; /* 0x36 */ 1251265236Sken U32 IRNvsramVersion; /* 0x38 */ 1252265236Sken} MPI2_CONFIG_PAGE_IOC_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_6, 1253265236Sken Mpi2IOCPage6_t, MPI2_POINTER pMpi2IOCPage6_t; 1254265236Sken 1255265236Sken#define MPI2_IOCPAGE6_PAGEVERSION (0x05) 1256265236Sken 1257265236Sken/* defines for IOC Page 6 CapabilitiesFlags */ 1258265236Sken#define MPI2_IOCPAGE6_CAP_FLAGS_4K_SECTORS_SUPPORT (0x00000020) 1259265236Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID10_SUPPORT (0x00000010) 1260265236Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1_SUPPORT (0x00000008) 1261265236Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1E_SUPPORT (0x00000004) 1262265236Sken#define MPI2_IOCPAGE6_CAP_FLAGS_RAID0_SUPPORT (0x00000002) 1263265236Sken#define MPI2_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001) 1264265236Sken 1265265236Sken 1266265236Sken/* IOC Page 7 */ 1267265236Sken 1268265236Sken#define MPI2_IOCPAGE7_EVENTMASK_WORDS (4) 1269265236Sken 1270265236Skentypedef struct _MPI2_CONFIG_PAGE_IOC_7 1271265236Sken{ 1272265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1273265236Sken U32 Reserved1; /* 0x04 */ 1274265236Sken U32 EventMasks[MPI2_IOCPAGE7_EVENTMASK_WORDS];/* 0x08 */ 1275265236Sken U16 SASBroadcastPrimitiveMasks; /* 0x18 */ 1276265236Sken U16 SASNotifyPrimitiveMasks; /* 0x1A */ 1277265236Sken U32 Reserved3; /* 0x1C */ 1278265236Sken} MPI2_CONFIG_PAGE_IOC_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_7, 1279265236Sken Mpi2IOCPage7_t, MPI2_POINTER pMpi2IOCPage7_t; 1280265236Sken 1281265236Sken#define MPI2_IOCPAGE7_PAGEVERSION (0x02) 1282265236Sken 1283265236Sken 1284265236Sken/* IOC Page 8 */ 1285265236Sken 1286265236Skentypedef struct _MPI2_CONFIG_PAGE_IOC_8 1287265236Sken{ 1288265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1289265236Sken U8 NumDevsPerEnclosure; /* 0x04 */ 1290265236Sken U8 Reserved1; /* 0x05 */ 1291265236Sken U16 Reserved2; /* 0x06 */ 1292265236Sken U16 MaxPersistentEntries; /* 0x08 */ 1293265236Sken U16 MaxNumPhysicalMappedIDs; /* 0x0A */ 1294265236Sken U16 Flags; /* 0x0C */ 1295265236Sken U16 Reserved3; /* 0x0E */ 1296265236Sken U16 IRVolumeMappingFlags; /* 0x10 */ 1297265236Sken U16 Reserved4; /* 0x12 */ 1298265236Sken U32 Reserved5; /* 0x14 */ 1299265236Sken} MPI2_CONFIG_PAGE_IOC_8, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_8, 1300265236Sken Mpi2IOCPage8_t, MPI2_POINTER pMpi2IOCPage8_t; 1301265236Sken 1302265236Sken#define MPI2_IOCPAGE8_PAGEVERSION (0x00) 1303265236Sken 1304265236Sken/* defines for IOC Page 8 Flags field */ 1305265236Sken#define MPI2_IOCPAGE8_FLAGS_DA_START_SLOT_1 (0x00000020) 1306265236Sken#define MPI2_IOCPAGE8_FLAGS_RESERVED_TARGETID_0 (0x00000010) 1307265236Sken 1308265236Sken#define MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE (0x0000000E) 1309265236Sken#define MPI2_IOCPAGE8_FLAGS_DEVICE_PERSISTENCE_MAPPING (0x00000000) 1310265236Sken#define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING (0x00000002) 1311265236Sken 1312265236Sken#define MPI2_IOCPAGE8_FLAGS_DISABLE_PERSISTENT_MAPPING (0x00000001) 1313265236Sken#define MPI2_IOCPAGE8_FLAGS_ENABLE_PERSISTENT_MAPPING (0x00000000) 1314265236Sken 1315265236Sken/* defines for IOC Page 8 IRVolumeMappingFlags */ 1316265236Sken#define MPI2_IOCPAGE8_IRFLAGS_MASK_VOLUME_MAPPING_MODE (0x00000003) 1317265236Sken#define MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING (0x00000000) 1318265236Sken#define MPI2_IOCPAGE8_IRFLAGS_HIGH_VOLUME_MAPPING (0x00000001) 1319265236Sken 1320265236Sken 1321265236Sken/**************************************************************************** 1322265236Sken* BIOS Config Pages 1323265236Sken****************************************************************************/ 1324265236Sken 1325265236Sken/* BIOS Page 1 */ 1326265236Sken 1327265236Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_1 1328265236Sken{ 1329265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1330265236Sken U32 BiosOptions; /* 0x04 */ 1331265236Sken U32 IOCSettings; /* 0x08 */ 1332265236Sken U32 Reserved1; /* 0x0C */ 1333265236Sken U32 DeviceSettings; /* 0x10 */ 1334265236Sken U16 NumberOfDevices; /* 0x14 */ 1335265236Sken U16 UEFIVersion; /* 0x16 */ 1336265236Sken U16 IOTimeoutBlockDevicesNonRM; /* 0x18 */ 1337265236Sken U16 IOTimeoutSequential; /* 0x1A */ 1338265236Sken U16 IOTimeoutOther; /* 0x1C */ 1339265236Sken U16 IOTimeoutBlockDevicesRM; /* 0x1E */ 1340265236Sken} MPI2_CONFIG_PAGE_BIOS_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_1, 1341265236Sken Mpi2BiosPage1_t, MPI2_POINTER pMpi2BiosPage1_t; 1342265236Sken 1343265236Sken#define MPI2_BIOSPAGE1_PAGEVERSION (0x05) 1344265236Sken 1345265236Sken/* values for BIOS Page 1 BiosOptions field */ 1346265236Sken#define MPI2_BIOSPAGE1_OPTIONS_MASK_OEM_ID (0x000000F0) 1347265236Sken#define MPI2_BIOSPAGE1_OPTIONS_LSI_OEM_ID (0x00000000) 1348265236Sken 1349265236Sken#define MPI2_BIOSPAGE1_OPTIONS_MASK_UEFI_HII_REGISTRATION (0x00000006) 1350265236Sken#define MPI2_BIOSPAGE1_OPTIONS_ENABLE_UEFI_HII (0x00000000) 1351265236Sken#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_UEFI_HII (0x00000002) 1352265236Sken#define MPI2_BIOSPAGE1_OPTIONS_VERSION_CHECK_UEFI_HII (0x00000004) 1353265236Sken 1354265236Sken#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001) 1355265236Sken 1356265236Sken/* values for BIOS Page 1 IOCSettings field */ 1357265236Sken#define MPI2_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000) 1358265236Sken#define MPI2_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000) 1359265236Sken#define MPI2_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000) 1360265236Sken 1361265236Sken#define MPI2_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0) 1362265236Sken#define MPI2_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000) 1363265236Sken#define MPI2_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040) 1364265236Sken#define MPI2_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080) 1365265236Sken 1366265236Sken#define MPI2_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030) 1367265236Sken#define MPI2_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000) 1368265236Sken#define MPI2_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010) 1369265236Sken#define MPI2_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020) 1370265236Sken#define MPI2_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030) 1371265236Sken 1372265236Sken#define MPI2_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008) 1373265236Sken 1374265236Sken/* values for BIOS Page 1 DeviceSettings field */ 1375265236Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SMART_POLLING (0x00000010) 1376265236Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008) 1377265236Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004) 1378265236Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002) 1379265236Sken#define MPI2_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001) 1380265236Sken 1381265236Sken/* defines for BIOS Page 1 UEFIVersion field */ 1382265236Sken#define MPI2_BIOSPAGE1_UEFI_VER_MAJOR_MASK (0xFF00) 1383265236Sken#define MPI2_BIOSPAGE1_UEFI_VER_MAJOR_SHIFT (8) 1384265236Sken#define MPI2_BIOSPAGE1_UEFI_VER_MINOR_MASK (0x00FF) 1385265236Sken#define MPI2_BIOSPAGE1_UEFI_VER_MINOR_SHIFT (0) 1386265236Sken 1387265236Sken 1388265236Sken 1389265236Sken/* BIOS Page 2 */ 1390265236Sken 1391265236Skentypedef struct _MPI2_BOOT_DEVICE_ADAPTER_ORDER 1392265236Sken{ 1393265236Sken U32 Reserved1; /* 0x00 */ 1394265236Sken U32 Reserved2; /* 0x04 */ 1395265236Sken U32 Reserved3; /* 0x08 */ 1396265236Sken U32 Reserved4; /* 0x0C */ 1397265236Sken U32 Reserved5; /* 0x10 */ 1398265236Sken U32 Reserved6; /* 0x14 */ 1399265236Sken} MPI2_BOOT_DEVICE_ADAPTER_ORDER, 1400265236Sken MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ADAPTER_ORDER, 1401265236Sken Mpi2BootDeviceAdapterOrder_t, MPI2_POINTER pMpi2BootDeviceAdapterOrder_t; 1402265236Sken 1403265236Skentypedef struct _MPI2_BOOT_DEVICE_SAS_WWID 1404265236Sken{ 1405265236Sken U64 SASAddress; /* 0x00 */ 1406265236Sken U8 LUN[8]; /* 0x08 */ 1407265236Sken U32 Reserved1; /* 0x10 */ 1408265236Sken U32 Reserved2; /* 0x14 */ 1409265236Sken} MPI2_BOOT_DEVICE_SAS_WWID, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_SAS_WWID, 1410265236Sken Mpi2BootDeviceSasWwid_t, MPI2_POINTER pMpi2BootDeviceSasWwid_t; 1411265236Sken 1412265236Skentypedef struct _MPI2_BOOT_DEVICE_ENCLOSURE_SLOT 1413265236Sken{ 1414265236Sken U64 EnclosureLogicalID; /* 0x00 */ 1415265236Sken U32 Reserved1; /* 0x08 */ 1416265236Sken U32 Reserved2; /* 0x0C */ 1417265236Sken U16 SlotNumber; /* 0x10 */ 1418265236Sken U16 Reserved3; /* 0x12 */ 1419265236Sken U32 Reserved4; /* 0x14 */ 1420265236Sken} MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, 1421265236Sken MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, 1422265236Sken Mpi2BootDeviceEnclosureSlot_t, MPI2_POINTER pMpi2BootDeviceEnclosureSlot_t; 1423265236Sken 1424265236Skentypedef struct _MPI2_BOOT_DEVICE_DEVICE_NAME 1425265236Sken{ 1426265236Sken U64 DeviceName; /* 0x00 */ 1427265236Sken U8 LUN[8]; /* 0x08 */ 1428265236Sken U32 Reserved1; /* 0x10 */ 1429265236Sken U32 Reserved2; /* 0x14 */ 1430265236Sken} MPI2_BOOT_DEVICE_DEVICE_NAME, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_DEVICE_NAME, 1431265236Sken Mpi2BootDeviceDeviceName_t, MPI2_POINTER pMpi2BootDeviceDeviceName_t; 1432265236Sken 1433265236Skentypedef union _MPI2_MPI2_BIOSPAGE2_BOOT_DEVICE 1434265236Sken{ 1435265236Sken MPI2_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder; 1436265236Sken MPI2_BOOT_DEVICE_SAS_WWID SasWwid; 1437265236Sken MPI2_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot; 1438265236Sken MPI2_BOOT_DEVICE_DEVICE_NAME DeviceName; 1439265236Sken} MPI2_BIOSPAGE2_BOOT_DEVICE, MPI2_POINTER PTR_MPI2_BIOSPAGE2_BOOT_DEVICE, 1440265236Sken Mpi2BiosPage2BootDevice_t, MPI2_POINTER pMpi2BiosPage2BootDevice_t; 1441265236Sken 1442265236Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_2 1443265236Sken{ 1444265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1445265236Sken U32 Reserved1; /* 0x04 */ 1446265236Sken U32 Reserved2; /* 0x08 */ 1447265236Sken U32 Reserved3; /* 0x0C */ 1448265236Sken U32 Reserved4; /* 0x10 */ 1449265236Sken U32 Reserved5; /* 0x14 */ 1450265236Sken U32 Reserved6; /* 0x18 */ 1451265236Sken U8 ReqBootDeviceForm; /* 0x1C */ 1452265236Sken U8 Reserved7; /* 0x1D */ 1453265236Sken U16 Reserved8; /* 0x1E */ 1454265236Sken MPI2_BIOSPAGE2_BOOT_DEVICE RequestedBootDevice; /* 0x20 */ 1455265236Sken U8 ReqAltBootDeviceForm; /* 0x38 */ 1456265236Sken U8 Reserved9; /* 0x39 */ 1457265236Sken U16 Reserved10; /* 0x3A */ 1458265236Sken MPI2_BIOSPAGE2_BOOT_DEVICE RequestedAltBootDevice; /* 0x3C */ 1459265236Sken U8 CurrentBootDeviceForm; /* 0x58 */ 1460265236Sken U8 Reserved11; /* 0x59 */ 1461265236Sken U16 Reserved12; /* 0x5A */ 1462265236Sken MPI2_BIOSPAGE2_BOOT_DEVICE CurrentBootDevice; /* 0x58 */ 1463265236Sken} MPI2_CONFIG_PAGE_BIOS_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_2, 1464265236Sken Mpi2BiosPage2_t, MPI2_POINTER pMpi2BiosPage2_t; 1465265236Sken 1466265236Sken#define MPI2_BIOSPAGE2_PAGEVERSION (0x04) 1467265236Sken 1468265236Sken/* values for BIOS Page 2 BootDeviceForm fields */ 1469265236Sken#define MPI2_BIOSPAGE2_FORM_MASK (0x0F) 1470265236Sken#define MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED (0x00) 1471265236Sken#define MPI2_BIOSPAGE2_FORM_SAS_WWID (0x05) 1472265236Sken#define MPI2_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06) 1473265236Sken#define MPI2_BIOSPAGE2_FORM_DEVICE_NAME (0x07) 1474265236Sken 1475265236Sken 1476265236Sken/* BIOS Page 3 */ 1477265236Sken 1478265236Skentypedef struct _MPI2_ADAPTER_INFO 1479265236Sken{ 1480265236Sken U8 PciBusNumber; /* 0x00 */ 1481265236Sken U8 PciDeviceAndFunctionNumber; /* 0x01 */ 1482265236Sken U16 AdapterFlags; /* 0x02 */ 1483265236Sken} MPI2_ADAPTER_INFO, MPI2_POINTER PTR_MPI2_ADAPTER_INFO, 1484265236Sken Mpi2AdapterInfo_t, MPI2_POINTER pMpi2AdapterInfo_t; 1485265236Sken 1486265236Sken#define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001) 1487265236Sken#define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002) 1488265236Sken 1489265236Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_3 1490265236Sken{ 1491265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1492265236Sken U32 GlobalFlags; /* 0x04 */ 1493265236Sken U32 BiosVersion; /* 0x08 */ 1494265236Sken MPI2_ADAPTER_INFO AdapterOrder[4]; /* 0x0C */ 1495265236Sken U32 Reserved1; /* 0x1C */ 1496265236Sken} MPI2_CONFIG_PAGE_BIOS_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_3, 1497265236Sken Mpi2BiosPage3_t, MPI2_POINTER pMpi2BiosPage3_t; 1498265236Sken 1499265236Sken#define MPI2_BIOSPAGE3_PAGEVERSION (0x00) 1500265236Sken 1501265236Sken/* values for BIOS Page 3 GlobalFlags */ 1502265236Sken#define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR (0x00000002) 1503265236Sken#define MPI2_BIOSPAGE3_FLAGS_VERBOSE_ENABLE (0x00000004) 1504265236Sken#define MPI2_BIOSPAGE3_FLAGS_HOOK_INT_40_DISABLE (0x00000010) 1505265236Sken 1506265236Sken#define MPI2_BIOSPAGE3_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0) 1507265236Sken#define MPI2_BIOSPAGE3_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000) 1508265236Sken#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DISPLAY (0x00000020) 1509265236Sken#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040) 1510265236Sken 1511265236Sken 1512265236Sken/* BIOS Page 4 */ 1513265236Sken 1514265236Sken/* 1515265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1516265236Sken * one and check the value returned for NumPhys at runtime. 1517265236Sken */ 1518265236Sken#ifndef MPI2_BIOS_PAGE_4_PHY_ENTRIES 1519265236Sken#define MPI2_BIOS_PAGE_4_PHY_ENTRIES (1) 1520265236Sken#endif 1521265236Sken 1522265236Skentypedef struct _MPI2_BIOS4_ENTRY 1523265236Sken{ 1524265236Sken U64 ReassignmentWWID; /* 0x00 */ 1525265236Sken U64 ReassignmentDeviceName; /* 0x08 */ 1526265236Sken} MPI2_BIOS4_ENTRY, MPI2_POINTER PTR_MPI2_BIOS4_ENTRY, 1527265236Sken Mpi2MBios4Entry_t, MPI2_POINTER pMpi2Bios4Entry_t; 1528265236Sken 1529265236Skentypedef struct _MPI2_CONFIG_PAGE_BIOS_4 1530265236Sken{ 1531265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1532265236Sken U8 NumPhys; /* 0x04 */ 1533265236Sken U8 Reserved1; /* 0x05 */ 1534265236Sken U16 Reserved2; /* 0x06 */ 1535265236Sken MPI2_BIOS4_ENTRY Phy[MPI2_BIOS_PAGE_4_PHY_ENTRIES]; /* 0x08 */ 1536265236Sken} MPI2_CONFIG_PAGE_BIOS_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_4, 1537265236Sken Mpi2BiosPage4_t, MPI2_POINTER pMpi2BiosPage4_t; 1538265236Sken 1539265236Sken#define MPI2_BIOSPAGE4_PAGEVERSION (0x01) 1540265236Sken 1541265236Sken 1542265236Sken/**************************************************************************** 1543265236Sken* RAID Volume Config Pages 1544265236Sken****************************************************************************/ 1545265236Sken 1546265236Sken/* RAID Volume Page 0 */ 1547265236Sken 1548265236Skentypedef struct _MPI2_RAIDVOL0_PHYS_DISK 1549265236Sken{ 1550265236Sken U8 RAIDSetNum; /* 0x00 */ 1551265236Sken U8 PhysDiskMap; /* 0x01 */ 1552265236Sken U8 PhysDiskNum; /* 0x02 */ 1553265236Sken U8 Reserved; /* 0x03 */ 1554265236Sken} MPI2_RAIDVOL0_PHYS_DISK, MPI2_POINTER PTR_MPI2_RAIDVOL0_PHYS_DISK, 1555265236Sken Mpi2RaidVol0PhysDisk_t, MPI2_POINTER pMpi2RaidVol0PhysDisk_t; 1556265236Sken 1557265236Sken/* defines for the PhysDiskMap field */ 1558265236Sken#define MPI2_RAIDVOL0_PHYSDISK_PRIMARY (0x01) 1559265236Sken#define MPI2_RAIDVOL0_PHYSDISK_SECONDARY (0x02) 1560265236Sken 1561265236Skentypedef struct _MPI2_RAIDVOL0_SETTINGS 1562265236Sken{ 1563265236Sken U16 Settings; /* 0x00 */ 1564265236Sken U8 HotSparePool; /* 0x01 */ 1565265236Sken U8 Reserved; /* 0x02 */ 1566265236Sken} MPI2_RAIDVOL0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDVOL0_SETTINGS, 1567265236Sken Mpi2RaidVol0Settings_t, MPI2_POINTER pMpi2RaidVol0Settings_t; 1568265236Sken 1569265236Sken/* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */ 1570265236Sken#define MPI2_RAID_HOT_SPARE_POOL_0 (0x01) 1571265236Sken#define MPI2_RAID_HOT_SPARE_POOL_1 (0x02) 1572265236Sken#define MPI2_RAID_HOT_SPARE_POOL_2 (0x04) 1573265236Sken#define MPI2_RAID_HOT_SPARE_POOL_3 (0x08) 1574265236Sken#define MPI2_RAID_HOT_SPARE_POOL_4 (0x10) 1575265236Sken#define MPI2_RAID_HOT_SPARE_POOL_5 (0x20) 1576265236Sken#define MPI2_RAID_HOT_SPARE_POOL_6 (0x40) 1577265236Sken#define MPI2_RAID_HOT_SPARE_POOL_7 (0x80) 1578265236Sken 1579265236Sken/* RAID Volume Page 0 VolumeSettings defines */ 1580265236Sken#define MPI2_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0008) 1581265236Sken#define MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE (0x0004) 1582265236Sken 1583265236Sken#define MPI2_RAIDVOL0_SETTING_MASK_WRITE_CACHING (0x0003) 1584265236Sken#define MPI2_RAIDVOL0_SETTING_UNCHANGED (0x0000) 1585265236Sken#define MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING (0x0001) 1586265236Sken#define MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING (0x0002) 1587265236Sken 1588265236Sken/* 1589265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1590265236Sken * one and check the value returned for NumPhysDisks at runtime. 1591265236Sken */ 1592265236Sken#ifndef MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX 1593265236Sken#define MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX (1) 1594265236Sken#endif 1595265236Sken 1596265236Skentypedef struct _MPI2_CONFIG_PAGE_RAID_VOL_0 1597265236Sken{ 1598265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1599265236Sken U16 DevHandle; /* 0x04 */ 1600265236Sken U8 VolumeState; /* 0x06 */ 1601265236Sken U8 VolumeType; /* 0x07 */ 1602265236Sken U32 VolumeStatusFlags; /* 0x08 */ 1603265236Sken MPI2_RAIDVOL0_SETTINGS VolumeSettings; /* 0x0C */ 1604265236Sken U64 MaxLBA; /* 0x10 */ 1605265236Sken U32 StripeSize; /* 0x18 */ 1606265236Sken U16 BlockSize; /* 0x1C */ 1607265236Sken U16 Reserved1; /* 0x1E */ 1608265236Sken U8 SupportedPhysDisks; /* 0x20 */ 1609265236Sken U8 ResyncRate; /* 0x21 */ 1610265236Sken U16 DataScrubDuration; /* 0x22 */ 1611265236Sken U8 NumPhysDisks; /* 0x24 */ 1612265236Sken U8 Reserved2; /* 0x25 */ 1613265236Sken U8 Reserved3; /* 0x26 */ 1614265236Sken U8 InactiveStatus; /* 0x27 */ 1615265236Sken MPI2_RAIDVOL0_PHYS_DISK PhysDisk[MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX]; /* 0x28 */ 1616265236Sken} MPI2_CONFIG_PAGE_RAID_VOL_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_0, 1617265236Sken Mpi2RaidVolPage0_t, MPI2_POINTER pMpi2RaidVolPage0_t; 1618265236Sken 1619265236Sken#define MPI2_RAIDVOLPAGE0_PAGEVERSION (0x0A) 1620265236Sken 1621265236Sken/* values for RAID VolumeState */ 1622265236Sken#define MPI2_RAID_VOL_STATE_MISSING (0x00) 1623265236Sken#define MPI2_RAID_VOL_STATE_FAILED (0x01) 1624265236Sken#define MPI2_RAID_VOL_STATE_INITIALIZING (0x02) 1625265236Sken#define MPI2_RAID_VOL_STATE_ONLINE (0x03) 1626265236Sken#define MPI2_RAID_VOL_STATE_DEGRADED (0x04) 1627265236Sken#define MPI2_RAID_VOL_STATE_OPTIMAL (0x05) 1628265236Sken 1629265236Sken/* values for RAID VolumeType */ 1630265236Sken#define MPI2_RAID_VOL_TYPE_RAID0 (0x00) 1631265236Sken#define MPI2_RAID_VOL_TYPE_RAID1E (0x01) 1632265236Sken#define MPI2_RAID_VOL_TYPE_RAID1 (0x02) 1633265236Sken#define MPI2_RAID_VOL_TYPE_RAID10 (0x05) 1634265236Sken#define MPI2_RAID_VOL_TYPE_UNKNOWN (0xFF) 1635265236Sken 1636265236Sken/* values for RAID Volume Page 0 VolumeStatusFlags field */ 1637265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_PENDING_RESYNC (0x02000000) 1638265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BACKG_INIT_PENDING (0x01000000) 1639265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_MDC_PENDING (0x00800000) 1640265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_USER_CONSIST_PENDING (0x00400000) 1641265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_MAKE_DATA_CONSISTENT (0x00200000) 1642265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB (0x00100000) 1643265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK (0x00080000) 1644265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION (0x00040000) 1645265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT (0x00020000) 1646265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x00010000) 1647265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT (0x00000080) 1648265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_OCE_ALLOWED (0x00000040) 1649265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BGI_COMPLETE (0x00000020) 1650265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_1E_OFFSET_MIRROR (0x00000000) 1651265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_1E_ADJACENT_MIRROR (0x00000010) 1652265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x00000008) 1653265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x00000004) 1654265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED (0x00000002) 1655265236Sken#define MPI2_RAIDVOL0_STATUS_FLAG_ENABLED (0x00000001) 1656265236Sken 1657265236Sken/* values for RAID Volume Page 0 SupportedPhysDisks field */ 1658265236Sken#define MPI2_RAIDVOL0_SUPPORT_SOLID_STATE_DISKS (0x08) 1659265236Sken#define MPI2_RAIDVOL0_SUPPORT_HARD_DISKS (0x04) 1660265236Sken#define MPI2_RAIDVOL0_SUPPORT_SAS_PROTOCOL (0x02) 1661265236Sken#define MPI2_RAIDVOL0_SUPPORT_SATA_PROTOCOL (0x01) 1662265236Sken 1663265236Sken/* values for RAID Volume Page 0 InactiveStatus field */ 1664265236Sken#define MPI2_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00) 1665265236Sken#define MPI2_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01) 1666265236Sken#define MPI2_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02) 1667265236Sken#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03) 1668265236Sken#define MPI2_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04) 1669265236Sken#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05) 1670265236Sken#define MPI2_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06) 1671265236Sken 1672265236Sken 1673265236Sken/* RAID Volume Page 1 */ 1674265236Sken 1675265236Skentypedef struct _MPI2_CONFIG_PAGE_RAID_VOL_1 1676265236Sken{ 1677265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1678265236Sken U16 DevHandle; /* 0x04 */ 1679265236Sken U16 Reserved0; /* 0x06 */ 1680265236Sken U8 GUID[24]; /* 0x08 */ 1681265236Sken U8 Name[16]; /* 0x20 */ 1682265236Sken U64 WWID; /* 0x30 */ 1683265236Sken U32 Reserved1; /* 0x38 */ 1684265236Sken U32 Reserved2; /* 0x3C */ 1685265236Sken} MPI2_CONFIG_PAGE_RAID_VOL_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_1, 1686265236Sken Mpi2RaidVolPage1_t, MPI2_POINTER pMpi2RaidVolPage1_t; 1687265236Sken 1688265236Sken#define MPI2_RAIDVOLPAGE1_PAGEVERSION (0x03) 1689265236Sken 1690265236Sken 1691265236Sken/**************************************************************************** 1692265236Sken* RAID Physical Disk Config Pages 1693265236Sken****************************************************************************/ 1694265236Sken 1695265236Sken/* RAID Physical Disk Page 0 */ 1696265236Sken 1697265236Skentypedef struct _MPI2_RAIDPHYSDISK0_SETTINGS 1698265236Sken{ 1699265236Sken U16 Reserved1; /* 0x00 */ 1700265236Sken U8 HotSparePool; /* 0x02 */ 1701265236Sken U8 Reserved2; /* 0x03 */ 1702265236Sken} MPI2_RAIDPHYSDISK0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_SETTINGS, 1703265236Sken Mpi2RaidPhysDisk0Settings_t, MPI2_POINTER pMpi2RaidPhysDisk0Settings_t; 1704265236Sken 1705265236Sken/* use MPI2_RAID_HOT_SPARE_POOL_ defines for the HotSparePool field */ 1706265236Sken 1707265236Skentypedef struct _MPI2_RAIDPHYSDISK0_INQUIRY_DATA 1708265236Sken{ 1709265236Sken U8 VendorID[8]; /* 0x00 */ 1710265236Sken U8 ProductID[16]; /* 0x08 */ 1711265236Sken U8 ProductRevLevel[4]; /* 0x18 */ 1712265236Sken U8 SerialNum[32]; /* 0x1C */ 1713265236Sken} MPI2_RAIDPHYSDISK0_INQUIRY_DATA, 1714265236Sken MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_INQUIRY_DATA, 1715265236Sken Mpi2RaidPhysDisk0InquiryData_t, MPI2_POINTER pMpi2RaidPhysDisk0InquiryData_t; 1716265236Sken 1717265236Skentypedef struct _MPI2_CONFIG_PAGE_RD_PDISK_0 1718265236Sken{ 1719265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1720265236Sken U16 DevHandle; /* 0x04 */ 1721265236Sken U8 Reserved1; /* 0x06 */ 1722265236Sken U8 PhysDiskNum; /* 0x07 */ 1723265236Sken MPI2_RAIDPHYSDISK0_SETTINGS PhysDiskSettings; /* 0x08 */ 1724265236Sken U32 Reserved2; /* 0x0C */ 1725265236Sken MPI2_RAIDPHYSDISK0_INQUIRY_DATA InquiryData; /* 0x10 */ 1726265236Sken U32 Reserved3; /* 0x4C */ 1727265236Sken U8 PhysDiskState; /* 0x50 */ 1728265236Sken U8 OfflineReason; /* 0x51 */ 1729265236Sken U8 IncompatibleReason; /* 0x52 */ 1730265236Sken U8 PhysDiskAttributes; /* 0x53 */ 1731265236Sken U32 PhysDiskStatusFlags; /* 0x54 */ 1732265236Sken U64 DeviceMaxLBA; /* 0x58 */ 1733265236Sken U64 HostMaxLBA; /* 0x60 */ 1734265236Sken U64 CoercedMaxLBA; /* 0x68 */ 1735265236Sken U16 BlockSize; /* 0x70 */ 1736265236Sken U16 Reserved5; /* 0x72 */ 1737265236Sken U32 Reserved6; /* 0x74 */ 1738265236Sken} MPI2_CONFIG_PAGE_RD_PDISK_0, 1739265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_0, 1740265236Sken Mpi2RaidPhysDiskPage0_t, MPI2_POINTER pMpi2RaidPhysDiskPage0_t; 1741265236Sken 1742265236Sken#define MPI2_RAIDPHYSDISKPAGE0_PAGEVERSION (0x05) 1743265236Sken 1744265236Sken/* PhysDiskState defines */ 1745265236Sken#define MPI2_RAID_PD_STATE_NOT_CONFIGURED (0x00) 1746265236Sken#define MPI2_RAID_PD_STATE_NOT_COMPATIBLE (0x01) 1747265236Sken#define MPI2_RAID_PD_STATE_OFFLINE (0x02) 1748265236Sken#define MPI2_RAID_PD_STATE_ONLINE (0x03) 1749265236Sken#define MPI2_RAID_PD_STATE_HOT_SPARE (0x04) 1750265236Sken#define MPI2_RAID_PD_STATE_DEGRADED (0x05) 1751265236Sken#define MPI2_RAID_PD_STATE_REBUILDING (0x06) 1752265236Sken#define MPI2_RAID_PD_STATE_OPTIMAL (0x07) 1753265236Sken 1754265236Sken/* OfflineReason defines */ 1755265236Sken#define MPI2_PHYSDISK0_ONLINE (0x00) 1756265236Sken#define MPI2_PHYSDISK0_OFFLINE_MISSING (0x01) 1757265236Sken#define MPI2_PHYSDISK0_OFFLINE_FAILED (0x03) 1758265236Sken#define MPI2_PHYSDISK0_OFFLINE_INITIALIZING (0x04) 1759265236Sken#define MPI2_PHYSDISK0_OFFLINE_REQUESTED (0x05) 1760265236Sken#define MPI2_PHYSDISK0_OFFLINE_FAILED_REQUESTED (0x06) 1761265236Sken#define MPI2_PHYSDISK0_OFFLINE_OTHER (0xFF) 1762265236Sken 1763265236Sken/* IncompatibleReason defines */ 1764265236Sken#define MPI2_PHYSDISK0_COMPATIBLE (0x00) 1765265236Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_PROTOCOL (0x01) 1766265236Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_BLOCKSIZE (0x02) 1767265236Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_MAX_LBA (0x03) 1768265236Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_SATA_EXTENDED_CMD (0x04) 1769265236Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_REMOVEABLE_MEDIA (0x05) 1770265236Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE (0x06) 1771265236Sken#define MPI2_PHYSDISK0_INCOMPATIBLE_UNKNOWN (0xFF) 1772265236Sken 1773265236Sken/* PhysDiskAttributes defines */ 1774265236Sken#define MPI2_PHYSDISK0_ATTRIB_MEDIA_MASK (0x0C) 1775265236Sken#define MPI2_PHYSDISK0_ATTRIB_SOLID_STATE_DRIVE (0x08) 1776265236Sken#define MPI2_PHYSDISK0_ATTRIB_HARD_DISK_DRIVE (0x04) 1777265236Sken 1778265236Sken#define MPI2_PHYSDISK0_ATTRIB_PROTOCOL_MASK (0x03) 1779265236Sken#define MPI2_PHYSDISK0_ATTRIB_SAS_PROTOCOL (0x02) 1780265236Sken#define MPI2_PHYSDISK0_ATTRIB_SATA_PROTOCOL (0x01) 1781265236Sken 1782265236Sken/* PhysDiskStatusFlags defines */ 1783265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED (0x00000040) 1784265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET (0x00000020) 1785265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED (0x00000010) 1786265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_OPTIMAL_PREVIOUS (0x00000000) 1787265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_OPTIMAL_PREVIOUS (0x00000008) 1788265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x00000004) 1789265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED (0x00000002) 1790265236Sken#define MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x00000001) 1791265236Sken 1792265236Sken 1793265236Sken/* RAID Physical Disk Page 1 */ 1794265236Sken 1795265236Sken/* 1796265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1797265236Sken * one and check the value returned for NumPhysDiskPaths at runtime. 1798265236Sken */ 1799265236Sken#ifndef MPI2_RAID_PHYS_DISK1_PATH_MAX 1800265236Sken#define MPI2_RAID_PHYS_DISK1_PATH_MAX (1) 1801265236Sken#endif 1802265236Sken 1803265236Skentypedef struct _MPI2_RAIDPHYSDISK1_PATH 1804265236Sken{ 1805265236Sken U16 DevHandle; /* 0x00 */ 1806265236Sken U16 Reserved1; /* 0x02 */ 1807265236Sken U64 WWID; /* 0x04 */ 1808265236Sken U64 OwnerWWID; /* 0x0C */ 1809265236Sken U8 OwnerIdentifier; /* 0x14 */ 1810265236Sken U8 Reserved2; /* 0x15 */ 1811265236Sken U16 Flags; /* 0x16 */ 1812265236Sken} MPI2_RAIDPHYSDISK1_PATH, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK1_PATH, 1813265236Sken Mpi2RaidPhysDisk1Path_t, MPI2_POINTER pMpi2RaidPhysDisk1Path_t; 1814265236Sken 1815265236Sken/* RAID Physical Disk Page 1 Physical Disk Path Flags field defines */ 1816265236Sken#define MPI2_RAID_PHYSDISK1_FLAG_PRIMARY (0x0004) 1817265236Sken#define MPI2_RAID_PHYSDISK1_FLAG_BROKEN (0x0002) 1818265236Sken#define MPI2_RAID_PHYSDISK1_FLAG_INVALID (0x0001) 1819265236Sken 1820265236Skentypedef struct _MPI2_CONFIG_PAGE_RD_PDISK_1 1821265236Sken{ 1822265236Sken MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ 1823265236Sken U8 NumPhysDiskPaths; /* 0x04 */ 1824265236Sken U8 PhysDiskNum; /* 0x05 */ 1825265236Sken U16 Reserved1; /* 0x06 */ 1826265236Sken U32 Reserved2; /* 0x08 */ 1827265236Sken MPI2_RAIDPHYSDISK1_PATH PhysicalDiskPath[MPI2_RAID_PHYS_DISK1_PATH_MAX];/* 0x0C */ 1828265236Sken} MPI2_CONFIG_PAGE_RD_PDISK_1, 1829265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_1, 1830265236Sken Mpi2RaidPhysDiskPage1_t, MPI2_POINTER pMpi2RaidPhysDiskPage1_t; 1831265236Sken 1832265236Sken#define MPI2_RAIDPHYSDISKPAGE1_PAGEVERSION (0x02) 1833265236Sken 1834265236Sken 1835265236Sken/**************************************************************************** 1836265236Sken* values for fields used by several types of SAS Config Pages 1837265236Sken****************************************************************************/ 1838265236Sken 1839265236Sken/* values for NegotiatedLinkRates fields */ 1840265236Sken#define MPI2_SAS_NEG_LINK_RATE_MASK_LOGICAL (0xF0) 1841265236Sken#define MPI2_SAS_NEG_LINK_RATE_SHIFT_LOGICAL (4) 1842265236Sken#define MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL (0x0F) 1843265236Sken/* link rates used for Negotiated Physical and Logical Link Rate */ 1844265236Sken#define MPI2_SAS_NEG_LINK_RATE_UNKNOWN_LINK_RATE (0x00) 1845265236Sken#define MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED (0x01) 1846265236Sken#define MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED (0x02) 1847265236Sken#define MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE (0x03) 1848265236Sken#define MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR (0x04) 1849265236Sken#define MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS (0x05) 1850265236Sken#define MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY (0x06) 1851265236Sken#define MPI2_SAS_NEG_LINK_RATE_1_5 (0x08) 1852265236Sken#define MPI2_SAS_NEG_LINK_RATE_3_0 (0x09) 1853265236Sken#define MPI2_SAS_NEG_LINK_RATE_6_0 (0x0A) 1854265236Sken#define MPI25_SAS_NEG_LINK_RATE_12_0 (0x0B) 1855265236Sken 1856265236Sken 1857265236Sken/* values for AttachedPhyInfo fields */ 1858265236Sken#define MPI2_SAS_APHYINFO_INSIDE_ZPSDS_PERSISTENT (0x00000040) 1859265236Sken#define MPI2_SAS_APHYINFO_REQUESTED_INSIDE_ZPSDS (0x00000020) 1860265236Sken#define MPI2_SAS_APHYINFO_BREAK_REPLY_CAPABLE (0x00000010) 1861265236Sken 1862265236Sken#define MPI2_SAS_APHYINFO_REASON_MASK (0x0000000F) 1863265236Sken#define MPI2_SAS_APHYINFO_REASON_UNKNOWN (0x00000000) 1864265236Sken#define MPI2_SAS_APHYINFO_REASON_POWER_ON (0x00000001) 1865265236Sken#define MPI2_SAS_APHYINFO_REASON_HARD_RESET (0x00000002) 1866265236Sken#define MPI2_SAS_APHYINFO_REASON_SMP_PHY_CONTROL (0x00000003) 1867265236Sken#define MPI2_SAS_APHYINFO_REASON_LOSS_OF_SYNC (0x00000004) 1868265236Sken#define MPI2_SAS_APHYINFO_REASON_MULTIPLEXING_SEQ (0x00000005) 1869265236Sken#define MPI2_SAS_APHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00000006) 1870265236Sken#define MPI2_SAS_APHYINFO_REASON_BREAK_TIMEOUT (0x00000007) 1871265236Sken#define MPI2_SAS_APHYINFO_REASON_PHY_TEST_STOPPED (0x00000008) 1872265236Sken 1873265236Sken 1874265236Sken/* values for PhyInfo fields */ 1875265236Sken#define MPI2_SAS_PHYINFO_PHY_VACANT (0x80000000) 1876265236Sken 1877265236Sken#define MPI2_SAS_PHYINFO_PHY_POWER_CONDITION_MASK (0x18000000) 1878265236Sken#define MPI2_SAS_PHYINFO_SHIFT_PHY_POWER_CONDITION (27) 1879265236Sken#define MPI2_SAS_PHYINFO_PHY_POWER_ACTIVE (0x00000000) 1880265236Sken#define MPI2_SAS_PHYINFO_PHY_POWER_PARTIAL (0x08000000) 1881265236Sken#define MPI2_SAS_PHYINFO_PHY_POWER_SLUMBER (0x10000000) 1882265236Sken 1883265236Sken#define MPI2_SAS_PHYINFO_CHANGED_REQ_INSIDE_ZPSDS (0x04000000) 1884265236Sken#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS_PERSISTENT (0x02000000) 1885265236Sken#define MPI2_SAS_PHYINFO_REQ_INSIDE_ZPSDS (0x01000000) 1886265236Sken#define MPI2_SAS_PHYINFO_ZONE_GROUP_PERSISTENT (0x00400000) 1887265236Sken#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS (0x00200000) 1888265236Sken#define MPI2_SAS_PHYINFO_ZONING_ENABLED (0x00100000) 1889265236Sken 1890265236Sken#define MPI2_SAS_PHYINFO_REASON_MASK (0x000F0000) 1891265236Sken#define MPI2_SAS_PHYINFO_REASON_UNKNOWN (0x00000000) 1892265236Sken#define MPI2_SAS_PHYINFO_REASON_POWER_ON (0x00010000) 1893265236Sken#define MPI2_SAS_PHYINFO_REASON_HARD_RESET (0x00020000) 1894265236Sken#define MPI2_SAS_PHYINFO_REASON_SMP_PHY_CONTROL (0x00030000) 1895265236Sken#define MPI2_SAS_PHYINFO_REASON_LOSS_OF_SYNC (0x00040000) 1896265236Sken#define MPI2_SAS_PHYINFO_REASON_MULTIPLEXING_SEQ (0x00050000) 1897265236Sken#define MPI2_SAS_PHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00060000) 1898265236Sken#define MPI2_SAS_PHYINFO_REASON_BREAK_TIMEOUT (0x00070000) 1899265236Sken#define MPI2_SAS_PHYINFO_REASON_PHY_TEST_STOPPED (0x00080000) 1900265236Sken 1901265236Sken#define MPI2_SAS_PHYINFO_MULTIPLEXING_SUPPORTED (0x00008000) 1902265236Sken#define MPI2_SAS_PHYINFO_SATA_PORT_ACTIVE (0x00004000) 1903265236Sken#define MPI2_SAS_PHYINFO_SATA_PORT_SELECTOR_PRESENT (0x00002000) 1904265236Sken#define MPI2_SAS_PHYINFO_VIRTUAL_PHY (0x00001000) 1905265236Sken 1906265236Sken#define MPI2_SAS_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00) 1907265236Sken#define MPI2_SAS_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8) 1908265236Sken 1909265236Sken#define MPI2_SAS_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0) 1910265236Sken#define MPI2_SAS_PHYINFO_DIRECT_ROUTING (0x00000000) 1911265236Sken#define MPI2_SAS_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010) 1912265236Sken#define MPI2_SAS_PHYINFO_TABLE_ROUTING (0x00000020) 1913265236Sken 1914265236Sken 1915265236Sken/* values for SAS ProgrammedLinkRate fields */ 1916265236Sken#define MPI2_SAS_PRATE_MAX_RATE_MASK (0xF0) 1917265236Sken#define MPI2_SAS_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00) 1918265236Sken#define MPI2_SAS_PRATE_MAX_RATE_1_5 (0x80) 1919265236Sken#define MPI2_SAS_PRATE_MAX_RATE_3_0 (0x90) 1920265236Sken#define MPI2_SAS_PRATE_MAX_RATE_6_0 (0xA0) 1921265236Sken#define MPI25_SAS_PRATE_MAX_RATE_12_0 (0xB0) 1922265236Sken#define MPI2_SAS_PRATE_MIN_RATE_MASK (0x0F) 1923265236Sken#define MPI2_SAS_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00) 1924265236Sken#define MPI2_SAS_PRATE_MIN_RATE_1_5 (0x08) 1925265236Sken#define MPI2_SAS_PRATE_MIN_RATE_3_0 (0x09) 1926265236Sken#define MPI2_SAS_PRATE_MIN_RATE_6_0 (0x0A) 1927265236Sken#define MPI25_SAS_PRATE_MIN_RATE_12_0 (0x0B) 1928265236Sken 1929265236Sken 1930265236Sken/* values for SAS HwLinkRate fields */ 1931265236Sken#define MPI2_SAS_HWRATE_MAX_RATE_MASK (0xF0) 1932265236Sken#define MPI2_SAS_HWRATE_MAX_RATE_1_5 (0x80) 1933265236Sken#define MPI2_SAS_HWRATE_MAX_RATE_3_0 (0x90) 1934265236Sken#define MPI2_SAS_HWRATE_MAX_RATE_6_0 (0xA0) 1935265236Sken#define MPI25_SAS_HWRATE_MAX_RATE_12_0 (0xB0) 1936265236Sken#define MPI2_SAS_HWRATE_MIN_RATE_MASK (0x0F) 1937265236Sken#define MPI2_SAS_HWRATE_MIN_RATE_1_5 (0x08) 1938265236Sken#define MPI2_SAS_HWRATE_MIN_RATE_3_0 (0x09) 1939265236Sken#define MPI2_SAS_HWRATE_MIN_RATE_6_0 (0x0A) 1940265236Sken#define MPI25_SAS_HWRATE_MIN_RATE_12_0 (0x0B) 1941265236Sken 1942265236Sken 1943265236Sken 1944265236Sken/**************************************************************************** 1945265236Sken* SAS IO Unit Config Pages 1946265236Sken****************************************************************************/ 1947265236Sken 1948265236Sken/* SAS IO Unit Page 0 */ 1949265236Sken 1950265236Skentypedef struct _MPI2_SAS_IO_UNIT0_PHY_DATA 1951265236Sken{ 1952265236Sken U8 Port; /* 0x00 */ 1953265236Sken U8 PortFlags; /* 0x01 */ 1954265236Sken U8 PhyFlags; /* 0x02 */ 1955265236Sken U8 NegotiatedLinkRate; /* 0x03 */ 1956265236Sken U32 ControllerPhyDeviceInfo;/* 0x04 */ 1957265236Sken U16 AttachedDevHandle; /* 0x08 */ 1958265236Sken U16 ControllerDevHandle; /* 0x0A */ 1959265236Sken U32 DiscoveryStatus; /* 0x0C */ 1960265236Sken U32 Reserved; /* 0x10 */ 1961265236Sken} MPI2_SAS_IO_UNIT0_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT0_PHY_DATA, 1962265236Sken Mpi2SasIOUnit0PhyData_t, MPI2_POINTER pMpi2SasIOUnit0PhyData_t; 1963265236Sken 1964265236Sken/* 1965265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 1966265236Sken * one and check the value returned for NumPhys at runtime. 1967265236Sken */ 1968265236Sken#ifndef MPI2_SAS_IOUNIT0_PHY_MAX 1969265236Sken#define MPI2_SAS_IOUNIT0_PHY_MAX (1) 1970265236Sken#endif 1971265236Sken 1972265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0 1973265236Sken{ 1974265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 1975265236Sken U32 Reserved1; /* 0x08 */ 1976265236Sken U8 NumPhys; /* 0x0C */ 1977265236Sken U8 Reserved2; /* 0x0D */ 1978265236Sken U16 Reserved3; /* 0x0E */ 1979265236Sken MPI2_SAS_IO_UNIT0_PHY_DATA PhyData[MPI2_SAS_IOUNIT0_PHY_MAX]; /* 0x10 */ 1980265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT_0, 1981265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_0, 1982265236Sken Mpi2SasIOUnitPage0_t, MPI2_POINTER pMpi2SasIOUnitPage0_t; 1983265236Sken 1984265236Sken#define MPI2_SASIOUNITPAGE0_PAGEVERSION (0x05) 1985265236Sken 1986265236Sken/* values for SAS IO Unit Page 0 PortFlags */ 1987265236Sken#define MPI2_SASIOUNIT0_PORTFLAGS_DISCOVERY_IN_PROGRESS (0x08) 1988265236Sken#define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG (0x01) 1989265236Sken 1990265236Sken/* values for SAS IO Unit Page 0 PhyFlags */ 1991265236Sken#define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED (0x10) 1992265236Sken#define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED (0x08) 1993265236Sken 1994265236Sken/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ 1995265236Sken 1996265236Sken/* see mpi2_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */ 1997265236Sken 1998265236Sken/* values for SAS IO Unit Page 0 DiscoveryStatus */ 1999265236Sken#define MPI2_SASIOUNIT0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) 2000265236Sken#define MPI2_SASIOUNIT0_DS_MAX_EXPANDERS_EXCEED (0x40000000) 2001265236Sken#define MPI2_SASIOUNIT0_DS_MAX_DEVICES_EXCEED (0x20000000) 2002265236Sken#define MPI2_SASIOUNIT0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) 2003265236Sken#define MPI2_SASIOUNIT0_DS_DOWNSTREAM_INITIATOR (0x08000000) 2004265236Sken#define MPI2_SASIOUNIT0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) 2005265236Sken#define MPI2_SASIOUNIT0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) 2006265236Sken#define MPI2_SASIOUNIT0_DS_MULTI_PORT_DOMAIN (0x00002000) 2007265236Sken#define MPI2_SASIOUNIT0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) 2008265236Sken#define MPI2_SASIOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800) 2009265236Sken#define MPI2_SASIOUNIT0_DS_TABLE_LINK (0x00000400) 2010265236Sken#define MPI2_SASIOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200) 2011265236Sken#define MPI2_SASIOUNIT0_DS_SMP_CRC_ERROR (0x00000100) 2012265236Sken#define MPI2_SASIOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080) 2013265236Sken#define MPI2_SASIOUNIT0_DS_INDEX_NOT_EXIST (0x00000040) 2014265236Sken#define MPI2_SASIOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020) 2015265236Sken#define MPI2_SASIOUNIT0_DS_SMP_TIMEOUT (0x00000010) 2016265236Sken#define MPI2_SASIOUNIT0_DS_MULTIPLE_PORTS (0x00000004) 2017265236Sken#define MPI2_SASIOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002) 2018265236Sken#define MPI2_SASIOUNIT0_DS_LOOP_DETECTED (0x00000001) 2019265236Sken 2020265236Sken 2021265236Sken/* SAS IO Unit Page 1 */ 2022265236Sken 2023265236Skentypedef struct _MPI2_SAS_IO_UNIT1_PHY_DATA 2024265236Sken{ 2025265236Sken U8 Port; /* 0x00 */ 2026265236Sken U8 PortFlags; /* 0x01 */ 2027265236Sken U8 PhyFlags; /* 0x02 */ 2028265236Sken U8 MaxMinLinkRate; /* 0x03 */ 2029265236Sken U32 ControllerPhyDeviceInfo; /* 0x04 */ 2030265236Sken U16 MaxTargetPortConnectTime; /* 0x08 */ 2031265236Sken U16 Reserved1; /* 0x0A */ 2032265236Sken} MPI2_SAS_IO_UNIT1_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT1_PHY_DATA, 2033265236Sken Mpi2SasIOUnit1PhyData_t, MPI2_POINTER pMpi2SasIOUnit1PhyData_t; 2034265236Sken 2035265236Sken/* 2036265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2037265236Sken * one and check the value returned for NumPhys at runtime. 2038265236Sken */ 2039265236Sken#ifndef MPI2_SAS_IOUNIT1_PHY_MAX 2040265236Sken#define MPI2_SAS_IOUNIT1_PHY_MAX (1) 2041265236Sken#endif 2042265236Sken 2043265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 2044265236Sken{ 2045265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2046265236Sken U16 ControlFlags; /* 0x08 */ 2047265236Sken U16 SASNarrowMaxQueueDepth; /* 0x0A */ 2048265236Sken U16 AdditionalControlFlags; /* 0x0C */ 2049265236Sken U16 SASWideMaxQueueDepth; /* 0x0E */ 2050265236Sken U8 NumPhys; /* 0x10 */ 2051265236Sken U8 SATAMaxQDepth; /* 0x11 */ 2052265236Sken U8 ReportDeviceMissingDelay; /* 0x12 */ 2053265236Sken U8 IODeviceMissingDelay; /* 0x13 */ 2054265236Sken MPI2_SAS_IO_UNIT1_PHY_DATA PhyData[MPI2_SAS_IOUNIT1_PHY_MAX]; /* 0x14 */ 2055265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT_1, 2056265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_1, 2057265236Sken Mpi2SasIOUnitPage1_t, MPI2_POINTER pMpi2SasIOUnitPage1_t; 2058265236Sken 2059265236Sken#define MPI2_SASIOUNITPAGE1_PAGEVERSION (0x09) 2060265236Sken 2061265236Sken/* values for SAS IO Unit Page 1 ControlFlags */ 2062265236Sken#define MPI2_SASIOUNIT1_CONTROL_DEVICE_SELF_TEST (0x8000) 2063265236Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_3_0_MAX (0x4000) 2064265236Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_1_5_MAX (0x2000) /* MPI v2.0 only. Obsolete in MPI v2.5 and later. */ 2065265236Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000) 2066265236Sken 2067265236Sken#define MPI2_SASIOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600) 2068265236Sken#define MPI2_SASIOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9) 2069265236Sken#define MPI2_SASIOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x0) 2070265236Sken#define MPI2_SASIOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x1) 2071265236Sken#define MPI2_SASIOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x2) 2072265236Sken 2073265236Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080) 2074265236Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040) 2075265236Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020) 2076265236Sken#define MPI2_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010) 2077265236Sken#define MPI2_SASIOUNIT1_CONTROL_TABLE_SUBTRACTIVE_ILLEGAL (0x0008) 2078265236Sken#define MPI2_SASIOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004) 2079265236Sken#define MPI2_SASIOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002) 2080265236Sken#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001) /* MPI v2.0 only. Obsolete in MPI v2.5 and later. */ 2081265236Sken 2082265236Sken/* values for SAS IO Unit Page 1 AdditionalControlFlags */ 2083265236Sken#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080) 2084265236Sken#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040) 2085265236Sken#define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION (0x0020) 2086265236Sken#define MPI2_SASIOUNIT1_ACONTROL_PORT_ENABLE_ONLY_SATA_LINK_RESET (0x0010) 2087265236Sken#define MPI2_SASIOUNIT1_ACONTROL_OTHER_AFFILIATION_SATA_LINK_RESET (0x0008) 2088265236Sken#define MPI2_SASIOUNIT1_ACONTROL_SELF_AFFILIATION_SATA_LINK_RESET (0x0004) 2089265236Sken#define MPI2_SASIOUNIT1_ACONTROL_NO_AFFILIATION_SATA_LINK_RESET (0x0002) 2090265236Sken#define MPI2_SASIOUNIT1_ACONTROL_ALLOW_TABLE_TO_TABLE (0x0001) 2091265236Sken 2092265236Sken/* defines for SAS IO Unit Page 1 ReportDeviceMissingDelay */ 2093265236Sken#define MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK (0x7F) 2094265236Sken#define MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16 (0x80) 2095265236Sken 2096265236Sken/* values for SAS IO Unit Page 1 PortFlags */ 2097265236Sken#define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) 2098265236Sken 2099265236Sken/* values for SAS IO Unit Page 1 PhyFlags */ 2100265236Sken#define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE (0x10) 2101265236Sken#define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE (0x08) 2102265236Sken 2103265236Sken/* values for SAS IO Unit Page 1 MaxMinLinkRate */ 2104265236Sken#define MPI2_SASIOUNIT1_MAX_RATE_MASK (0xF0) 2105265236Sken#define MPI2_SASIOUNIT1_MAX_RATE_1_5 (0x80) 2106265236Sken#define MPI2_SASIOUNIT1_MAX_RATE_3_0 (0x90) 2107265236Sken#define MPI2_SASIOUNIT1_MAX_RATE_6_0 (0xA0) 2108265236Sken#define MPI25_SASIOUNIT1_MAX_RATE_12_0 (0xB0) 2109265236Sken#define MPI2_SASIOUNIT1_MIN_RATE_MASK (0x0F) 2110265236Sken#define MPI2_SASIOUNIT1_MIN_RATE_1_5 (0x08) 2111265236Sken#define MPI2_SASIOUNIT1_MIN_RATE_3_0 (0x09) 2112265236Sken#define MPI2_SASIOUNIT1_MIN_RATE_6_0 (0x0A) 2113265236Sken#define MPI25_SASIOUNIT1_MIN_RATE_12_0 (0x0B) 2114265236Sken 2115265236Sken/* see mpi2_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */ 2116265236Sken 2117265236Sken 2118265236Sken/* SAS IO Unit Page 4 */ 2119265236Sken 2120265236Skentypedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP 2121265236Sken{ 2122265236Sken U8 MaxTargetSpinup; /* 0x00 */ 2123265236Sken U8 SpinupDelay; /* 0x01 */ 2124265236Sken U8 SpinupFlags; /* 0x02 */ 2125265236Sken U8 Reserved1; /* 0x03 */ 2126265236Sken} MPI2_SAS_IOUNIT4_SPINUP_GROUP, MPI2_POINTER PTR_MPI2_SAS_IOUNIT4_SPINUP_GROUP, 2127265236Sken Mpi2SasIOUnit4SpinupGroup_t, MPI2_POINTER pMpi2SasIOUnit4SpinupGroup_t; 2128265236Sken 2129265236Sken/* defines for SAS IO Unit Page 4 SpinupFlags */ 2130265236Sken#define MPI2_SASIOUNIT4_SPINUP_DISABLE_FLAG (0x01) 2131265236Sken 2132265236Sken 2133265236Sken/* 2134265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2135265236Sken * one and check the value returned for NumPhys at runtime. 2136265236Sken */ 2137265236Sken#ifndef MPI2_SAS_IOUNIT4_PHY_MAX 2138265236Sken#define MPI2_SAS_IOUNIT4_PHY_MAX (4) 2139265236Sken#endif 2140265236Sken 2141265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_4 2142265236Sken{ 2143265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2144265236Sken MPI2_SAS_IOUNIT4_SPINUP_GROUP SpinupGroupParameters[4]; /* 0x08 */ 2145265236Sken U32 Reserved1; /* 0x18 */ 2146265236Sken U32 Reserved2; /* 0x1C */ 2147265236Sken U32 Reserved3; /* 0x20 */ 2148265236Sken U8 BootDeviceWaitTime; /* 0x24 */ 2149265236Sken U8 Reserved4; /* 0x25 */ 2150265236Sken U16 Reserved5; /* 0x26 */ 2151265236Sken U8 NumPhys; /* 0x28 */ 2152265236Sken U8 PEInitialSpinupDelay; /* 0x29 */ 2153265236Sken U8 PEReplyDelay; /* 0x2A */ 2154265236Sken U8 Flags; /* 0x2B */ 2155265236Sken U8 PHY[MPI2_SAS_IOUNIT4_PHY_MAX]; /* 0x2C */ 2156265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT_4, 2157265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_4, 2158265236Sken Mpi2SasIOUnitPage4_t, MPI2_POINTER pMpi2SasIOUnitPage4_t; 2159265236Sken 2160265236Sken#define MPI2_SASIOUNITPAGE4_PAGEVERSION (0x02) 2161265236Sken 2162265236Sken/* defines for Flags field */ 2163265236Sken#define MPI2_SASIOUNIT4_FLAGS_AUTO_PORTENABLE (0x01) 2164265236Sken 2165265236Sken/* defines for PHY field */ 2166265236Sken#define MPI2_SASIOUNIT4_PHY_SPINUP_GROUP_MASK (0x03) 2167265236Sken 2168265236Sken 2169265236Sken/* SAS IO Unit Page 5 */ 2170265236Sken 2171265236Skentypedef struct _MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS 2172265236Sken{ 2173265236Sken U8 ControlFlags; /* 0x00 */ 2174265236Sken U8 PortWidthModGroup; /* 0x01 */ 2175265236Sken U16 InactivityTimerExponent; /* 0x02 */ 2176265236Sken U8 SATAPartialTimeout; /* 0x04 */ 2177265236Sken U8 Reserved2; /* 0x05 */ 2178265236Sken U8 SATASlumberTimeout; /* 0x06 */ 2179265236Sken U8 Reserved3; /* 0x07 */ 2180265236Sken U8 SASPartialTimeout; /* 0x08 */ 2181265236Sken U8 Reserved4; /* 0x09 */ 2182265236Sken U8 SASSlumberTimeout; /* 0x0A */ 2183265236Sken U8 Reserved5; /* 0x0B */ 2184265236Sken} MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS, 2185265236Sken MPI2_POINTER PTR_MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS, 2186265236Sken Mpi2SasIOUnit5PhyPmSettings_t, MPI2_POINTER pMpi2SasIOUnit5PhyPmSettings_t; 2187265236Sken 2188265236Sken/* defines for ControlFlags field */ 2189265236Sken#define MPI2_SASIOUNIT5_CONTROL_SAS_SLUMBER_ENABLE (0x08) 2190265236Sken#define MPI2_SASIOUNIT5_CONTROL_SAS_PARTIAL_ENABLE (0x04) 2191265236Sken#define MPI2_SASIOUNIT5_CONTROL_SATA_SLUMBER_ENABLE (0x02) 2192265236Sken#define MPI2_SASIOUNIT5_CONTROL_SATA_PARTIAL_ENABLE (0x01) 2193265236Sken 2194265236Sken/* defines for PortWidthModeGroup field */ 2195265236Sken#define MPI2_SASIOUNIT5_PWMG_DISABLE (0xFF) 2196265236Sken 2197265236Sken/* defines for InactivityTimerExponent field */ 2198265236Sken#define MPI2_SASIOUNIT5_ITE_MASK_SAS_SLUMBER (0x7000) 2199265236Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_SLUMBER (12) 2200265236Sken#define MPI2_SASIOUNIT5_ITE_MASK_SAS_PARTIAL (0x0700) 2201265236Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_PARTIAL (8) 2202265236Sken#define MPI2_SASIOUNIT5_ITE_MASK_SATA_SLUMBER (0x0070) 2203265236Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SATA_SLUMBER (4) 2204265236Sken#define MPI2_SASIOUNIT5_ITE_MASK_SATA_PARTIAL (0x0007) 2205265236Sken#define MPI2_SASIOUNIT5_ITE_SHIFT_SATA_PARTIAL (0) 2206265236Sken 2207265236Sken#define MPI2_SASIOUNIT5_ITE_TEN_SECONDS (7) 2208265236Sken#define MPI2_SASIOUNIT5_ITE_ONE_SECOND (6) 2209265236Sken#define MPI2_SASIOUNIT5_ITE_HUNDRED_MILLISECONDS (5) 2210265236Sken#define MPI2_SASIOUNIT5_ITE_TEN_MILLISECONDS (4) 2211265236Sken#define MPI2_SASIOUNIT5_ITE_ONE_MILLISECOND (3) 2212265236Sken#define MPI2_SASIOUNIT5_ITE_HUNDRED_MICROSECONDS (2) 2213265236Sken#define MPI2_SASIOUNIT5_ITE_TEN_MICROSECONDS (1) 2214265236Sken#define MPI2_SASIOUNIT5_ITE_ONE_MICROSECOND (0) 2215265236Sken 2216265236Sken/* 2217265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2218265236Sken * one and check the value returned for NumPhys at runtime. 2219265236Sken */ 2220265236Sken#ifndef MPI2_SAS_IOUNIT5_PHY_MAX 2221265236Sken#define MPI2_SAS_IOUNIT5_PHY_MAX (1) 2222265236Sken#endif 2223265236Sken 2224265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_5 2225265236Sken{ 2226265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2227265236Sken U8 NumPhys; /* 0x08 */ 2228265236Sken U8 Reserved1; /* 0x09 */ 2229265236Sken U16 Reserved2; /* 0x0A */ 2230265236Sken U32 Reserved3; /* 0x0C */ 2231265236Sken MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS SASPhyPowerManagementSettings[MPI2_SAS_IOUNIT5_PHY_MAX]; /* 0x10 */ 2232265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT_5, 2233265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_5, 2234265236Sken Mpi2SasIOUnitPage5_t, MPI2_POINTER pMpi2SasIOUnitPage5_t; 2235265236Sken 2236265236Sken#define MPI2_SASIOUNITPAGE5_PAGEVERSION (0x01) 2237265236Sken 2238265236Sken 2239265236Sken/* SAS IO Unit Page 6 */ 2240265236Sken 2241265236Skentypedef struct _MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS 2242265236Sken{ 2243265236Sken U8 CurrentStatus; /* 0x00 */ 2244265236Sken U8 CurrentModulation; /* 0x01 */ 2245265236Sken U8 CurrentUtilization; /* 0x02 */ 2246265236Sken U8 Reserved1; /* 0x03 */ 2247265236Sken U32 Reserved2; /* 0x04 */ 2248265236Sken} MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS, 2249265236Sken MPI2_POINTER PTR_MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS, 2250265236Sken Mpi2SasIOUnit6PortWidthModGroupStatus_t, 2251265236Sken MPI2_POINTER pMpi2SasIOUnit6PortWidthModGroupStatus_t; 2252265236Sken 2253265236Sken/* defines for CurrentStatus field */ 2254265236Sken#define MPI2_SASIOUNIT6_STATUS_UNAVAILABLE (0x00) 2255265236Sken#define MPI2_SASIOUNIT6_STATUS_UNCONFIGURED (0x01) 2256265236Sken#define MPI2_SASIOUNIT6_STATUS_INVALID_CONFIG (0x02) 2257265236Sken#define MPI2_SASIOUNIT6_STATUS_LINK_DOWN (0x03) 2258265236Sken#define MPI2_SASIOUNIT6_STATUS_OBSERVATION_ONLY (0x04) 2259265236Sken#define MPI2_SASIOUNIT6_STATUS_INACTIVE (0x05) 2260265236Sken#define MPI2_SASIOUNIT6_STATUS_ACTIVE_IOUNIT (0x06) 2261265236Sken#define MPI2_SASIOUNIT6_STATUS_ACTIVE_HOST (0x07) 2262265236Sken 2263265236Sken/* defines for CurrentModulation field */ 2264265236Sken#define MPI2_SASIOUNIT6_MODULATION_25_PERCENT (0x00) 2265265236Sken#define MPI2_SASIOUNIT6_MODULATION_50_PERCENT (0x01) 2266265236Sken#define MPI2_SASIOUNIT6_MODULATION_75_PERCENT (0x02) 2267265236Sken#define MPI2_SASIOUNIT6_MODULATION_100_PERCENT (0x03) 2268265236Sken 2269265236Sken/* 2270265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2271265236Sken * one and check the value returned for NumGroups at runtime. 2272265236Sken */ 2273265236Sken#ifndef MPI2_SAS_IOUNIT6_GROUP_MAX 2274265236Sken#define MPI2_SAS_IOUNIT6_GROUP_MAX (1) 2275265236Sken#endif 2276265236Sken 2277265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_6 2278265236Sken{ 2279265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2280265236Sken U32 Reserved1; /* 0x08 */ 2281265236Sken U32 Reserved2; /* 0x0C */ 2282265236Sken U8 NumGroups; /* 0x10 */ 2283265236Sken U8 Reserved3; /* 0x11 */ 2284265236Sken U16 Reserved4; /* 0x12 */ 2285265236Sken MPI2_SAS_IO_UNIT6_PORT_WIDTH_MOD_GROUP_STATUS 2286265236Sken PortWidthModulationGroupStatus[MPI2_SAS_IOUNIT6_GROUP_MAX]; /* 0x14 */ 2287265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT_6, 2288265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_6, 2289265236Sken Mpi2SasIOUnitPage6_t, MPI2_POINTER pMpi2SasIOUnitPage6_t; 2290265236Sken 2291265236Sken#define MPI2_SASIOUNITPAGE6_PAGEVERSION (0x00) 2292265236Sken 2293265236Sken 2294265236Sken/* SAS IO Unit Page 7 */ 2295265236Sken 2296265236Skentypedef struct _MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS 2297265236Sken{ 2298265236Sken U8 Flags; /* 0x00 */ 2299265236Sken U8 Reserved1; /* 0x01 */ 2300265236Sken U16 Reserved2; /* 0x02 */ 2301265236Sken U8 Threshold75Pct; /* 0x04 */ 2302265236Sken U8 Threshold50Pct; /* 0x05 */ 2303265236Sken U8 Threshold25Pct; /* 0x06 */ 2304265236Sken U8 Reserved3; /* 0x07 */ 2305265236Sken} MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS, 2306265236Sken MPI2_POINTER PTR_MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS, 2307265236Sken Mpi2SasIOUnit7PortWidthModGroupSettings_t, 2308265236Sken MPI2_POINTER pMpi2SasIOUnit7PortWidthModGroupSettings_t; 2309265236Sken 2310265236Sken/* defines for Flags field */ 2311265236Sken#define MPI2_SASIOUNIT7_FLAGS_ENABLE_PORT_WIDTH_MODULATION (0x01) 2312265236Sken 2313265236Sken 2314265236Sken/* 2315265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2316265236Sken * one and check the value returned for NumGroups at runtime. 2317265236Sken */ 2318265236Sken#ifndef MPI2_SAS_IOUNIT7_GROUP_MAX 2319265236Sken#define MPI2_SAS_IOUNIT7_GROUP_MAX (1) 2320265236Sken#endif 2321265236Sken 2322265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_7 2323265236Sken{ 2324265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2325265236Sken U8 SamplingInterval; /* 0x08 */ 2326265236Sken U8 WindowLength; /* 0x09 */ 2327265236Sken U16 Reserved1; /* 0x0A */ 2328265236Sken U32 Reserved2; /* 0x0C */ 2329265236Sken U32 Reserved3; /* 0x10 */ 2330265236Sken U8 NumGroups; /* 0x14 */ 2331265236Sken U8 Reserved4; /* 0x15 */ 2332265236Sken U16 Reserved5; /* 0x16 */ 2333265236Sken MPI2_SAS_IO_UNIT7_PORT_WIDTH_MOD_GROUP_SETTINGS 2334265236Sken PortWidthModulationGroupSettings[MPI2_SAS_IOUNIT7_GROUP_MAX]; /* 0x18 */ 2335265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT_7, 2336265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_7, 2337265236Sken Mpi2SasIOUnitPage7_t, MPI2_POINTER pMpi2SasIOUnitPage7_t; 2338265236Sken 2339265236Sken#define MPI2_SASIOUNITPAGE7_PAGEVERSION (0x00) 2340265236Sken 2341265236Sken 2342265236Sken/* SAS IO Unit Page 8 */ 2343265236Sken 2344265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_8 2345265236Sken{ 2346265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2347265236Sken U32 Reserved1; /* 0x08 */ 2348265236Sken U32 PowerManagementCapabilities; /* 0x0C */ 2349265236Sken U8 TxRxSleepStatus; /* 0x10 */ /* reserved in MPI 2.0 */ 2350265236Sken U8 Reserved2; /* 0x11 */ 2351265236Sken U16 Reserved3; /* 0x12 */ 2352265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT_8, 2353265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_8, 2354265236Sken Mpi2SasIOUnitPage8_t, MPI2_POINTER pMpi2SasIOUnitPage8_t; 2355265236Sken 2356265236Sken#define MPI2_SASIOUNITPAGE8_PAGEVERSION (0x00) 2357265236Sken 2358265236Sken/* defines for PowerManagementCapabilities field */ 2359265236Sken#define MPI2_SASIOUNIT8_PM_HOST_PORT_WIDTH_MOD (0x00001000) 2360265236Sken#define MPI2_SASIOUNIT8_PM_HOST_SAS_SLUMBER_MODE (0x00000800) 2361265236Sken#define MPI2_SASIOUNIT8_PM_HOST_SAS_PARTIAL_MODE (0x00000400) 2362265236Sken#define MPI2_SASIOUNIT8_PM_HOST_SATA_SLUMBER_MODE (0x00000200) 2363265236Sken#define MPI2_SASIOUNIT8_PM_HOST_SATA_PARTIAL_MODE (0x00000100) 2364265236Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_PORT_WIDTH_MOD (0x00000010) 2365265236Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SAS_SLUMBER_MODE (0x00000008) 2366265236Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SAS_PARTIAL_MODE (0x00000004) 2367265236Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SATA_SLUMBER_MODE (0x00000002) 2368265236Sken#define MPI2_SASIOUNIT8_PM_IOUNIT_SATA_PARTIAL_MODE (0x00000001) 2369265236Sken 2370265236Sken/* defines for TxRxSleepStatus field */ 2371265236Sken#define MPI25_SASIOUNIT8_TXRXSLEEP_UNSUPPORTED (0x00) 2372265236Sken#define MPI25_SASIOUNIT8_TXRXSLEEP_DISENGAGED (0x01) 2373265236Sken#define MPI25_SASIOUNIT8_TXRXSLEEP_ACTIVE (0x02) 2374265236Sken#define MPI25_SASIOUNIT8_TXRXSLEEP_SHUTDOWN (0x03) 2375265236Sken 2376265236Sken 2377265236Sken 2378265236Sken/* SAS IO Unit Page 16 */ 2379265236Sken 2380265236Skentypedef struct _MPI2_CONFIG_PAGE_SASIOUNIT16 2381265236Sken{ 2382265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2383265236Sken U64 TimeStamp; /* 0x08 */ 2384265236Sken U32 Reserved1; /* 0x10 */ 2385265236Sken U32 Reserved2; /* 0x14 */ 2386265236Sken U32 FastPathPendedRequests; /* 0x18 */ 2387265236Sken U32 FastPathUnPendedRequests; /* 0x1C */ 2388265236Sken U32 FastPathHostRequestStarts; /* 0x20 */ 2389265236Sken U32 FastPathFirmwareRequestStarts; /* 0x24 */ 2390265236Sken U32 FastPathHostCompletions; /* 0x28 */ 2391265236Sken U32 FastPathFirmwareCompletions; /* 0x2C */ 2392265236Sken U32 NonFastPathRequestStarts; /* 0x30 */ 2393265236Sken U32 NonFastPathHostCompletions; /* 0x30 */ 2394265236Sken} MPI2_CONFIG_PAGE_SASIOUNIT16, 2395265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT16, 2396265236Sken Mpi2SasIOUnitPage16_t, MPI2_POINTER pMpi2SasIOUnitPage16_t; 2397265236Sken 2398265236Sken#define MPI2_SASIOUNITPAGE16_PAGEVERSION (0x00) 2399265236Sken 2400265236Sken 2401265236Sken/**************************************************************************** 2402265236Sken* SAS Expander Config Pages 2403265236Sken****************************************************************************/ 2404265236Sken 2405265236Sken/* SAS Expander Page 0 */ 2406265236Sken 2407265236Skentypedef struct _MPI2_CONFIG_PAGE_EXPANDER_0 2408265236Sken{ 2409265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2410265236Sken U8 PhysicalPort; /* 0x08 */ 2411265236Sken U8 ReportGenLength; /* 0x09 */ 2412265236Sken U16 EnclosureHandle; /* 0x0A */ 2413265236Sken U64 SASAddress; /* 0x0C */ 2414265236Sken U32 DiscoveryStatus; /* 0x14 */ 2415265236Sken U16 DevHandle; /* 0x18 */ 2416265236Sken U16 ParentDevHandle; /* 0x1A */ 2417265236Sken U16 ExpanderChangeCount; /* 0x1C */ 2418265236Sken U16 ExpanderRouteIndexes; /* 0x1E */ 2419265236Sken U8 NumPhys; /* 0x20 */ 2420265236Sken U8 SASLevel; /* 0x21 */ 2421265236Sken U16 Flags; /* 0x22 */ 2422265236Sken U16 STPBusInactivityTimeLimit; /* 0x24 */ 2423265236Sken U16 STPMaxConnectTimeLimit; /* 0x26 */ 2424265236Sken U16 STP_SMP_NexusLossTime; /* 0x28 */ 2425265236Sken U16 MaxNumRoutedSasAddresses; /* 0x2A */ 2426265236Sken U64 ActiveZoneManagerSASAddress;/* 0x2C */ 2427265236Sken U16 ZoneLockInactivityLimit; /* 0x34 */ 2428265236Sken U16 Reserved1; /* 0x36 */ 2429265236Sken U8 TimeToReducedFunc; /* 0x38 */ 2430265236Sken U8 InitialTimeToReducedFunc; /* 0x39 */ 2431265236Sken U8 MaxReducedFuncTime; /* 0x3A */ 2432265236Sken U8 Reserved2; /* 0x3B */ 2433265236Sken} MPI2_CONFIG_PAGE_EXPANDER_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_0, 2434265236Sken Mpi2ExpanderPage0_t, MPI2_POINTER pMpi2ExpanderPage0_t; 2435265236Sken 2436265236Sken#define MPI2_SASEXPANDER0_PAGEVERSION (0x06) 2437265236Sken 2438265236Sken/* values for SAS Expander Page 0 DiscoveryStatus field */ 2439265236Sken#define MPI2_SAS_EXPANDER0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) 2440265236Sken#define MPI2_SAS_EXPANDER0_DS_MAX_EXPANDERS_EXCEED (0x40000000) 2441265236Sken#define MPI2_SAS_EXPANDER0_DS_MAX_DEVICES_EXCEED (0x20000000) 2442265236Sken#define MPI2_SAS_EXPANDER0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) 2443265236Sken#define MPI2_SAS_EXPANDER0_DS_DOWNSTREAM_INITIATOR (0x08000000) 2444265236Sken#define MPI2_SAS_EXPANDER0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) 2445265236Sken#define MPI2_SAS_EXPANDER0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) 2446265236Sken#define MPI2_SAS_EXPANDER0_DS_MULTI_PORT_DOMAIN (0x00002000) 2447265236Sken#define MPI2_SAS_EXPANDER0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) 2448265236Sken#define MPI2_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800) 2449265236Sken#define MPI2_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400) 2450265236Sken#define MPI2_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200) 2451265236Sken#define MPI2_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100) 2452265236Sken#define MPI2_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080) 2453265236Sken#define MPI2_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040) 2454265236Sken#define MPI2_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020) 2455265236Sken#define MPI2_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010) 2456265236Sken#define MPI2_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004) 2457265236Sken#define MPI2_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002) 2458265236Sken#define MPI2_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001) 2459265236Sken 2460265236Sken/* values for SAS Expander Page 0 Flags field */ 2461265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_REDUCED_FUNCTIONALITY (0x2000) 2462265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_ZONE_LOCKED (0x1000) 2463265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_SUPPORTED_PHYSICAL_PRES (0x0800) 2464265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_ASSERTED_PHYSICAL_PRES (0x0400) 2465265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_ZONING_SUPPORT (0x0200) 2466265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_ENABLED_ZONING (0x0100) 2467265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_TABLE_TO_TABLE_SUPPORT (0x0080) 2468265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE (0x0010) 2469265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_OTHERS_CONFIG (0x0004) 2470265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x0002) 2471265236Sken#define MPI2_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x0001) 2472265236Sken 2473265236Sken 2474265236Sken/* SAS Expander Page 1 */ 2475265236Sken 2476265236Skentypedef struct _MPI2_CONFIG_PAGE_EXPANDER_1 2477265236Sken{ 2478265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2479265236Sken U8 PhysicalPort; /* 0x08 */ 2480265236Sken U8 Reserved1; /* 0x09 */ 2481265236Sken U16 Reserved2; /* 0x0A */ 2482265236Sken U8 NumPhys; /* 0x0C */ 2483265236Sken U8 Phy; /* 0x0D */ 2484265236Sken U16 NumTableEntriesProgrammed; /* 0x0E */ 2485265236Sken U8 ProgrammedLinkRate; /* 0x10 */ 2486265236Sken U8 HwLinkRate; /* 0x11 */ 2487265236Sken U16 AttachedDevHandle; /* 0x12 */ 2488265236Sken U32 PhyInfo; /* 0x14 */ 2489265236Sken U32 AttachedDeviceInfo; /* 0x18 */ 2490265236Sken U16 ExpanderDevHandle; /* 0x1C */ 2491265236Sken U8 ChangeCount; /* 0x1E */ 2492265236Sken U8 NegotiatedLinkRate; /* 0x1F */ 2493265236Sken U8 PhyIdentifier; /* 0x20 */ 2494265236Sken U8 AttachedPhyIdentifier; /* 0x21 */ 2495265236Sken U8 Reserved3; /* 0x22 */ 2496265236Sken U8 DiscoveryInfo; /* 0x23 */ 2497265236Sken U32 AttachedPhyInfo; /* 0x24 */ 2498265236Sken U8 ZoneGroup; /* 0x28 */ 2499265236Sken U8 SelfConfigStatus; /* 0x29 */ 2500265236Sken U16 Reserved4; /* 0x2A */ 2501265236Sken} MPI2_CONFIG_PAGE_EXPANDER_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_1, 2502265236Sken Mpi2ExpanderPage1_t, MPI2_POINTER pMpi2ExpanderPage1_t; 2503265236Sken 2504265236Sken#define MPI2_SASEXPANDER1_PAGEVERSION (0x02) 2505265236Sken 2506265236Sken/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ 2507265236Sken 2508265236Sken/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ 2509265236Sken 2510265236Sken/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ 2511265236Sken 2512265236Sken/* see mpi2_sas.h for the MPI2_SAS_DEVICE_INFO_ defines used for the AttachedDeviceInfo field */ 2513265236Sken 2514265236Sken/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ 2515265236Sken 2516265236Sken/* values for SAS Expander Page 1 DiscoveryInfo field */ 2517265236Sken#define MPI2_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED (0x04) 2518265236Sken#define MPI2_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02) 2519265236Sken#define MPI2_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01) 2520265236Sken 2521265236Sken/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ 2522265236Sken 2523265236Sken 2524265236Sken/**************************************************************************** 2525265236Sken* SAS Device Config Pages 2526265236Sken****************************************************************************/ 2527265236Sken 2528265236Sken/* SAS Device Page 0 */ 2529265236Sken 2530265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0 2531265236Sken{ 2532265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2533265236Sken U16 Slot; /* 0x08 */ 2534265236Sken U16 EnclosureHandle; /* 0x0A */ 2535265236Sken U64 SASAddress; /* 0x0C */ 2536265236Sken U16 ParentDevHandle; /* 0x14 */ 2537265236Sken U8 PhyNum; /* 0x16 */ 2538265236Sken U8 AccessStatus; /* 0x17 */ 2539265236Sken U16 DevHandle; /* 0x18 */ 2540265236Sken U8 AttachedPhyIdentifier; /* 0x1A */ 2541265236Sken U8 ZoneGroup; /* 0x1B */ 2542265236Sken U32 DeviceInfo; /* 0x1C */ 2543265236Sken U16 Flags; /* 0x20 */ 2544265236Sken U8 PhysicalPort; /* 0x22 */ 2545265236Sken U8 MaxPortConnections; /* 0x23 */ 2546265236Sken U64 DeviceName; /* 0x24 */ 2547265236Sken U8 PortGroups; /* 0x2C */ 2548265236Sken U8 DmaGroup; /* 0x2D */ 2549265236Sken U8 ControlGroup; /* 0x2E */ 2550265236Sken U8 EnclosureLevel; /* 0x2F */ 2551265236Sken U8 ConnectorName[4]; /* 0x30 */ 2552265236Sken U32 Reserved3; /* 0x34 */ 2553265236Sken} MPI2_CONFIG_PAGE_SAS_DEV_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_0, 2554265236Sken Mpi2SasDevicePage0_t, MPI2_POINTER pMpi2SasDevicePage0_t; 2555265236Sken 2556265236Sken#define MPI2_SASDEVICE0_PAGEVERSION (0x09) 2557265236Sken 2558265236Sken/* values for SAS Device Page 0 AccessStatus field */ 2559265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00) 2560265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01) 2561265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02) 2562265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03) 2563265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SATA_NEEDS_INITIALIZATION (0x04) 2564265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_ROUTE_NOT_ADDRESSABLE (0x05) 2565265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SMP_ERROR_NOT_ADDRESSABLE (0x06) 2566265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED (0x07) 2567265236Sken/* specific values for SATA Init failures */ 2568265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10) 2569265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11) 2570265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12) 2571265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13) 2572265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14) 2573265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15) 2574265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16) 2575265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UDMA_SN (0x17) 2576265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_ZONING_VIOLATION (0x18) 2577265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_NOT_ADDRESSABLE (0x19) 2578265236Sken#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MAX (0x1F) 2579265236Sken 2580265236Sken/* see mpi2_sas.h for values for SAS Device Page 0 DeviceInfo values */ 2581265236Sken 2582265236Sken/* values for SAS Device Page 0 Flags field */ 2583265236Sken#define MPI2_SAS_DEVICE0_FLAGS_UNAUTHORIZED_DEVICE (0x8000) 2584265236Sken#define MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH (0x4000) 2585265236Sken#define MPI25_SAS_DEVICE0_FLAGS_FAST_PATH_CAPABLE (0x2000) 2586265236Sken#define MPI2_SAS_DEVICE0_FLAGS_SLUMBER_PM_CAPABLE (0x1000) 2587265236Sken#define MPI2_SAS_DEVICE0_FLAGS_PARTIAL_PM_CAPABLE (0x0800) 2588265236Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY (0x0400) 2589265236Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200) 2590265236Sken#define MPI2_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100) 2591265236Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080) 2592265236Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040) 2593265236Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020) 2594265236Sken#define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010) 2595265236Sken#define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008) 2596265236Sken#define MPI2_SAS_DEVICE0_FLAGS_ENCL_LEVEL_VALID (0x0002) 2597265236Sken#define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001) 2598265236Sken 2599265236Sken 2600265236Sken/* SAS Device Page 1 */ 2601265236Sken 2602265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_DEV_1 2603265236Sken{ 2604265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2605265236Sken U32 Reserved1; /* 0x08 */ 2606265236Sken U64 SASAddress; /* 0x0C */ 2607265236Sken U32 Reserved2; /* 0x14 */ 2608265236Sken U16 DevHandle; /* 0x18 */ 2609265236Sken U16 Reserved3; /* 0x1A */ 2610265236Sken U8 InitialRegDeviceFIS[20];/* 0x1C */ 2611265236Sken} MPI2_CONFIG_PAGE_SAS_DEV_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_1, 2612265236Sken Mpi2SasDevicePage1_t, MPI2_POINTER pMpi2SasDevicePage1_t; 2613265236Sken 2614265236Sken#define MPI2_SASDEVICE1_PAGEVERSION (0x01) 2615265236Sken 2616265236Sken 2617265236Sken/**************************************************************************** 2618265236Sken* SAS PHY Config Pages 2619265236Sken****************************************************************************/ 2620265236Sken 2621265236Sken/* SAS PHY Page 0 */ 2622265236Sken 2623265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_0 2624265236Sken{ 2625265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2626265236Sken U16 OwnerDevHandle; /* 0x08 */ 2627265236Sken U16 Reserved1; /* 0x0A */ 2628265236Sken U16 AttachedDevHandle; /* 0x0C */ 2629265236Sken U8 AttachedPhyIdentifier; /* 0x0E */ 2630265236Sken U8 Reserved2; /* 0x0F */ 2631265236Sken U32 AttachedPhyInfo; /* 0x10 */ 2632265236Sken U8 ProgrammedLinkRate; /* 0x14 */ 2633265236Sken U8 HwLinkRate; /* 0x15 */ 2634265236Sken U8 ChangeCount; /* 0x16 */ 2635265236Sken U8 Flags; /* 0x17 */ 2636265236Sken U32 PhyInfo; /* 0x18 */ 2637265236Sken U8 NegotiatedLinkRate; /* 0x1C */ 2638265236Sken U8 Reserved3; /* 0x1D */ 2639265236Sken U16 Reserved4; /* 0x1E */ 2640265236Sken} MPI2_CONFIG_PAGE_SAS_PHY_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_0, 2641265236Sken Mpi2SasPhyPage0_t, MPI2_POINTER pMpi2SasPhyPage0_t; 2642265236Sken 2643265236Sken#define MPI2_SASPHY0_PAGEVERSION (0x03) 2644265236Sken 2645265236Sken/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ 2646265236Sken 2647265236Sken/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ 2648265236Sken 2649265236Sken/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ 2650265236Sken 2651265236Sken/* values for SAS PHY Page 0 Flags field */ 2652265236Sken#define MPI2_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01) 2653265236Sken 2654265236Sken/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ 2655265236Sken 2656265236Sken/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ 2657265236Sken 2658265236Sken 2659265236Sken/* SAS PHY Page 1 */ 2660265236Sken 2661265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_1 2662265236Sken{ 2663265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2664265236Sken U32 Reserved1; /* 0x08 */ 2665265236Sken U32 InvalidDwordCount; /* 0x0C */ 2666265236Sken U32 RunningDisparityErrorCount; /* 0x10 */ 2667265236Sken U32 LossDwordSynchCount; /* 0x14 */ 2668265236Sken U32 PhyResetProblemCount; /* 0x18 */ 2669265236Sken} MPI2_CONFIG_PAGE_SAS_PHY_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_1, 2670265236Sken Mpi2SasPhyPage1_t, MPI2_POINTER pMpi2SasPhyPage1_t; 2671265236Sken 2672265236Sken#define MPI2_SASPHY1_PAGEVERSION (0x01) 2673265236Sken 2674265236Sken 2675265236Sken/* SAS PHY Page 2 */ 2676265236Sken 2677265236Skentypedef struct _MPI2_SASPHY2_PHY_EVENT 2678265236Sken{ 2679265236Sken U8 PhyEventCode; /* 0x00 */ 2680265236Sken U8 Reserved1; /* 0x01 */ 2681265236Sken U16 Reserved2; /* 0x02 */ 2682265236Sken U32 PhyEventInfo; /* 0x04 */ 2683265236Sken} MPI2_SASPHY2_PHY_EVENT, MPI2_POINTER PTR_MPI2_SASPHY2_PHY_EVENT, 2684265236Sken Mpi2SasPhy2PhyEvent_t, MPI2_POINTER pMpi2SasPhy2PhyEvent_t; 2685265236Sken 2686265236Sken/* use MPI2_SASPHY3_EVENT_CODE_ for the PhyEventCode field */ 2687265236Sken 2688265236Sken 2689265236Sken/* 2690265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2691265236Sken * one and check the value returned for NumPhyEvents at runtime. 2692265236Sken */ 2693265236Sken#ifndef MPI2_SASPHY2_PHY_EVENT_MAX 2694265236Sken#define MPI2_SASPHY2_PHY_EVENT_MAX (1) 2695265236Sken#endif 2696265236Sken 2697265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_2 2698265236Sken{ 2699265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2700265236Sken U32 Reserved1; /* 0x08 */ 2701265236Sken U8 NumPhyEvents; /* 0x0C */ 2702265236Sken U8 Reserved2; /* 0x0D */ 2703265236Sken U16 Reserved3; /* 0x0E */ 2704265236Sken MPI2_SASPHY2_PHY_EVENT PhyEvent[MPI2_SASPHY2_PHY_EVENT_MAX]; /* 0x10 */ 2705265236Sken} MPI2_CONFIG_PAGE_SAS_PHY_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_2, 2706265236Sken Mpi2SasPhyPage2_t, MPI2_POINTER pMpi2SasPhyPage2_t; 2707265236Sken 2708265236Sken#define MPI2_SASPHY2_PAGEVERSION (0x00) 2709265236Sken 2710265236Sken 2711265236Sken/* SAS PHY Page 3 */ 2712265236Sken 2713265236Skentypedef struct _MPI2_SASPHY3_PHY_EVENT_CONFIG 2714265236Sken{ 2715265236Sken U8 PhyEventCode; /* 0x00 */ 2716265236Sken U8 Reserved1; /* 0x01 */ 2717265236Sken U16 Reserved2; /* 0x02 */ 2718265236Sken U8 CounterType; /* 0x04 */ 2719265236Sken U8 ThresholdWindow; /* 0x05 */ 2720265236Sken U8 TimeUnits; /* 0x06 */ 2721265236Sken U8 Reserved3; /* 0x07 */ 2722265236Sken U32 EventThreshold; /* 0x08 */ 2723265236Sken U16 ThresholdFlags; /* 0x0C */ 2724265236Sken U16 Reserved4; /* 0x0E */ 2725265236Sken} MPI2_SASPHY3_PHY_EVENT_CONFIG, MPI2_POINTER PTR_MPI2_SASPHY3_PHY_EVENT_CONFIG, 2726265236Sken Mpi2SasPhy3PhyEventConfig_t, MPI2_POINTER pMpi2SasPhy3PhyEventConfig_t; 2727265236Sken 2728265236Sken/* values for PhyEventCode field */ 2729265236Sken#define MPI2_SASPHY3_EVENT_CODE_NO_EVENT (0x00) 2730265236Sken#define MPI2_SASPHY3_EVENT_CODE_INVALID_DWORD (0x01) 2731265236Sken#define MPI2_SASPHY3_EVENT_CODE_RUNNING_DISPARITY_ERROR (0x02) 2732265236Sken#define MPI2_SASPHY3_EVENT_CODE_LOSS_DWORD_SYNC (0x03) 2733265236Sken#define MPI2_SASPHY3_EVENT_CODE_PHY_RESET_PROBLEM (0x04) 2734265236Sken#define MPI2_SASPHY3_EVENT_CODE_ELASTICITY_BUF_OVERFLOW (0x05) 2735265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_ERROR (0x06) 2736265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_ADDR_FRAME_ERROR (0x20) 2737265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_AC_OPEN_REJECT (0x21) 2738265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AC_OPEN_REJECT (0x22) 2739265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_RC_OPEN_REJECT (0x23) 2740265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_RC_OPEN_REJECT (0x24) 2741265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AIP_PARTIAL_WAITING_ON (0x25) 2742265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AIP_CONNECT_WAITING_ON (0x26) 2743265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_BREAK (0x27) 2744265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_BREAK (0x28) 2745265236Sken#define MPI2_SASPHY3_EVENT_CODE_BREAK_TIMEOUT (0x29) 2746265236Sken#define MPI2_SASPHY3_EVENT_CODE_CONNECTION (0x2A) 2747265236Sken#define MPI2_SASPHY3_EVENT_CODE_PEAKTX_PATHWAY_BLOCKED (0x2B) 2748265236Sken#define MPI2_SASPHY3_EVENT_CODE_PEAKTX_ARB_WAIT_TIME (0x2C) 2749265236Sken#define MPI2_SASPHY3_EVENT_CODE_PEAK_ARB_WAIT_TIME (0x2D) 2750265236Sken#define MPI2_SASPHY3_EVENT_CODE_PEAK_CONNECT_TIME (0x2E) 2751265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SSP_FRAMES (0x40) 2752265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SSP_FRAMES (0x41) 2753265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SSP_ERROR_FRAMES (0x42) 2754265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SSP_ERROR_FRAMES (0x43) 2755265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_CREDIT_BLOCKED (0x44) 2756265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_CREDIT_BLOCKED (0x45) 2757265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SATA_FRAMES (0x50) 2758265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SATA_FRAMES (0x51) 2759265236Sken#define MPI2_SASPHY3_EVENT_CODE_SATA_OVERFLOW (0x52) 2760265236Sken#define MPI2_SASPHY3_EVENT_CODE_TX_SMP_FRAMES (0x60) 2761265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SMP_FRAMES (0x61) 2762265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_SMP_ERROR_FRAMES (0x63) 2763265236Sken#define MPI2_SASPHY3_EVENT_CODE_HOTPLUG_TIMEOUT (0xD0) 2764265236Sken#define MPI2_SASPHY3_EVENT_CODE_MISALIGNED_MUX_PRIMITIVE (0xD1) 2765265236Sken#define MPI2_SASPHY3_EVENT_CODE_RX_AIP (0xD2) 2766265236Sken 2767265236Sken/* values for the CounterType field */ 2768265236Sken#define MPI2_SASPHY3_COUNTER_TYPE_WRAPPING (0x00) 2769265236Sken#define MPI2_SASPHY3_COUNTER_TYPE_SATURATING (0x01) 2770265236Sken#define MPI2_SASPHY3_COUNTER_TYPE_PEAK_VALUE (0x02) 2771265236Sken 2772265236Sken/* values for the TimeUnits field */ 2773265236Sken#define MPI2_SASPHY3_TIME_UNITS_10_MICROSECONDS (0x00) 2774265236Sken#define MPI2_SASPHY3_TIME_UNITS_100_MICROSECONDS (0x01) 2775265236Sken#define MPI2_SASPHY3_TIME_UNITS_1_MILLISECOND (0x02) 2776265236Sken#define MPI2_SASPHY3_TIME_UNITS_10_MILLISECONDS (0x03) 2777265236Sken 2778265236Sken/* values for the ThresholdFlags field */ 2779265236Sken#define MPI2_SASPHY3_TFLAGS_PHY_RESET (0x0002) 2780265236Sken#define MPI2_SASPHY3_TFLAGS_EVENT_NOTIFY (0x0001) 2781265236Sken 2782265236Sken/* 2783265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2784265236Sken * one and check the value returned for NumPhyEvents at runtime. 2785265236Sken */ 2786265236Sken#ifndef MPI2_SASPHY3_PHY_EVENT_MAX 2787265236Sken#define MPI2_SASPHY3_PHY_EVENT_MAX (1) 2788265236Sken#endif 2789265236Sken 2790265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_3 2791265236Sken{ 2792265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2793265236Sken U32 Reserved1; /* 0x08 */ 2794265236Sken U8 NumPhyEvents; /* 0x0C */ 2795265236Sken U8 Reserved2; /* 0x0D */ 2796265236Sken U16 Reserved3; /* 0x0E */ 2797265236Sken MPI2_SASPHY3_PHY_EVENT_CONFIG PhyEventConfig[MPI2_SASPHY3_PHY_EVENT_MAX]; /* 0x10 */ 2798265236Sken} MPI2_CONFIG_PAGE_SAS_PHY_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_3, 2799265236Sken Mpi2SasPhyPage3_t, MPI2_POINTER pMpi2SasPhyPage3_t; 2800265236Sken 2801265236Sken#define MPI2_SASPHY3_PAGEVERSION (0x00) 2802265236Sken 2803265236Sken 2804265236Sken/* SAS PHY Page 4 */ 2805265236Sken 2806265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PHY_4 2807265236Sken{ 2808265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2809265236Sken U16 Reserved1; /* 0x08 */ 2810265236Sken U8 Reserved2; /* 0x0A */ 2811265236Sken U8 Flags; /* 0x0B */ 2812265236Sken U8 InitialFrame[28]; /* 0x0C */ 2813265236Sken} MPI2_CONFIG_PAGE_SAS_PHY_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_4, 2814265236Sken Mpi2SasPhyPage4_t, MPI2_POINTER pMpi2SasPhyPage4_t; 2815265236Sken 2816265236Sken#define MPI2_SASPHY4_PAGEVERSION (0x00) 2817265236Sken 2818265236Sken/* values for the Flags field */ 2819265236Sken#define MPI2_SASPHY4_FLAGS_FRAME_VALID (0x02) 2820265236Sken#define MPI2_SASPHY4_FLAGS_SATA_FRAME (0x01) 2821265236Sken 2822265236Sken 2823265236Sken 2824265236Sken 2825265236Sken/**************************************************************************** 2826265236Sken* SAS Port Config Pages 2827265236Sken****************************************************************************/ 2828265236Sken 2829265236Sken/* SAS Port Page 0 */ 2830265236Sken 2831265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_PORT_0 2832265236Sken{ 2833265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2834265236Sken U8 PortNumber; /* 0x08 */ 2835265236Sken U8 PhysicalPort; /* 0x09 */ 2836265236Sken U8 PortWidth; /* 0x0A */ 2837265236Sken U8 PhysicalPortWidth; /* 0x0B */ 2838265236Sken U8 ZoneGroup; /* 0x0C */ 2839265236Sken U8 Reserved1; /* 0x0D */ 2840265236Sken U16 Reserved2; /* 0x0E */ 2841265236Sken U64 SASAddress; /* 0x10 */ 2842265236Sken U32 DeviceInfo; /* 0x18 */ 2843265236Sken U32 Reserved3; /* 0x1C */ 2844265236Sken U32 Reserved4; /* 0x20 */ 2845265236Sken} MPI2_CONFIG_PAGE_SAS_PORT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PORT_0, 2846265236Sken Mpi2SasPortPage0_t, MPI2_POINTER pMpi2SasPortPage0_t; 2847265236Sken 2848265236Sken#define MPI2_SASPORT0_PAGEVERSION (0x00) 2849265236Sken 2850265236Sken/* see mpi2_sas.h for values for SAS Port Page 0 DeviceInfo values */ 2851265236Sken 2852265236Sken 2853265236Sken/**************************************************************************** 2854265236Sken* SAS Enclosure Config Pages 2855265236Sken****************************************************************************/ 2856265236Sken 2857265236Sken/* SAS Enclosure Page 0 */ 2858265236Sken 2859265236Skentypedef struct _MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0 2860265236Sken{ 2861265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2862265236Sken U32 Reserved1; /* 0x08 */ 2863265236Sken U64 EnclosureLogicalID; /* 0x0C */ 2864265236Sken U16 Flags; /* 0x14 */ 2865265236Sken U16 EnclosureHandle; /* 0x16 */ 2866265236Sken U16 NumSlots; /* 0x18 */ 2867265236Sken U16 StartSlot; /* 0x1A */ 2868265236Sken U8 Reserved2; /* 0x1C */ 2869265236Sken U8 EnclosureLevel; /* 0x1D */ 2870265236Sken U16 SEPDevHandle; /* 0x1E */ 2871265236Sken U32 Reserved3; /* 0x20 */ 2872265236Sken U32 Reserved4; /* 0x24 */ 2873265236Sken} MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, 2874265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, 2875265236Sken Mpi2SasEnclosurePage0_t, MPI2_POINTER pMpi2SasEnclosurePage0_t; 2876265236Sken 2877265236Sken#define MPI2_SASENCLOSURE0_PAGEVERSION (0x04) 2878265236Sken 2879265236Sken/* values for SAS Enclosure Page 0 Flags field */ 2880265236Sken#define MPI2_SAS_ENCLS0_FLAGS_ENCL_LEVEL_VALID (0x0010) 2881265236Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F) 2882265236Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000) 2883265236Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001) 2884265236Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002) 2885265236Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003) 2886265236Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004) 2887265236Sken#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_GPIO (0x0005) 2888265236Sken 2889265236Sken 2890265236Sken/**************************************************************************** 2891265236Sken* Log Config Page 2892265236Sken****************************************************************************/ 2893265236Sken 2894265236Sken/* Log Page 0 */ 2895265236Sken 2896265236Sken/* 2897265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2898265236Sken * one and check the value returned for NumLogEntries at runtime. 2899265236Sken */ 2900265236Sken#ifndef MPI2_LOG_0_NUM_LOG_ENTRIES 2901265236Sken#define MPI2_LOG_0_NUM_LOG_ENTRIES (1) 2902265236Sken#endif 2903265236Sken 2904265236Sken#define MPI2_LOG_0_LOG_DATA_LENGTH (0x1C) 2905265236Sken 2906265236Skentypedef struct _MPI2_LOG_0_ENTRY 2907265236Sken{ 2908265236Sken U64 TimeStamp; /* 0x00 */ 2909265236Sken U32 Reserved1; /* 0x08 */ 2910265236Sken U16 LogSequence; /* 0x0C */ 2911265236Sken U16 LogEntryQualifier; /* 0x0E */ 2912265236Sken U8 VP_ID; /* 0x10 */ 2913265236Sken U8 VF_ID; /* 0x11 */ 2914265236Sken U16 Reserved2; /* 0x12 */ 2915265236Sken U8 LogData[MPI2_LOG_0_LOG_DATA_LENGTH];/* 0x14 */ 2916265236Sken} MPI2_LOG_0_ENTRY, MPI2_POINTER PTR_MPI2_LOG_0_ENTRY, 2917265236Sken Mpi2Log0Entry_t, MPI2_POINTER pMpi2Log0Entry_t; 2918265236Sken 2919265236Sken/* values for Log Page 0 LogEntry LogEntryQualifier field */ 2920265236Sken#define MPI2_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000) 2921265236Sken#define MPI2_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001) 2922265236Sken#define MPI2_LOG_0_ENTRY_QUAL_TIMESTAMP_UPDATE (0x0002) 2923265236Sken#define MPI2_LOG_0_ENTRY_QUAL_MIN_IMPLEMENT_SPEC (0x8000) 2924265236Sken#define MPI2_LOG_0_ENTRY_QUAL_MAX_IMPLEMENT_SPEC (0xFFFF) 2925265236Sken 2926265236Skentypedef struct _MPI2_CONFIG_PAGE_LOG_0 2927265236Sken{ 2928265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2929265236Sken U32 Reserved1; /* 0x08 */ 2930265236Sken U32 Reserved2; /* 0x0C */ 2931265236Sken U16 NumLogEntries; /* 0x10 */ 2932265236Sken U16 Reserved3; /* 0x12 */ 2933265236Sken MPI2_LOG_0_ENTRY LogEntry[MPI2_LOG_0_NUM_LOG_ENTRIES]; /* 0x14 */ 2934265236Sken} MPI2_CONFIG_PAGE_LOG_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_LOG_0, 2935265236Sken Mpi2LogPage0_t, MPI2_POINTER pMpi2LogPage0_t; 2936265236Sken 2937265236Sken#define MPI2_LOG_0_PAGEVERSION (0x02) 2938265236Sken 2939265236Sken 2940265236Sken/**************************************************************************** 2941265236Sken* RAID Config Page 2942265236Sken****************************************************************************/ 2943265236Sken 2944265236Sken/* RAID Page 0 */ 2945265236Sken 2946265236Sken/* 2947265236Sken * Host code (drivers, BIOS, utilities, etc.) should leave this define set to 2948265236Sken * one and check the value returned for NumElements at runtime. 2949265236Sken */ 2950265236Sken#ifndef MPI2_RAIDCONFIG0_MAX_ELEMENTS 2951265236Sken#define MPI2_RAIDCONFIG0_MAX_ELEMENTS (1) 2952265236Sken#endif 2953265236Sken 2954265236Skentypedef struct _MPI2_RAIDCONFIG0_CONFIG_ELEMENT 2955265236Sken{ 2956265236Sken U16 ElementFlags; /* 0x00 */ 2957265236Sken U16 VolDevHandle; /* 0x02 */ 2958265236Sken U8 HotSparePool; /* 0x04 */ 2959265236Sken U8 PhysDiskNum; /* 0x05 */ 2960265236Sken U16 PhysDiskDevHandle; /* 0x06 */ 2961265236Sken} MPI2_RAIDCONFIG0_CONFIG_ELEMENT, 2962265236Sken MPI2_POINTER PTR_MPI2_RAIDCONFIG0_CONFIG_ELEMENT, 2963265236Sken Mpi2RaidConfig0ConfigElement_t, MPI2_POINTER pMpi2RaidConfig0ConfigElement_t; 2964265236Sken 2965265236Sken/* values for the ElementFlags field */ 2966265236Sken#define MPI2_RAIDCONFIG0_EFLAGS_MASK_ELEMENT_TYPE (0x000F) 2967265236Sken#define MPI2_RAIDCONFIG0_EFLAGS_VOLUME_ELEMENT (0x0000) 2968265236Sken#define MPI2_RAIDCONFIG0_EFLAGS_VOL_PHYS_DISK_ELEMENT (0x0001) 2969265236Sken#define MPI2_RAIDCONFIG0_EFLAGS_HOT_SPARE_ELEMENT (0x0002) 2970265236Sken#define MPI2_RAIDCONFIG0_EFLAGS_OCE_ELEMENT (0x0003) 2971265236Sken 2972265236Sken 2973265236Skentypedef struct _MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0 2974265236Sken{ 2975265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 2976265236Sken U8 NumHotSpares; /* 0x08 */ 2977265236Sken U8 NumPhysDisks; /* 0x09 */ 2978265236Sken U8 NumVolumes; /* 0x0A */ 2979265236Sken U8 ConfigNum; /* 0x0B */ 2980265236Sken U32 Flags; /* 0x0C */ 2981265236Sken U8 ConfigGUID[24]; /* 0x10 */ 2982265236Sken U32 Reserved1; /* 0x28 */ 2983265236Sken U8 NumElements; /* 0x2C */ 2984265236Sken U8 Reserved2; /* 0x2D */ 2985265236Sken U16 Reserved3; /* 0x2E */ 2986265236Sken MPI2_RAIDCONFIG0_CONFIG_ELEMENT ConfigElement[MPI2_RAIDCONFIG0_MAX_ELEMENTS]; /* 0x30 */ 2987265236Sken} MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, 2988265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, 2989265236Sken Mpi2RaidConfigurationPage0_t, MPI2_POINTER pMpi2RaidConfigurationPage0_t; 2990265236Sken 2991265236Sken#define MPI2_RAIDCONFIG0_PAGEVERSION (0x00) 2992265236Sken 2993265236Sken/* values for RAID Configuration Page 0 Flags field */ 2994265236Sken#define MPI2_RAIDCONFIG0_FLAG_FOREIGN_CONFIG (0x00000001) 2995265236Sken 2996265236Sken 2997265236Sken/**************************************************************************** 2998265236Sken* Driver Persistent Mapping Config Pages 2999265236Sken****************************************************************************/ 3000265236Sken 3001265236Sken/* Driver Persistent Mapping Page 0 */ 3002265236Sken 3003265236Skentypedef struct _MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY 3004265236Sken{ 3005265236Sken U64 PhysicalIdentifier; /* 0x00 */ 3006265236Sken U16 MappingInformation; /* 0x08 */ 3007265236Sken U16 DeviceIndex; /* 0x0A */ 3008265236Sken U32 PhysicalBitsMapping; /* 0x0C */ 3009265236Sken U32 Reserved1; /* 0x10 */ 3010265236Sken} MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, 3011265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, 3012265236Sken Mpi2DriverMap0Entry_t, MPI2_POINTER pMpi2DriverMap0Entry_t; 3013265236Sken 3014265236Skentypedef struct _MPI2_CONFIG_PAGE_DRIVER_MAPPING_0 3015265236Sken{ 3016265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 3017265236Sken MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY Entry; /* 0x08 */ 3018265236Sken} MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, 3019265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, 3020265236Sken Mpi2DriverMappingPage0_t, MPI2_POINTER pMpi2DriverMappingPage0_t; 3021265236Sken 3022265236Sken#define MPI2_DRIVERMAPPING0_PAGEVERSION (0x00) 3023265236Sken 3024265236Sken/* values for Driver Persistent Mapping Page 0 MappingInformation field */ 3025265236Sken#define MPI2_DRVMAP0_MAPINFO_SLOT_MASK (0x07F0) 3026265236Sken#define MPI2_DRVMAP0_MAPINFO_SLOT_SHIFT (4) 3027265236Sken#define MPI2_DRVMAP0_MAPINFO_MISSING_MASK (0x000F) 3028265236Sken 3029265236Sken 3030265236Sken/**************************************************************************** 3031265236Sken* Ethernet Config Pages 3032265236Sken****************************************************************************/ 3033265236Sken 3034265236Sken/* Ethernet Page 0 */ 3035265236Sken 3036265236Sken/* IP address (union of IPv4 and IPv6) */ 3037265236Skentypedef union _MPI2_ETHERNET_IP_ADDR 3038265236Sken{ 3039265236Sken U32 IPv4Addr; 3040265236Sken U32 IPv6Addr[4]; 3041265236Sken} MPI2_ETHERNET_IP_ADDR, MPI2_POINTER PTR_MPI2_ETHERNET_IP_ADDR, 3042265236Sken Mpi2EthernetIpAddr_t, MPI2_POINTER pMpi2EthernetIpAddr_t; 3043265236Sken 3044265236Sken#define MPI2_ETHERNET_HOST_NAME_LENGTH (32) 3045265236Sken 3046265236Skentypedef struct _MPI2_CONFIG_PAGE_ETHERNET_0 3047265236Sken{ 3048265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 3049265236Sken U8 NumInterfaces; /* 0x08 */ 3050265236Sken U8 Reserved0; /* 0x09 */ 3051265236Sken U16 Reserved1; /* 0x0A */ 3052265236Sken U32 Status; /* 0x0C */ 3053265236Sken U8 MediaState; /* 0x10 */ 3054265236Sken U8 Reserved2; /* 0x11 */ 3055265236Sken U16 Reserved3; /* 0x12 */ 3056265236Sken U8 MacAddress[6]; /* 0x14 */ 3057265236Sken U8 Reserved4; /* 0x1A */ 3058265236Sken U8 Reserved5; /* 0x1B */ 3059265236Sken MPI2_ETHERNET_IP_ADDR IpAddress; /* 0x1C */ 3060265236Sken MPI2_ETHERNET_IP_ADDR SubnetMask; /* 0x2C */ 3061265236Sken MPI2_ETHERNET_IP_ADDR GatewayIpAddress; /* 0x3C */ 3062265236Sken MPI2_ETHERNET_IP_ADDR DNS1IpAddress; /* 0x4C */ 3063265236Sken MPI2_ETHERNET_IP_ADDR DNS2IpAddress; /* 0x5C */ 3064265236Sken MPI2_ETHERNET_IP_ADDR DhcpIpAddress; /* 0x6C */ 3065265236Sken U8 HostName[MPI2_ETHERNET_HOST_NAME_LENGTH];/* 0x7C */ 3066265236Sken} MPI2_CONFIG_PAGE_ETHERNET_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_ETHERNET_0, 3067265236Sken Mpi2EthernetPage0_t, MPI2_POINTER pMpi2EthernetPage0_t; 3068265236Sken 3069265236Sken#define MPI2_ETHERNETPAGE0_PAGEVERSION (0x00) 3070265236Sken 3071265236Sken/* values for Ethernet Page 0 Status field */ 3072265236Sken#define MPI2_ETHPG0_STATUS_IPV6_CAPABLE (0x80000000) 3073265236Sken#define MPI2_ETHPG0_STATUS_IPV4_CAPABLE (0x40000000) 3074265236Sken#define MPI2_ETHPG0_STATUS_CONSOLE_CONNECTED (0x20000000) 3075265236Sken#define MPI2_ETHPG0_STATUS_DEFAULT_IF (0x00000100) 3076265236Sken#define MPI2_ETHPG0_STATUS_FW_DWNLD_ENABLED (0x00000080) 3077265236Sken#define MPI2_ETHPG0_STATUS_TELNET_ENABLED (0x00000040) 3078265236Sken#define MPI2_ETHPG0_STATUS_SSH2_ENABLED (0x00000020) 3079265236Sken#define MPI2_ETHPG0_STATUS_DHCP_CLIENT_ENABLED (0x00000010) 3080265236Sken#define MPI2_ETHPG0_STATUS_IPV6_ENABLED (0x00000008) 3081265236Sken#define MPI2_ETHPG0_STATUS_IPV4_ENABLED (0x00000004) 3082265236Sken#define MPI2_ETHPG0_STATUS_IPV6_ADDRESSES (0x00000002) 3083265236Sken#define MPI2_ETHPG0_STATUS_ETH_IF_ENABLED (0x00000001) 3084265236Sken 3085265236Sken/* values for Ethernet Page 0 MediaState field */ 3086265236Sken#define MPI2_ETHPG0_MS_DUPLEX_MASK (0x80) 3087265236Sken#define MPI2_ETHPG0_MS_HALF_DUPLEX (0x00) 3088265236Sken#define MPI2_ETHPG0_MS_FULL_DUPLEX (0x80) 3089265236Sken 3090265236Sken#define MPI2_ETHPG0_MS_CONNECT_SPEED_MASK (0x07) 3091265236Sken#define MPI2_ETHPG0_MS_NOT_CONNECTED (0x00) 3092265236Sken#define MPI2_ETHPG0_MS_10MBIT (0x01) 3093265236Sken#define MPI2_ETHPG0_MS_100MBIT (0x02) 3094265236Sken#define MPI2_ETHPG0_MS_1GBIT (0x03) 3095265236Sken 3096265236Sken 3097265236Sken/* Ethernet Page 1 */ 3098265236Sken 3099265236Skentypedef struct _MPI2_CONFIG_PAGE_ETHERNET_1 3100265236Sken{ 3101265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 3102265236Sken U32 Reserved0; /* 0x08 */ 3103265236Sken U32 Flags; /* 0x0C */ 3104265236Sken U8 MediaState; /* 0x10 */ 3105265236Sken U8 Reserved1; /* 0x11 */ 3106265236Sken U16 Reserved2; /* 0x12 */ 3107265236Sken U8 MacAddress[6]; /* 0x14 */ 3108265236Sken U8 Reserved3; /* 0x1A */ 3109265236Sken U8 Reserved4; /* 0x1B */ 3110265236Sken MPI2_ETHERNET_IP_ADDR StaticIpAddress; /* 0x1C */ 3111265236Sken MPI2_ETHERNET_IP_ADDR StaticSubnetMask; /* 0x2C */ 3112265236Sken MPI2_ETHERNET_IP_ADDR StaticGatewayIpAddress; /* 0x3C */ 3113265236Sken MPI2_ETHERNET_IP_ADDR StaticDNS1IpAddress; /* 0x4C */ 3114265236Sken MPI2_ETHERNET_IP_ADDR StaticDNS2IpAddress; /* 0x5C */ 3115265236Sken U32 Reserved5; /* 0x6C */ 3116265236Sken U32 Reserved6; /* 0x70 */ 3117265236Sken U32 Reserved7; /* 0x74 */ 3118265236Sken U32 Reserved8; /* 0x78 */ 3119265236Sken U8 HostName[MPI2_ETHERNET_HOST_NAME_LENGTH];/* 0x7C */ 3120265236Sken} MPI2_CONFIG_PAGE_ETHERNET_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_ETHERNET_1, 3121265236Sken Mpi2EthernetPage1_t, MPI2_POINTER pMpi2EthernetPage1_t; 3122265236Sken 3123265236Sken#define MPI2_ETHERNETPAGE1_PAGEVERSION (0x00) 3124265236Sken 3125265236Sken/* values for Ethernet Page 1 Flags field */ 3126265236Sken#define MPI2_ETHPG1_FLAG_SET_DEFAULT_IF (0x00000100) 3127265236Sken#define MPI2_ETHPG1_FLAG_ENABLE_FW_DOWNLOAD (0x00000080) 3128265236Sken#define MPI2_ETHPG1_FLAG_ENABLE_TELNET (0x00000040) 3129265236Sken#define MPI2_ETHPG1_FLAG_ENABLE_SSH2 (0x00000020) 3130265236Sken#define MPI2_ETHPG1_FLAG_ENABLE_DHCP_CLIENT (0x00000010) 3131265236Sken#define MPI2_ETHPG1_FLAG_ENABLE_IPV6 (0x00000008) 3132265236Sken#define MPI2_ETHPG1_FLAG_ENABLE_IPV4 (0x00000004) 3133265236Sken#define MPI2_ETHPG1_FLAG_USE_IPV6_ADDRESSES (0x00000002) 3134265236Sken#define MPI2_ETHPG1_FLAG_ENABLE_ETH_IF (0x00000001) 3135265236Sken 3136265236Sken/* values for Ethernet Page 1 MediaState field */ 3137265236Sken#define MPI2_ETHPG1_MS_DUPLEX_MASK (0x80) 3138265236Sken#define MPI2_ETHPG1_MS_HALF_DUPLEX (0x00) 3139265236Sken#define MPI2_ETHPG1_MS_FULL_DUPLEX (0x80) 3140265236Sken 3141265236Sken#define MPI2_ETHPG1_MS_DATA_RATE_MASK (0x07) 3142265236Sken#define MPI2_ETHPG1_MS_DATA_RATE_AUTO (0x00) 3143265236Sken#define MPI2_ETHPG1_MS_DATA_RATE_10MBIT (0x01) 3144265236Sken#define MPI2_ETHPG1_MS_DATA_RATE_100MBIT (0x02) 3145265236Sken#define MPI2_ETHPG1_MS_DATA_RATE_1GBIT (0x03) 3146265236Sken 3147265236Sken 3148265236Sken/**************************************************************************** 3149265236Sken* Extended Manufacturing Config Pages 3150265236Sken****************************************************************************/ 3151265236Sken 3152265236Sken/* 3153265236Sken * Generic structure to use for product-specific extended manufacturing pages 3154265236Sken * (currently Extended Manufacturing Page 40 through Extended Manufacturing 3155265236Sken * Page 60). 3156265236Sken */ 3157265236Sken 3158265236Skentypedef struct _MPI2_CONFIG_PAGE_EXT_MAN_PS 3159265236Sken{ 3160265236Sken MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ 3161265236Sken U32 ProductSpecificInfo; /* 0x08 */ 3162265236Sken} MPI2_CONFIG_PAGE_EXT_MAN_PS, 3163265236Sken MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXT_MAN_PS, 3164265236Sken Mpi2ExtManufacturingPagePS_t, MPI2_POINTER pMpi2ExtManufacturingPagePS_t; 3165265236Sken 3166265236Sken/* PageVersion should be provided by product-specific code */ 3167265236Sken 3168265236Sken#endif 3169265236Sken 3170