1/*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26/*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53#ifndef _MFIVAR_H 54#define _MFIVAR_H 55 56#include <sys/cdefs.h> 57__FBSDID("$FreeBSD$"); 58 59#include <sys/lock.h> 60#include <sys/sx.h> 61 62#include <sys/types.h> 63#include <sys/taskqueue.h> 64#include "opt_mfi.h" 65 66/* 67 * SCSI structures and definitions are used from here, but no linking 68 * requirements are made to CAM. 69 */ 70#include <cam/scsi/scsi_all.h> 71 72struct mfi_hwcomms { 73 uint32_t hw_pi; 74 uint32_t hw_ci; 75 uint32_t hw_reply_q[1]; 76}; 77#define MEGASAS_MAX_NAME 32 78#define MEGASAS_VERSION "4.23" 79 80struct mfi_softc; 81struct disk; 82struct ccb_hdr; 83 84struct mfi_command { 85 TAILQ_ENTRY(mfi_command) cm_link; 86 time_t cm_timestamp; 87 struct mfi_softc *cm_sc; 88 union mfi_frame *cm_frame; 89 bus_addr_t cm_frame_busaddr; 90 struct mfi_sense *cm_sense; 91 bus_addr_t cm_sense_busaddr; 92 bus_dmamap_t cm_dmamap; 93 union mfi_sgl *cm_sg; 94 void *cm_data; 95 int cm_len; 96 int cm_stp_len; 97 int cm_total_frame_size; 98 int cm_extra_frames; 99 int cm_flags; 100#define MFI_CMD_MAPPED (1<<0) 101#define MFI_CMD_DATAIN (1<<1) 102#define MFI_CMD_DATAOUT (1<<2) 103#define MFI_CMD_COMPLETED (1<<3) 104#define MFI_CMD_POLLED (1<<4) 105#define MFI_CMD_SCSI (1<<5) 106#define MFI_CMD_CCB (1<<6) 107#define MFI_CMD_TBOLT (1<<7) 108#define MFI_ON_MFIQ_FREE (1<<8) 109#define MFI_ON_MFIQ_READY (1<<9) 110#define MFI_ON_MFIQ_BUSY (1<<10) 111#define MFI_ON_MFIQ_MASK (MFI_ON_MFIQ_FREE | MFI_ON_MFIQ_READY| \ 112 MFI_ON_MFIQ_BUSY) 113#define MFI_CMD_FLAGS_FMT "\20" \ 114 "\1MAPPED" \ 115 "\2DATAIN" \ 116 "\3DATAOUT" \ 117 "\4COMPLETED" \ 118 "\5POLLED" \ 119 "\6SCSI" \ 120 "\7TBOLT" \ 121 "\10Q_FREE" \ 122 "\11Q_READY" \ 123 "\12Q_BUSY" 124 uint8_t retry_for_fw_reset; 125 void (* cm_complete)(struct mfi_command *cm); 126 void *cm_private; 127 int cm_index; 128 int cm_error; 129}; 130 131struct mfi_disk { 132 TAILQ_ENTRY(mfi_disk) ld_link; 133 device_t ld_dev; 134 int ld_id; 135 int ld_unit; 136 struct mfi_softc *ld_controller; 137 struct mfi_ld_info *ld_info; 138 struct disk *ld_disk; 139 int ld_flags; 140#define MFI_DISK_FLAGS_OPEN 0x01 141#define MFI_DISK_FLAGS_DISABLED 0x02 142}; 143 144struct mfi_disk_pending { 145 TAILQ_ENTRY(mfi_disk_pending) ld_link; 146 int ld_id; 147}; 148 149struct mfi_system_pd { 150 TAILQ_ENTRY(mfi_system_pd) pd_link; 151 device_t pd_dev; 152 int pd_id; 153 int pd_unit; 154 struct mfi_softc *pd_controller; 155 struct mfi_pd_info *pd_info; 156 struct disk *pd_disk; 157 int pd_flags; 158}; 159 160struct mfi_system_pending { 161 TAILQ_ENTRY(mfi_system_pending) pd_link; 162 int pd_id; 163}; 164 165struct mfi_evt_queue_elm { 166 TAILQ_ENTRY(mfi_evt_queue_elm) link; 167 struct mfi_evt_detail detail; 168}; 169 170struct mfi_aen { 171 TAILQ_ENTRY(mfi_aen) aen_link; 172 struct proc *p; 173}; 174 175struct mfi_skinny_dma_info { 176 bus_dma_tag_t dmat[514]; 177 bus_dmamap_t dmamap[514]; 178 uint32_t mem[514]; 179 int noofmaps; 180}; 181 182struct megasas_sge 183{ 184 bus_addr_t phys_addr; 185 uint32_t length; 186}; 187 188struct mfi_cmd_tbolt; 189 190struct mfi_softc { 191 device_t mfi_dev; 192 int mfi_flags; 193#define MFI_FLAGS_SG64 (1<<0) 194#define MFI_FLAGS_QFRZN (1<<1) 195#define MFI_FLAGS_OPEN (1<<2) 196#define MFI_FLAGS_STOP (1<<3) 197#define MFI_FLAGS_1064R (1<<4) 198#define MFI_FLAGS_1078 (1<<5) 199#define MFI_FLAGS_GEN2 (1<<6) 200#define MFI_FLAGS_SKINNY (1<<7) 201#define MFI_FLAGS_TBOLT (1<<8) 202#define MFI_FLAGS_INVADER (1<<10) 203#define MFI_FLAGS_FURY (1<<11) 204 // Start: LSIP200113393 205 bus_dma_tag_t verbuf_h_dmat; 206 bus_dmamap_t verbuf_h_dmamap; 207 bus_addr_t verbuf_h_busaddr; 208 uint32_t *verbuf; 209 void *kbuff_arr[MAX_IOCTL_SGE]; 210 bus_dma_tag_t mfi_kbuff_arr_dmat[2]; 211 bus_dmamap_t mfi_kbuff_arr_dmamap[2]; 212 bus_addr_t mfi_kbuff_arr_busaddr[2]; 213 214 struct mfi_hwcomms *mfi_comms; 215 TAILQ_HEAD(,mfi_command) mfi_free; 216 TAILQ_HEAD(,mfi_command) mfi_ready; 217 TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy; 218 struct bio_queue_head mfi_bioq; 219 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 220 221 struct resource *mfi_regs_resource; 222 bus_space_handle_t mfi_bhandle; 223 bus_space_tag_t mfi_btag; 224 int mfi_regs_rid; 225 226 bus_dma_tag_t mfi_parent_dmat; 227 bus_dma_tag_t mfi_buffer_dmat; 228 229 bus_dma_tag_t mfi_comms_dmat; 230 bus_dmamap_t mfi_comms_dmamap; 231 bus_addr_t mfi_comms_busaddr; 232 233 bus_dma_tag_t mfi_frames_dmat; 234 bus_dmamap_t mfi_frames_dmamap; 235 bus_addr_t mfi_frames_busaddr; 236 union mfi_frame *mfi_frames; 237 238 bus_dma_tag_t mfi_tb_init_dmat; 239 bus_dmamap_t mfi_tb_init_dmamap; 240 bus_addr_t mfi_tb_init_busaddr; 241 bus_addr_t mfi_tb_ioc_init_busaddr; 242 union mfi_frame *mfi_tb_init; 243 244 TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue; 245 struct task mfi_evt_task; 246 struct task mfi_map_sync_task; 247 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 248 struct mfi_command *mfi_aen_cm; 249 struct mfi_command *mfi_skinny_cm; 250 struct mfi_command *mfi_map_sync_cm; 251 int cm_aen_abort; 252 int cm_map_abort; 253 uint32_t mfi_aen_triggered; 254 uint32_t mfi_poll_waiting; 255 uint32_t mfi_boot_seq_num; 256 struct selinfo mfi_select; 257 int mfi_delete_busy_volumes; 258 int mfi_keep_deleted_volumes; 259 int mfi_detaching; 260 261 bus_dma_tag_t mfi_sense_dmat; 262 bus_dmamap_t mfi_sense_dmamap; 263 bus_addr_t mfi_sense_busaddr; 264 struct mfi_sense *mfi_sense; 265 266 struct resource *mfi_irq; 267 void *mfi_intr; 268 int mfi_irq_rid; 269 270 struct intr_config_hook mfi_ich; 271 eventhandler_tag eh; 272 /* OCR flags */ 273 uint8_t adpreset; 274 uint8_t issuepend_done; 275 uint8_t disableOnlineCtrlReset; 276 uint32_t mfiStatus; 277 uint32_t last_seq_num; 278 uint32_t volatile hw_crit_error; 279 280 /* 281 * Allocation for the command array. Used as an indexable array to 282 * recover completed commands. 283 */ 284 struct mfi_command *mfi_commands; 285 /* 286 * How many commands the firmware can handle. Also how big the reply 287 * queue is, minus 1. 288 */ 289 int mfi_max_fw_cmds; 290 /* 291 * How many S/G elements we'll ever actually use 292 */ 293 int mfi_max_sge; 294 /* 295 * How many bytes a compound frame is, including all of the extra frames 296 * that are used for S/G elements. 297 */ 298 int mfi_cmd_size; 299 /* 300 * How large an S/G element is. Used to calculate the number of single 301 * frames in a command. 302 */ 303 int mfi_sge_size; 304 /* 305 * Max number of sectors that the firmware allows 306 */ 307 uint32_t mfi_max_io; 308 309 TAILQ_HEAD(,mfi_disk) mfi_ld_tqh; 310 TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh; 311 TAILQ_HEAD(,mfi_disk_pending) mfi_ld_pend_tqh; 312 TAILQ_HEAD(,mfi_system_pending) mfi_syspd_pend_tqh; 313 eventhandler_tag mfi_eh; 314 struct cdev *mfi_cdev; 315 316 TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq; 317 struct mfi_command * (* mfi_cam_start)(void *); 318 void (*mfi_cam_rescan_cb)(struct mfi_softc *, 319 uint32_t); 320 struct callout mfi_watchdog_callout; 321 struct mtx mfi_io_lock; 322 struct sx mfi_config_lock; 323 324 /* Controller type specific interfaces */ 325 void (*mfi_enable_intr)(struct mfi_softc *sc); 326 void (*mfi_disable_intr)(struct mfi_softc *sc); 327 int32_t (*mfi_read_fw_status)(struct mfi_softc *sc); 328 int (*mfi_check_clear_intr)(struct mfi_softc *sc); 329 void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add, 330 uint32_t frame_cnt); 331 int (*mfi_adp_reset)(struct mfi_softc *sc); 332 int (*mfi_adp_check_reset)(struct mfi_softc *sc); 333 void (*mfi_intr_ptr)(void *sc); 334 335 /* ThunderBolt */ 336 uint32_t mfi_tbolt; 337 uint32_t MFA_enabled; 338 /* Single Reply structure size */ 339 uint16_t reply_size; 340 /* Singler message size. */ 341 uint16_t raid_io_msg_size; 342 TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh; 343 /* ThunderBolt base contiguous memory mapping. */ 344 bus_dma_tag_t mfi_tb_dmat; 345 bus_dmamap_t mfi_tb_dmamap; 346 bus_addr_t mfi_tb_busaddr; 347 /* ThunderBolt Contiguous DMA memory Mapping */ 348 uint8_t * request_message_pool; 349 uint8_t * request_message_pool_align; 350 uint8_t * request_desc_pool; 351 bus_addr_t request_msg_busaddr; 352 bus_addr_t reply_frame_busaddr; 353 bus_addr_t sg_frame_busaddr; 354 /* ThunderBolt IOC Init Descriptor */ 355 bus_dma_tag_t mfi_tb_ioc_init_dmat; 356 bus_dmamap_t mfi_tb_ioc_init_dmamap; 357 uint8_t * mfi_tb_ioc_init_desc; 358 struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt; 359 /* Virtual address of reply Frame Pool */ 360 struct mfi_mpi2_reply_header* reply_frame_pool; 361 struct mfi_mpi2_reply_header* reply_frame_pool_align; 362 363 /* Last reply frame address */ 364 uint8_t * reply_pool_limit; 365 uint16_t last_reply_idx; 366 uint8_t max_SGEs_in_chain_message; 367 uint8_t max_SGEs_in_main_message; 368 uint8_t chain_offset_value_for_main_message; 369 uint8_t chain_offset_value_for_mpt_ptmsg; 370}; 371 372union desc_value { 373 uint64_t word; 374 struct { 375 uint32_t low; 376 uint32_t high; 377 }u; 378}; 379 380// TODO find the right definition 381#define XXX_MFI_CMD_OP_INIT2 0x9 382/* 383 * Request descriptor types 384 */ 385#define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7 386#define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1 387#define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1 388#define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14 389#define MFI_LOAD_BALANCE_FLAG 0x1 390#define MFI_DCMD_MBOX_PEND_FLAG 0x1 391 392//#define MR_PROT_INFO_TYPE_CONTROLLER 0x08 393#define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f 394#define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9 395#define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB 396#define MEGASAS_SCSI_ADDL_CDB_LEN 0x18 397#define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20 398#define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60 399#define MEGASAS_EEDPBLOCKSIZE 512 400struct mfi_cmd_tbolt { 401 union mfi_mpi2_request_descriptor *request_desc; 402 struct mfi_mpi2_request_raid_scsi_io *io_request; 403 bus_addr_t io_request_phys_addr; 404 bus_addr_t sg_frame_phys_addr; 405 bus_addr_t sense_phys_addr; 406 MPI2_SGE_IO_UNION *sg_frame; 407 uint8_t *sense; 408 TAILQ_ENTRY(mfi_cmd_tbolt) next; 409 /* 410 * Context for a MFI frame. 411 * Used to get the mfi cmd from list when a MFI cmd is completed 412 */ 413 uint32_t sync_cmd_idx; 414 uint16_t index; 415 uint8_t status; 416}; 417 418extern int mfi_attach(struct mfi_softc *); 419extern void mfi_free(struct mfi_softc *); 420extern int mfi_shutdown(struct mfi_softc *); 421extern void mfi_startio(struct mfi_softc *); 422extern void mfi_disk_complete(struct bio *); 423extern int mfi_disk_disable(struct mfi_disk *); 424extern void mfi_disk_enable(struct mfi_disk *); 425extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 426extern int mfi_syspd_disable(struct mfi_system_pd *); 427extern void mfi_syspd_enable(struct mfi_system_pd *); 428extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *, 429 int); 430extern int mfi_transition_firmware(struct mfi_softc *sc); 431extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start); 432extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm); 433extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm); 434extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm); 435extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *); 436extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *); 437extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *); 438extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *); 439extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t); 440extern void mfi_tbolt_init_globals(struct mfi_softc*); 441extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *); 442extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t); 443extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *); 444extern void mfi_intr_tbolt(void *arg); 445extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc); 446extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm); 447extern int mfi_tbolt_adp_reset(struct mfi_softc *sc); 448extern int mfi_tbolt_reset(struct mfi_softc *sc); 449extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc); 450extern void mfi_handle_map_sync(void *context, int pending); 451extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **, 452 uint32_t, void **, size_t); 453extern int mfi_build_cdb(int, uint8_t, u_int64_t, u_int32_t, uint8_t *); 454 455#define MFIQ_ADD(sc, qname) \ 456 do { \ 457 struct mfi_qstat *qs; \ 458 \ 459 qs = &(sc)->mfi_qstat[qname]; \ 460 qs->q_length++; \ 461 if (qs->q_length > qs->q_max) \ 462 qs->q_max = qs->q_length; \ 463 } while (0) 464 465#define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 466 467#define MFIQ_INIT(sc, qname) \ 468 do { \ 469 sc->mfi_qstat[qname].q_length = 0; \ 470 sc->mfi_qstat[qname].q_max = 0; \ 471 } while (0) 472 473#define MFIQ_COMMAND_QUEUE(name, index) \ 474 static __inline void \ 475 mfi_initq_ ## name (struct mfi_softc *sc) \ 476 { \ 477 TAILQ_INIT(&sc->mfi_ ## name); \ 478 MFIQ_INIT(sc, index); \ 479 } \ 480 static __inline void \ 481 mfi_enqueue_ ## name (struct mfi_command *cm) \ 482 { \ 483 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 484 panic("command %p is on another queue, " \ 485 "flags = %#x\n", cm, cm->cm_flags); \ 486 } \ 487 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 488 cm->cm_flags |= MFI_ON_ ## index; \ 489 MFIQ_ADD(cm->cm_sc, index); \ 490 } \ 491 static __inline void \ 492 mfi_requeue_ ## name (struct mfi_command *cm) \ 493 { \ 494 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 495 panic("command %p is on another queue, " \ 496 "flags = %#x\n", cm, cm->cm_flags); \ 497 } \ 498 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 499 cm->cm_flags |= MFI_ON_ ## index; \ 500 MFIQ_ADD(cm->cm_sc, index); \ 501 } \ 502 static __inline struct mfi_command * \ 503 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 504 { \ 505 struct mfi_command *cm; \ 506 \ 507 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 508 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 509 panic("command %p not in queue, " \ 510 "flags = %#x, bit = %#x\n", cm, \ 511 cm->cm_flags, MFI_ON_ ## index); \ 512 } \ 513 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 514 cm->cm_flags &= ~MFI_ON_ ## index; \ 515 MFIQ_REMOVE(sc, index); \ 516 } \ 517 return (cm); \ 518 } \ 519 static __inline void \ 520 mfi_remove_ ## name (struct mfi_command *cm) \ 521 { \ 522 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 523 panic("command %p not in queue, flags = %#x, " \ 524 "bit = %#x\n", cm, cm->cm_flags, \ 525 MFI_ON_ ## index); \ 526 } \ 527 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 528 cm->cm_flags &= ~MFI_ON_ ## index; \ 529 MFIQ_REMOVE(cm->cm_sc, index); \ 530 } \ 531struct hack 532 533MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 534MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 535MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 536 537static __inline void 538mfi_initq_bio(struct mfi_softc *sc) 539{ 540 bioq_init(&sc->mfi_bioq); 541 MFIQ_INIT(sc, MFIQ_BIO); 542} 543 544static __inline void 545mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 546{ 547 bioq_insert_tail(&sc->mfi_bioq, bp); 548 MFIQ_ADD(sc, MFIQ_BIO); 549} 550 551static __inline struct bio * 552mfi_dequeue_bio(struct mfi_softc *sc) 553{ 554 struct bio *bp; 555 556 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 557 bioq_remove(&sc->mfi_bioq, bp); 558 MFIQ_REMOVE(sc, MFIQ_BIO); 559 } 560 return (bp); 561} 562 563/* 564 * This is from the original scsi_extract_sense() in CAM. It's copied 565 * here because CAM now uses a non-inline version that follows more complex 566 * additions to the SPC spec, and we don't want to force a dependency on 567 * the CAM module for such a trivial action. 568 */ 569static __inline void 570mfi_extract_sense(struct scsi_sense_data_fixed *sense, 571 int *error_code, int *sense_key, int *asc, int *ascq) 572{ 573 574 *error_code = sense->error_code & SSD_ERRCODE; 575 *sense_key = sense->flags & SSD_KEY; 576 *asc = (sense->extra_len >= 5) ? sense->add_sense_code : 0; 577 *ascq = (sense->extra_len >= 6) ? sense->add_sense_code_qual : 0; 578} 579 580static __inline void 581mfi_print_sense(struct mfi_softc *sc, void *sense) 582{ 583 int error, key, asc, ascq; 584 585 mfi_extract_sense((struct scsi_sense_data_fixed *)sense, 586 &error, &key, &asc, &ascq); 587 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 588 "asc %d, ascq %d\n", error, key, asc, ascq); 589} 590 591 592#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 593 sc->mfi_bhandle, (reg), (val)) 594#define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 595 (sc)->mfi_bhandle, (reg)) 596#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 597 sc->mfi_bhandle, (reg), (val)) 598#define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 599 (sc)->mfi_bhandle, (reg)) 600#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 601 sc->mfi_bhandle, (reg), (val)) 602#define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 603 (sc)->mfi_bhandle, (reg)) 604 605MALLOC_DECLARE(M_MFIBUF); 606SYSCTL_DECL(_hw_mfi); 607 608#define MFI_RESET_WAIT_TIME 180 609#define MFI_CMD_TIMEOUT 30 610#define MFI_SYS_PD_IO 0 611#define MFI_LD_IO 1 612#define MFI_SKINNY_MEMORY 0x02000000 613#define MFI_MAXPHYS (128 * 1024) 614 615#ifdef MFI_DEBUG 616extern void mfi_print_cmd(struct mfi_command *cm); 617extern void mfi_dump_cmds(struct mfi_softc *sc); 618extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, 619 const char *, int); 620#define MFI_PRINT_CMD(cm) mfi_print_cmd(cm) 621#define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc) 622#define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__) 623#else 624#define MFI_PRINT_CMD(cm) 625#define MFI_DUMP_CMDS(sc) 626#define MFI_VALIDATE_CMD(sc, cm) 627#endif 628 629extern void mfi_release_command(struct mfi_command *); 630extern void mfi_tbolt_return_cmd(struct mfi_softc *, 631 struct mfi_cmd_tbolt *, struct mfi_command *); 632 633#endif /* _MFIVAR_H */ 634