1/****************************************************************************** 2 3 Copyright (c) 2001-2013, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD$*/ 34 35 36#include "ixgbe_api.h" 37#include "ixgbe_type.h" 38#include "ixgbe_vf.h" 39 40#ifndef IXGBE_VFWRITE_REG 41#define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 42#endif 43#ifndef IXGBE_VFREAD_REG 44#define IXGBE_VFREAD_REG IXGBE_READ_REG 45#endif 46 47/** 48 * ixgbe_init_ops_vf - Initialize the pointers for vf 49 * @hw: pointer to hardware structure 50 * 51 * This will assign function pointers, adapter-specific functions can 52 * override the assignment of generic function pointers by assigning 53 * their own adapter-specific function pointers. 54 * Does not touch the hardware. 55 **/ 56s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 57{ 58 /* MAC */ 59 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 60 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 61 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 62 /* Cannot clear stats on VF */ 63 hw->mac.ops.clear_hw_cntrs = NULL; 64 hw->mac.ops.get_media_type = NULL; 65 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 66 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 67 hw->mac.ops.get_bus_info = NULL; 68 69 /* Link */ 70 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 71 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 72 hw->mac.ops.get_link_capabilities = NULL; 73 74 /* RAR, Multicast, VLAN */ 75 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 76 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 77 hw->mac.ops.init_rx_addrs = NULL; 78 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 79 hw->mac.ops.enable_mc = NULL; 80 hw->mac.ops.disable_mc = NULL; 81 hw->mac.ops.clear_vfta = NULL; 82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 83 84 hw->mac.max_tx_queues = 1; 85 hw->mac.max_rx_queues = 1; 86 87 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 88 89 return IXGBE_SUCCESS; 90} 91 92/** 93 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 94 * @hw: pointer to hardware structure 95 * 96 * Starts the hardware by filling the bus info structure and media type, clears 97 * all on chip counters, initializes receive address registers, multicast 98 * table, VLAN filter table, calls routine to set up link and flow control 99 * settings, and leaves transmit and receive units disabled and uninitialized 100 **/ 101s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 102{ 103 /* Clear adapter stopped flag */ 104 hw->adapter_stopped = FALSE; 105 106 return IXGBE_SUCCESS; 107} 108 109/** 110 * ixgbe_init_hw_vf - virtual function hardware initialization 111 * @hw: pointer to hardware structure 112 * 113 * Initialize the hardware by resetting the hardware and then starting 114 * the hardware 115 **/ 116s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 117{ 118 s32 status = hw->mac.ops.start_hw(hw); 119 120 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 121 122 return status; 123} 124 125/** 126 * ixgbe_reset_hw_vf - Performs hardware reset 127 * @hw: pointer to hardware structure 128 * 129 * Resets the hardware by reseting the transmit and receive units, masks and 130 * clears all interrupts. 131 **/ 132s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 133{ 134 struct ixgbe_mbx_info *mbx = &hw->mbx; 135 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 136 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 137 u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 138 u8 *addr = (u8 *)(&msgbuf[1]); 139 140 DEBUGFUNC("ixgbevf_reset_hw_vf"); 141 142 /* Call adapter stop to disable tx/rx and clear interrupts */ 143 hw->mac.ops.stop_adapter(hw); 144 145 146 DEBUGOUT("Issuing a function level reset to MAC\n"); 147 148 ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL) | IXGBE_CTRL_RST; 149 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, ctrl); 150 IXGBE_WRITE_FLUSH(hw); 151 152 msec_delay(50); 153 154 /* we cannot reset while the RSTI / RSTD bits are asserted */ 155 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 156 timeout--; 157 usec_delay(5); 158 } 159 160 if (!timeout) 161 return IXGBE_ERR_RESET_FAILED; 162 163 /* mailbox timeout can now become active */ 164 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 165 166 msgbuf[0] = IXGBE_VF_RESET; 167 mbx->ops.write_posted(hw, msgbuf, 1, 0); 168 169 msec_delay(10); 170 171 /* 172 * set our "perm_addr" based on info provided by PF 173 * also set up the mc_filter_type which is piggy backed 174 * on the mac address in word 3 175 */ 176 ret_val = mbx->ops.read_posted(hw, msgbuf, 177 IXGBE_VF_PERMADDR_MSG_LEN, 0); 178 if (ret_val) 179 return ret_val; 180 181 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 182 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 183 return IXGBE_ERR_INVALID_MAC_ADDR; 184 185 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 186 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 187 188 return ret_val; 189} 190 191/** 192 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 193 * @hw: pointer to hardware structure 194 * 195 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 196 * disables transmit and receive units. The adapter_stopped flag is used by 197 * the shared code and drivers to determine if the adapter is in a stopped 198 * state and should not touch the hardware. 199 **/ 200s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 201{ 202 u32 reg_val; 203 u16 i; 204 205 /* 206 * Set the adapter_stopped flag so other driver functions stop touching 207 * the hardware 208 */ 209 hw->adapter_stopped = TRUE; 210 211 /* Clear interrupt mask to stop from interrupts being generated */ 212 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 213 214 /* Clear any pending interrupts, flush previous writes */ 215 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 216 217 /* Disable the transmit unit. Each queue must be disabled. */ 218 for (i = 0; i < hw->mac.max_tx_queues; i++) 219 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 220 221 /* Disable the receive unit by stopping each queue */ 222 for (i = 0; i < hw->mac.max_rx_queues; i++) { 223 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 224 reg_val &= ~IXGBE_RXDCTL_ENABLE; 225 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 226 } 227 228 /* flush all queues disables */ 229 IXGBE_WRITE_FLUSH(hw); 230 msec_delay(2); 231 232 return IXGBE_SUCCESS; 233} 234 235/** 236 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 237 * @hw: pointer to hardware structure 238 * @mc_addr: the multicast address 239 * 240 * Extracts the 12 bits, from a multicast address, to determine which 241 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 242 * incoming rx multicast addresses, to determine the bit-vector to check in 243 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 244 * by the MO field of the MCSTCTRL. The MO field is set during initialization 245 * to mc_filter_type. 246 **/ 247static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 248{ 249 u32 vector = 0; 250 251 switch (hw->mac.mc_filter_type) { 252 case 0: /* use bits [47:36] of the address */ 253 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 254 break; 255 case 1: /* use bits [46:35] of the address */ 256 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 257 break; 258 case 2: /* use bits [45:34] of the address */ 259 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 260 break; 261 case 3: /* use bits [43:32] of the address */ 262 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 263 break; 264 default: /* Invalid mc_filter_type */ 265 DEBUGOUT("MC filter type param set incorrectly\n"); 266 ASSERT(0); 267 break; 268 } 269 270 /* vector can only be 12-bits or boundary will be exceeded */ 271 vector &= 0xFFF; 272 return vector; 273} 274 275static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, 276 u32 *msg, u16 size) 277{ 278 struct ixgbe_mbx_info *mbx = &hw->mbx; 279 u32 retmsg[IXGBE_VFMAILBOX_SIZE]; 280 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 281 282 if (!retval) 283 mbx->ops.read_posted(hw, retmsg, size, 0); 284} 285 286/** 287 * ixgbe_set_rar_vf - set device MAC address 288 * @hw: pointer to hardware structure 289 * @index: Receive address register to write 290 * @addr: Address to put into receive address register 291 * @vmdq: VMDq "set" or "pool" index 292 * @enable_addr: set flag that address is active 293 **/ 294s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 295 u32 enable_addr) 296{ 297 struct ixgbe_mbx_info *mbx = &hw->mbx; 298 u32 msgbuf[3]; 299 u8 *msg_addr = (u8 *)(&msgbuf[1]); 300 s32 ret_val; 301 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 302 303 memset(msgbuf, 0, 12); 304 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 305 memcpy(msg_addr, addr, 6); 306 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0); 307 308 if (!ret_val) 309 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0); 310 311 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 312 313 /* if nacked the address was rejected, use "perm_addr" */ 314 if (!ret_val && 315 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) 316 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 317 318 return ret_val; 319} 320 321/** 322 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 323 * @hw: pointer to the HW structure 324 * @mc_addr_list: array of multicast addresses to program 325 * @mc_addr_count: number of multicast addresses to program 326 * @next: caller supplied function to return next address in list 327 * 328 * Updates the Multicast Table Array. 329 **/ 330s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 331 u32 mc_addr_count, ixgbe_mc_addr_itr next, 332 bool clear) 333{ 334 struct ixgbe_mbx_info *mbx = &hw->mbx; 335 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 336 u16 *vector_list = (u16 *)&msgbuf[1]; 337 u32 vector; 338 u32 cnt, i; 339 u32 vmdq; 340 341 UNREFERENCED_1PARAMETER(clear); 342 343 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 344 345 /* Each entry in the list uses 1 16 bit word. We have 30 346 * 16 bit words available in our HW msg buffer (minus 1 for the 347 * msg type). That's 30 hash values if we pack 'em right. If 348 * there are more than 30 MC addresses to add then punt the 349 * extras for now and then add code to handle more than 30 later. 350 * It would be unusual for a server to request that many multi-cast 351 * addresses except for in large enterprise network environments. 352 */ 353 354 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 355 356 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 357 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 358 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 359 360 for (i = 0; i < cnt; i++) { 361 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 362 DEBUGOUT1("Hash value = 0x%03X\n", vector); 363 vector_list[i] = (u16)vector; 364 } 365 366 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 367} 368 369/** 370 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 371 * @hw: pointer to the HW structure 372 * @vlan: 12 bit VLAN ID 373 * @vind: unused by VF drivers 374 * @vlan_on: if TRUE then set bit, else clear bit 375 **/ 376s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 377{ 378 struct ixgbe_mbx_info *mbx = &hw->mbx; 379 u32 msgbuf[2]; 380 s32 ret_val; 381 UNREFERENCED_1PARAMETER(vind); 382 383 msgbuf[0] = IXGBE_VF_SET_VLAN; 384 msgbuf[1] = vlan; 385 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 386 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 387 388 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0); 389 if (!ret_val) 390 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0); 391 392 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 393 return IXGBE_SUCCESS; 394 395 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 396} 397 398/** 399 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 400 * @hw: pointer to hardware structure 401 * 402 * Returns the number of transmit queues for the given adapter. 403 **/ 404u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 405{ 406 UNREFERENCED_1PARAMETER(hw); 407 return IXGBE_VF_MAX_TX_QUEUES; 408} 409 410/** 411 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 412 * @hw: pointer to hardware structure 413 * 414 * Returns the number of receive queues for the given adapter. 415 **/ 416u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 417{ 418 UNREFERENCED_1PARAMETER(hw); 419 return IXGBE_VF_MAX_RX_QUEUES; 420} 421 422/** 423 * ixgbe_get_mac_addr_vf - Read device MAC address 424 * @hw: pointer to the HW structure 425 **/ 426s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 427{ 428 int i; 429 430 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 431 mac_addr[i] = hw->mac.perm_addr[i]; 432 433 return IXGBE_SUCCESS; 434} 435 436s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 437{ 438 struct ixgbe_mbx_info *mbx = &hw->mbx; 439 u32 msgbuf[3]; 440 u8 *msg_addr = (u8 *)(&msgbuf[1]); 441 s32 ret_val; 442 443 memset(msgbuf, 0, sizeof(msgbuf)); 444 /* 445 * If index is one then this is the start of a new list and needs 446 * indication to the PF so it can do it's own list management. 447 * If it is zero then that tells the PF to just clear all of 448 * this VF's macvlans and there is no new list. 449 */ 450 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 451 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 452 if (addr) 453 memcpy(msg_addr, addr, 6); 454 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0); 455 456 if (!ret_val) 457 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0); 458 459 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 460 461 if (!ret_val) 462 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK)) 463 ret_val = IXGBE_ERR_OUT_OF_MEM; 464 465 return ret_val; 466} 467 468/** 469 * ixgbe_setup_mac_link_vf - Setup MAC link settings 470 * @hw: pointer to hardware structure 471 * @speed: new link speed 472 * @autoneg: TRUE if autonegotiation enabled 473 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 474 * 475 * Set the link speed in the AUTOC register and restarts link. 476 **/ 477s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 478 bool autoneg_wait_to_complete) 479{ 480 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 481 return IXGBE_SUCCESS; 482} 483 484/** 485 * ixgbe_check_mac_link_vf - Get link/speed status 486 * @hw: pointer to hardware structure 487 * @speed: pointer to link speed 488 * @link_up: TRUE is link is up, FALSE otherwise 489 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 490 * 491 * Reads the links register to determine if link is up and the current speed 492 **/ 493s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 494 bool *link_up, bool autoneg_wait_to_complete) 495{ 496 struct ixgbe_mbx_info *mbx = &hw->mbx; 497 struct ixgbe_mac_info *mac = &hw->mac; 498 s32 ret_val = IXGBE_SUCCESS; 499 u32 links_reg; 500 u32 in_msg = 0; 501 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 502 503 /* If we were hit with a reset drop the link */ 504 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 505 mac->get_link_status = TRUE; 506 507 if (!mac->get_link_status) 508 goto out; 509 510 /* if link status is down no point in checking to see if pf is up */ 511 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 512 if (!(links_reg & IXGBE_LINKS_UP)) 513 goto out; 514 515 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 516 case IXGBE_LINKS_SPEED_10G_82599: 517 *speed = IXGBE_LINK_SPEED_10GB_FULL; 518 break; 519 case IXGBE_LINKS_SPEED_1G_82599: 520 *speed = IXGBE_LINK_SPEED_1GB_FULL; 521 break; 522 case IXGBE_LINKS_SPEED_100_82599: 523 *speed = IXGBE_LINK_SPEED_100_FULL; 524 break; 525 } 526 527 /* if the read failed it could just be a mailbox collision, best wait 528 * until we are called again and don't report an error 529 */ 530 if (mbx->ops.read(hw, &in_msg, 1, 0)) 531 goto out; 532 533 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 534 /* msg is not CTS and is NACK we must have lost CTS status */ 535 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 536 ret_val = -1; 537 goto out; 538 } 539 540 /* the pf is talking, if we timed out in the past we reinit */ 541 if (!mbx->timeout) { 542 ret_val = -1; 543 goto out; 544 } 545 546 /* if we passed all the tests above then the link is up and we no 547 * longer need to check for link 548 */ 549 mac->get_link_status = FALSE; 550 551out: 552 *link_up = !mac->get_link_status; 553 return ret_val; 554} 555 556/** 557 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 558 * @hw: pointer to the HW structure 559 * @max_size: value to assign to max frame size 560 **/ 561void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 562{ 563 u32 msgbuf[2]; 564 565 msgbuf[0] = IXGBE_VF_SET_LPE; 566 msgbuf[1] = max_size; 567 ixgbevf_write_msg_read_ack(hw, msgbuf, 2); 568} 569 570/** 571 * ixgbevf_negotiate_api_version - Negotiate supported API version 572 * @hw: pointer to the HW structure 573 * @api: integer containing requested API version 574 **/ 575int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 576{ 577 int err; 578 u32 msg[3]; 579 580 /* Negotiate the mailbox API version */ 581 msg[0] = IXGBE_VF_API_NEGOTIATE; 582 msg[1] = api; 583 msg[2] = 0; 584 err = hw->mbx.ops.write_posted(hw, msg, 3, 0); 585 586 if (!err) 587 err = hw->mbx.ops.read_posted(hw, msg, 3, 0); 588 589 if (!err) { 590 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 591 592 /* Store value and return 0 on success */ 593 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 594 hw->api_version = api; 595 return 0; 596 } 597 598 err = IXGBE_ERR_INVALID_ARGUMENT; 599 } 600 601 return err; 602} 603 604int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 605 unsigned int *default_tc) 606{ 607 UNREFERENCED_3PARAMETER(hw, num_tcs, default_tc); 608 return IXGBE_SUCCESS; 609} 610 611