ixgbe.h revision 267654
167754Smsmith/******************************************************************************
267754Smsmith
367754Smsmith  Copyright (c) 2001-2013, Intel Corporation
467754Smsmith  All rights reserved.
567754Smsmith
667754Smsmith  Redistribution and use in source and binary forms, with or without
7217365Sjkim  modification, are permitted provided that the following conditions are met:
8217365Sjkim
970243Smsmith   1. Redistributions of source code must retain the above copyright notice,
1067754Smsmith      this list of conditions and the following disclaimer.
11217365Sjkim
12217365Sjkim   2. Redistributions in binary form must reproduce the above copyright
13217365Sjkim      notice, this list of conditions and the following disclaimer in the
14217365Sjkim      documentation and/or other materials provided with the distribution.
15217365Sjkim
16217365Sjkim   3. Neither the name of the Intel Corporation nor the names of its
17217365Sjkim      contributors may be used to endorse or promote products derived from
18217365Sjkim      this software without specific prior written permission.
19217365Sjkim
20217365Sjkim  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21217365Sjkim  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22217365Sjkim  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23217365Sjkim  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24217365Sjkim  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2567754Smsmith  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26217365Sjkim  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27217365Sjkim  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28217365Sjkim  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2967754Smsmith  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30217365Sjkim  POSSIBILITY OF SUCH DAMAGE.
31217365Sjkim
32217365Sjkim******************************************************************************/
33217365Sjkim/*$FreeBSD: releng/9.3/sys/dev/ixgbe/ixgbe.h 252898 2013-07-06 21:38:55Z jfv $*/
34217365Sjkim
35217365Sjkim
36217365Sjkim#ifndef _IXGBE_H_
37217365Sjkim#define _IXGBE_H_
38217365Sjkim
39217365Sjkim
40217365Sjkim#include <sys/param.h>
41217365Sjkim#include <sys/systm.h>
42217365Sjkim#ifndef IXGBE_LEGACY_TX
4367754Smsmith#include <sys/buf_ring.h>
4467754Smsmith#endif
4567754Smsmith#include <sys/mbuf.h>
4667754Smsmith#include <sys/protosw.h>
4780062Smsmith#include <sys/socket.h>
4867754Smsmith#include <sys/malloc.h>
49193267Sjkim#include <sys/kernel.h>
50167802Sjkim#include <sys/module.h>
51167802Sjkim#include <sys/sockio.h>
52123315Snjl
53167802Sjkim#include <net/if.h>
54167802Sjkim#include <net/if_arp.h>
55167802Sjkim#include <net/bpf.h>
56167802Sjkim#include <net/ethernet.h>
57167802Sjkim#include <net/if_dl.h>
58167802Sjkim#include <net/if_media.h>
59167802Sjkim
60167802Sjkim#include <net/bpf.h>
6167754Smsmith#include <net/if_types.h>
62167802Sjkim#include <net/if_vlan_var.h>
63193267Sjkim
64167802Sjkim#include <netinet/in_systm.h>
6567754Smsmith#include <netinet/in.h>
66193267Sjkim#include <netinet/if_ether.h>
6777424Smsmith#include <netinet/ip.h>
68193267Sjkim#include <netinet/ip6.h>
6991116Smsmith#include <netinet/tcp.h>
70193267Sjkim#include <netinet/tcp_lro.h>
71193267Sjkim#include <netinet/udp.h>
7291116Smsmith
73193267Sjkim#include <machine/in_cksum.h>
7491116Smsmith
7591116Smsmith#include <sys/bus.h>
76193267Sjkim#include <machine/bus.h>
7767754Smsmith#include <sys/rman.h>
7867754Smsmith#include <machine/resource.h>
7967754Smsmith#include <vm/vm.h>
8067754Smsmith#include <vm/pmap.h>
8167754Smsmith#include <machine/clock.h>
82117521Snjl#include <dev/pci/pcivar.h>
83117521Snjl#include <dev/pci/pcireg.h>
84117521Snjl#include <sys/proc.h>
85117521Snjl#include <sys/sysctl.h>
8667754Smsmith#include <sys/endian.h>
87117521Snjl#include <sys/taskqueue.h>
88117521Snjl#include <sys/pcpu.h>
89117521Snjl#include <sys/smp.h>
90117521Snjl#include <machine/smp.h>
91117521Snjl
92117521Snjl#include "ixgbe_api.h"
93193267Sjkim
94117521Snjl/* Tunables */
95117521Snjl
96193267Sjkim/*
97117521Snjl * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
98117521Snjl * number of transmit descriptors allocated by the driver. Increasing this
99117521Snjl * value allows the driver to queue more transmits. Each descriptor is 16
100193267Sjkim * bytes. Performance tests have show the 2K value to be optimal for top
101117521Snjl * performance.
102117521Snjl */
103117521Snjl#define DEFAULT_TXD	1024
104117521Snjl#define PERFORM_TXD	2048
105117521Snjl#define MAX_TXD		4096
106193267Sjkim#define MIN_TXD		64
107117521Snjl
108193267Sjkim/*
109117521Snjl * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
110117521Snjl * number of receive descriptors allocated for each RX queue. Increasing this
111117521Snjl * value allows the driver to buffer more incoming packets. Each descriptor
112117521Snjl * is 16 bytes.  A receive buffer is also allocated for each descriptor.
113193267Sjkim *
114117521Snjl * Note: with 8 rings and a dual port card, it is possible to bump up
115117521Snjl *	against the system mbuf pool limit, you can tune nmbclusters
116117521Snjl *	to adjust for this.
117117521Snjl */
118117521Snjl#define DEFAULT_RXD	1024
119117521Snjl#define PERFORM_RXD	2048
120117521Snjl#define MAX_RXD		4096
121193267Sjkim#define MIN_RXD		64
122117521Snjl
123193267Sjkim/* Alignment for rings */
124117521Snjl#define DBA_ALIGN	128
125193267Sjkim
126117521Snjl/*
127117521Snjl * This parameter controls the maximum no of times the driver will loop in
128117521Snjl * the isr. Minimum Value = 1
129117521Snjl */
130117521Snjl#define MAX_LOOP	10
131117521Snjl
132117521Snjl/*
13367754Smsmith * This is the max watchdog interval, ie. the time that can
13467754Smsmith * pass between any two TX clean operations, such only happening
135117521Snjl * when the TX hardware is functioning.
136117521Snjl */
137117521Snjl#define IXGBE_WATCHDOG                   (10 * hz)
138151937Sjkim
139117521Snjl/*
140117521Snjl * This parameters control when the driver calls the routine to reclaim
141117521Snjl * transmit descriptors.
142117521Snjl */
143117521Snjl#define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
144193267Sjkim#define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
145193267Sjkim
146193267Sjkim#define IXGBE_MAX_FRAME_SIZE	0x3F00
147117521Snjl
148117521Snjl/* Flow control constants */
149117521Snjl#define IXGBE_FC_PAUSE		0xFFFF
150193267Sjkim#define IXGBE_FC_HI		0x20000
151193267Sjkim#define IXGBE_FC_LO		0x10000
152193267Sjkim
153117521Snjl/*
154117521Snjl * Used for optimizing small rx mbufs.  Effort is made to keep the copy
155117521Snjl * small and aligned for the CPU L1 cache.
156193267Sjkim *
157193267Sjkim * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
158193267Sjkim * 32 byte alignment needed for the fast bcopy results in 8 bytes being
159117521Snjl * wasted.  Getting 64 byte alignment, which _should_ be ideal for
160117521Snjl * modern Intel CPUs, results in 40 bytes wasted and a significant drop
161117521Snjl * in observed efficiency of the optimization, 97.9% -> 81.8%.
162193267Sjkim */
163193267Sjkim#define IXGBE_RX_COPY_LEN	160
164193267Sjkim#define IXGBE_RX_COPY_ALIGN	(MHLEN - IXGBE_RX_COPY_LEN)
16567754Smsmith
16667754Smsmith/* Keep older OS drivers building... */
167117521Snjl#if !defined(SYSCTL_ADD_UQUAD)
16867754Smsmith#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
169193267Sjkim#endif
170117521Snjl
17167754Smsmith/* Defines for printing debug information */
172193267Sjkim#define DEBUG_INIT  0
173193267Sjkim#define DEBUG_IOCTL 0
17467754Smsmith#define DEBUG_HW    0
175117521Snjl
17677424Smsmith#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
177193267Sjkim#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
178117521Snjl#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
179193267Sjkim#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
180117521Snjl#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
181117521Snjl#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
182117521Snjl#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
183117521Snjl#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
184193267Sjkim#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
185117521Snjl
186117521Snjl#define MAX_NUM_MULTICAST_ADDRESSES     128
187117521Snjl#define IXGBE_82598_SCATTER		100
188193267Sjkim#define IXGBE_82599_SCATTER		32
189193267Sjkim#define MSIX_82598_BAR			3
190193267Sjkim#define MSIX_82599_BAR			4
191117521Snjl#define IXGBE_TSO_SIZE			262140
192117521Snjl#define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
193117521Snjl#define IXGBE_RX_HDR			128
194117521Snjl#define IXGBE_VFTA_SIZE			128
195117521Snjl#define IXGBE_BR_SIZE			4096
196117521Snjl#define IXGBE_QUEUE_MIN_FREE		32
197117521Snjl
19867754Smsmith/* IOCTL define to gather SFP+ Diagnostic data */
199117521Snjl#define SIOCGI2C	SIOCGIFGENERIC
20067754Smsmith
20167754Smsmith/* Offload bits in mbuf flag */
20267754Smsmith#if __FreeBSD_version >= 800000
20367754Smsmith#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
20467754Smsmith#else
205193267Sjkim#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP)
206193267Sjkim#endif
207193267Sjkim
20867754Smsmith/*
209193267Sjkim * Interrupt Moderation parameters
210193267Sjkim */
211193267Sjkim#define IXGBE_LOW_LATENCY	128
21267754Smsmith#define IXGBE_AVE_LATENCY	400
213193267Sjkim#define IXGBE_BULK_LATENCY	1200
214193267Sjkim#define IXGBE_LINK_ITR		2000
215193267Sjkim
21667754Smsmith
217193267Sjkim/*
218193267Sjkim *****************************************************************************
219193267Sjkim * vendor_info_array
22067754Smsmith *
221193267Sjkim * This array contains the list of Subvendor/Subdevice IDs on which the driver
222193267Sjkim * should load.
223193267Sjkim *
22467754Smsmith *****************************************************************************
225193267Sjkim */
226193267Sjkimtypedef struct _ixgbe_vendor_info_t {
227193267Sjkim	unsigned int    vendor_id;
22867754Smsmith	unsigned int    device_id;
22967754Smsmith	unsigned int    subvendor_id;
23067754Smsmith	unsigned int    subdevice_id;
23167754Smsmith	unsigned int    index;
232193267Sjkim} ixgbe_vendor_info_t;
233193267Sjkim
23467754Smsmith
235193267Sjkim/* This is used to get SFP+ module data */
236193267Sjkimstruct ixgbe_i2c_req {
237193267Sjkim        u8 dev_addr;
23867754Smsmith        u8 offset;
239193267Sjkim        u8 len;
24067754Smsmith        u8 data[8];
241193267Sjkim};
242193267Sjkim
243193267Sjkimstruct ixgbe_tx_buf {
24467754Smsmith	union ixgbe_adv_tx_desc	*eop;
245193267Sjkim	struct mbuf	*m_head;
246193267Sjkim	bus_dmamap_t	map;
247193267Sjkim};
24877424Smsmith
249167802Sjkimstruct ixgbe_rx_buf {
250167802Sjkim	struct mbuf	*buf;
25169450Smsmith	struct mbuf	*fmp;
252167802Sjkim	bus_dmamap_t	pmap;
253167802Sjkim	u_int		flags;
25477424Smsmith#define IXGBE_RX_COPY	0x01
25577424Smsmith	uint64_t	addr;
256193267Sjkim};
25777424Smsmith
258193267Sjkim/*
259167802Sjkim * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
26083174Smsmith */
26177424Smsmithstruct ixgbe_dma_alloc {
26277424Smsmith	bus_addr_t		dma_paddr;
26377424Smsmith	caddr_t			dma_vaddr;
26477424Smsmith	bus_dma_tag_t		dma_tag;
26577424Smsmith	bus_dmamap_t		dma_map;
266202771Sjkim	bus_dma_segment_t	dma_seg;
267202771Sjkim	bus_size_t		dma_size;
26877424Smsmith	int			dma_nseg;
26991116Smsmith};
27091116Smsmith
27191116Smsmith/*
27291116Smsmith** Driver queue struct: this is the interrupt container
27391116Smsmith**  for the associated tx and rx ring.
274167802Sjkim*/
275167802Sjkimstruct ix_queue {
27667754Smsmith	struct adapter		*adapter;
277193267Sjkim	u32			msix;           /* This queue's MSIX vector */
278193267Sjkim	u32			eims;           /* This queue's EIMS bit */
279193267Sjkim	u32			eitr_setting;
28067754Smsmith	struct resource		*res;
28191116Smsmith	void			*tag;
28267754Smsmith	struct tx_ring		*txr;
283167802Sjkim	struct rx_ring		*rxr;
284193267Sjkim	struct task		que_task;
28567754Smsmith	struct taskqueue	*tq;
28667754Smsmith	u64			irqs;
28767754Smsmith};
28867754Smsmith
289193267Sjkim/*
290193267Sjkim * The transmit ring, one per queue
291193267Sjkim */
29267754Smsmithstruct tx_ring {
293193267Sjkim        struct adapter		*adapter;
294193267Sjkim	struct mtx		tx_mtx;
29567754Smsmith	u32			me;
29667754Smsmith	int			watchdog_time;
29767754Smsmith	union ixgbe_adv_tx_desc	*tx_base;
29867754Smsmith	struct ixgbe_tx_buf	*tx_buffers;
29967754Smsmith	struct ixgbe_dma_alloc	txdma;
30067754Smsmith	volatile u16		tx_avail;
30167754Smsmith	u16			next_avail_desc;
30267754Smsmith	u16			next_to_clean;
30367754Smsmith	u16			process_limit;
30467754Smsmith	u16			num_desc;
30567754Smsmith	enum {
306193267Sjkim	    IXGBE_QUEUE_IDLE,
307193267Sjkim	    IXGBE_QUEUE_WORKING,
308193267Sjkim	    IXGBE_QUEUE_HUNG,
309193267Sjkim	}			queue_status;
310193267Sjkim	u32			txd_cmd;
31167754Smsmith	bus_dma_tag_t		txtag;
31267754Smsmith	char			mtx_name[16];
313193267Sjkim#ifndef IXGBE_LEGACY_TX
314193267Sjkim	struct buf_ring		*br;
315193267Sjkim	struct task		txq_task;
316193267Sjkim#endif
317193267Sjkim#ifdef IXGBE_FDIR
31867754Smsmith	u16			atr_sample;
31967754Smsmith	u16			atr_count;
32067754Smsmith#endif
32167754Smsmith	u32			bytes;  /* used for AIM */
32267754Smsmith	u32			packets;
323167802Sjkim	/* Soft Stats */
32467754Smsmith	unsigned long   	tso_tx;
325167802Sjkim	unsigned long   	no_tx_map_avail;
326167802Sjkim	unsigned long   	no_tx_dma_setup;
327167802Sjkim	u64			no_desc_avail;
328167802Sjkim	u64			total_packets;
329167802Sjkim};
330167802Sjkim
331212761Sjkim
332212761Sjkim/*
333197104Sjkim * The Receive ring, one per rx queue
334199337Sjkim */
33567754Smsmithstruct rx_ring {
33667754Smsmith        struct adapter		*adapter;
33767754Smsmith	struct mtx		rx_mtx;
338167802Sjkim	u32			me;
33967754Smsmith	union ixgbe_adv_rx_desc	*rx_base;
340193267Sjkim	struct ixgbe_dma_alloc	rxdma;
341193267Sjkim	struct lro_ctrl		lro;
342197104Sjkim	bool			lro_enabled;
343199337Sjkim	bool			hw_rsc;
34467754Smsmith	bool			discard;
345193267Sjkim	bool			vtag_strip;
346193267Sjkim        u16			next_to_refresh;
34767754Smsmith        u16 			next_to_check;
34867754Smsmith	u16			num_desc;
34967754Smsmith	u16			mbuf_sz;
350102550Siwasaki	u16			process_limit;
351151937Sjkim	char			mtx_name[16];
352151937Sjkim	struct ixgbe_rx_buf	*rx_buffers;
35367754Smsmith	bus_dma_tag_t		ptag;
354151937Sjkim
355151937Sjkim	u32			bytes; /* Used for AIM calc */
356193267Sjkim	u32			packets;
357193267Sjkim
358193267Sjkim	/* Soft stats */
359193267Sjkim	u64			rx_irq;
360193267Sjkim	u64			rx_copies;
361193267Sjkim	u64			rx_packets;
362151937Sjkim	u64 			rx_bytes;
363151937Sjkim	u64 			rx_discarded;
364151937Sjkim	u64 			rsc_num;
36567754Smsmith#ifdef IXGBE_FDIR
36667754Smsmith	u64			flm;
367193267Sjkim#endif
36867754Smsmith};
36967754Smsmith
370151937Sjkim/* Our adapter structure */
371151937Sjkimstruct adapter {
372151937Sjkim	struct ifnet		*ifp;
373151937Sjkim	struct ixgbe_hw		hw;
37467754Smsmith
37599679Siwasaki	struct ixgbe_osdep	osdep;
37699679Siwasaki	struct device		*dev;
37799679Siwasaki
37899679Siwasaki	struct resource		*pci_mem;
37999679Siwasaki	struct resource		*msix_mem;
38067754Smsmith
381151937Sjkim	/*
382151937Sjkim	 * Interrupt resources: this set is
383151937Sjkim	 * either used for legacy, or for Link
384151937Sjkim	 * when doing MSIX
385151937Sjkim	 */
386151937Sjkim	void			*tag;
387151937Sjkim	struct resource 	*res;
388151937Sjkim
389151937Sjkim	struct ifmedia		media;
390151937Sjkim	struct callout		timer;
391151937Sjkim	int			msix;
392151937Sjkim	int			if_flags;
393151937Sjkim
39467754Smsmith	struct mtx		core_mtx;
395151937Sjkim
396151937Sjkim	eventhandler_tag 	vlan_attach;
397151937Sjkim	eventhandler_tag 	vlan_detach;
398151937Sjkim
399151937Sjkim	u16			num_vlans;
400151937Sjkim	u16			num_queues;
401151937Sjkim
402151937Sjkim	/*
403151937Sjkim	** Shadow VFTA table, this is needed because
404202771Sjkim	** the real vlan filter table gets cleared during
405151937Sjkim	** a soft reset and the driver needs to be able
406151937Sjkim	** to repopulate it.
407151937Sjkim	*/
408151937Sjkim	u32			shadow_vfta[IXGBE_VFTA_SIZE];
409202771Sjkim
410151937Sjkim	/* Info about the interface */
411151937Sjkim	u32			optics;
412151937Sjkim	u32			fc; /* local flow ctrl setting */
413202771Sjkim	int			advertise;  /* link speeds */
414151937Sjkim	bool			link_active;
415151937Sjkim	u16			max_frame_size;
416151937Sjkim	u16			num_segs;
417151937Sjkim	u32			link_speed;
418151937Sjkim	bool			link_up;
419151937Sjkim	u32 			linkvec;
420151937Sjkim
421151937Sjkim	/* Mbuf cluster size */
422151937Sjkim	u32			rx_mbuf_sz;
423151937Sjkim
424202771Sjkim	/* Support for pluggable optics */
425151937Sjkim	bool			sfp_probe;
426151937Sjkim	struct task     	link_task;  /* Link tasklet */
427151937Sjkim	struct task     	mod_task;   /* SFP tasklet */
428151937Sjkim	struct task     	msf_task;   /* Multispeed Fiber */
429151937Sjkim#ifdef IXGBE_FDIR
430151937Sjkim	int			fdir_reinit;
431151937Sjkim	struct task     	fdir_task;
43267754Smsmith#endif
43367754Smsmith	struct taskqueue	*tq;
43491116Smsmith
43591116Smsmith	/*
43671867Smsmith	** Queues:
43767754Smsmith	**   This is the irq holder, it has
43867754Smsmith	**   and RX/TX pair or rings associated
439193267Sjkim	**   with it.
44067754Smsmith	*/
441193267Sjkim	struct ix_queue		*queues;
442193267Sjkim
443193267Sjkim	/*
444193267Sjkim	 * Transmit rings:
445193267Sjkim	 *	Allocated at run time, an array of rings.
44667754Smsmith	 */
44767754Smsmith	struct tx_ring		*tx_rings;
44867754Smsmith	u32			num_tx_desc;
44967754Smsmith
45067754Smsmith	/*
45167754Smsmith	 * Receive rings:
45291116Smsmith	 *	Allocated at run time, an array of rings.
45391116Smsmith	 */
45491116Smsmith	struct rx_ring		*rx_rings;
455193267Sjkim	u64			que_mask;
456193267Sjkim	u32			num_rx_desc;
457193267Sjkim
45891116Smsmith	/* Multicast array memory */
45991116Smsmith	u8			*mta;
46091116Smsmith
46191116Smsmith
46291116Smsmith	/* Misc stats maintained by the driver */
463193267Sjkim	unsigned long   	dropped_pkts;
464193267Sjkim	unsigned long   	mbuf_defrag_failed;
465193267Sjkim	unsigned long   	mbuf_header_failed;
466193267Sjkim	unsigned long   	mbuf_packet_failed;
467193267Sjkim	unsigned long   	watchdog_events;
46882367Smsmith	unsigned long		link_irq;
46982367Smsmith
47067754Smsmith	struct ixgbe_hw_stats 	stats;
47167754Smsmith};
47267754Smsmith
47367754Smsmith
474151937Sjkim/* Precision Time Sync (IEEE 1588) defines */
475151937Sjkim#define ETHERTYPE_IEEE1588      0x88F7
47667754Smsmith#define PICOSECS_PER_TICK       20833
47767754Smsmith#define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
478193267Sjkim#define IXGBE_ADVTXD_TSTAMP	0x00080000
47967754Smsmith
48067754Smsmith
48167754Smsmith#define IXGBE_CORE_LOCK_INIT(_sc, _name) \
48267754Smsmith        mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
483102550Siwasaki#define IXGBE_CORE_LOCK_DESTROY(_sc)      mtx_destroy(&(_sc)->core_mtx)
48467754Smsmith#define IXGBE_TX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->tx_mtx)
485102550Siwasaki#define IXGBE_RX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->rx_mtx)
48691116Smsmith#define IXGBE_CORE_LOCK(_sc)              mtx_lock(&(_sc)->core_mtx)
48767754Smsmith#define IXGBE_TX_LOCK(_sc)                mtx_lock(&(_sc)->tx_mtx)
48891116Smsmith#define IXGBE_TX_TRYLOCK(_sc)             mtx_trylock(&(_sc)->tx_mtx)
48967754Smsmith#define IXGBE_RX_LOCK(_sc)                mtx_lock(&(_sc)->rx_mtx)
49067754Smsmith#define IXGBE_CORE_UNLOCK(_sc)            mtx_unlock(&(_sc)->core_mtx)
49167754Smsmith#define IXGBE_TX_UNLOCK(_sc)              mtx_unlock(&(_sc)->tx_mtx)
49267754Smsmith#define IXGBE_RX_UNLOCK(_sc)              mtx_unlock(&(_sc)->rx_mtx)
493193267Sjkim#define IXGBE_CORE_LOCK_ASSERT(_sc)       mtx_assert(&(_sc)->core_mtx, MA_OWNED)
49467754Smsmith#define IXGBE_TX_LOCK_ASSERT(_sc)         mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
495193267Sjkim
49667754Smsmith/* For backward compatibility */
49780062Smsmith#if !defined(PCIER_LINK_STA)
49877424Smsmith#define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
49980062Smsmith#endif
50077424Smsmith
501193267Sjkimstatic inline bool
502193267Sjkimixgbe_is_sfp(struct ixgbe_hw *hw)
503167802Sjkim{
50482367Smsmith	switch (hw->phy.type) {
50580062Smsmith	case ixgbe_phy_sfp_avago:
50677424Smsmith	case ixgbe_phy_sfp_ftl:
50777424Smsmith	case ixgbe_phy_sfp_intel:
50880062Smsmith	case ixgbe_phy_sfp_unknown:
50980062Smsmith	case ixgbe_phy_sfp_passive_tyco:
510193267Sjkim	case ixgbe_phy_sfp_passive_unknown:
511193267Sjkim		return TRUE;
512193267Sjkim	default:
513167802Sjkim		return FALSE;
51480062Smsmith	}
51580062Smsmith}
51677424Smsmith
517193267Sjkim/* Workaround to make 8.0 buildable */
518193267Sjkim#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
519193267Sjkimstatic __inline int
520193267Sjkimdrbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
521193267Sjkim{
522193267Sjkim#ifdef ALTQ
523193267Sjkim        if (ALTQ_IS_ENABLED(&ifp->if_snd))
524193267Sjkim                return (1);
525193267Sjkim#endif
526193267Sjkim        return (!buf_ring_empty(br));
527193267Sjkim}
528193267Sjkim#endif
529193267Sjkim
530193267Sjkim/*
531193267Sjkim** Find the number of unrefreshed RX descriptors
532193267Sjkim*/
53367754Smsmithstatic inline u16
534ixgbe_rx_unrefreshed(struct rx_ring *rxr)
535{
536	if (rxr->next_to_check > rxr->next_to_refresh)
537		return (rxr->next_to_check - rxr->next_to_refresh - 1);
538	else
539		return ((rxr->num_desc + rxr->next_to_check) -
540		    rxr->next_to_refresh - 1);
541}
542
543#endif /* _IXGBE_H_ */
544