1/******************************************************************************
2
3  Copyright (c) 2001-2013, Intel Corporation
4  All rights reserved.
5
6  Redistribution and use in source and binary forms, with or without
7  modification, are permitted provided that the following conditions are met:
8
9   1. Redistributions of source code must retain the above copyright notice,
10      this list of conditions and the following disclaimer.
11
12   2. Redistributions in binary form must reproduce the above copyright
13      notice, this list of conditions and the following disclaimer in the
14      documentation and/or other materials provided with the distribution.
15
16   3. Neither the name of the Intel Corporation nor the names of its
17      contributors may be used to endorse or promote products derived from
18      this software without specific prior written permission.
19
20  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD$*/
34
35
36#ifndef _IXGBE_H_
37#define _IXGBE_H_
38
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#ifndef IXGBE_LEGACY_TX
43#include <sys/buf_ring.h>
44#endif
45#include <sys/mbuf.h>
46#include <sys/protosw.h>
47#include <sys/socket.h>
48#include <sys/malloc.h>
49#include <sys/kernel.h>
50#include <sys/module.h>
51#include <sys/sockio.h>
52
53#include <net/if.h>
54#include <net/if_arp.h>
55#include <net/bpf.h>
56#include <net/ethernet.h>
57#include <net/if_dl.h>
58#include <net/if_media.h>
59
60#include <net/bpf.h>
61#include <net/if_types.h>
62#include <net/if_vlan_var.h>
63
64#include <netinet/in_systm.h>
65#include <netinet/in.h>
66#include <netinet/if_ether.h>
67#include <netinet/ip.h>
68#include <netinet/ip6.h>
69#include <netinet/tcp.h>
70#include <netinet/tcp_lro.h>
71#include <netinet/udp.h>
72
73#include <machine/in_cksum.h>
74
75#include <sys/bus.h>
76#include <machine/bus.h>
77#include <sys/rman.h>
78#include <machine/resource.h>
79#include <vm/vm.h>
80#include <vm/pmap.h>
81#include <machine/clock.h>
82#include <dev/pci/pcivar.h>
83#include <dev/pci/pcireg.h>
84#include <sys/proc.h>
85#include <sys/sysctl.h>
86#include <sys/endian.h>
87#include <sys/taskqueue.h>
88#include <sys/pcpu.h>
89#include <sys/smp.h>
90#include <machine/smp.h>
91
92#include "ixgbe_api.h"
93
94/* Tunables */
95
96/*
97 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
98 * number of transmit descriptors allocated by the driver. Increasing this
99 * value allows the driver to queue more transmits. Each descriptor is 16
100 * bytes. Performance tests have show the 2K value to be optimal for top
101 * performance.
102 */
103#define DEFAULT_TXD	1024
104#define PERFORM_TXD	2048
105#define MAX_TXD		4096
106#define MIN_TXD		64
107
108/*
109 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
110 * number of receive descriptors allocated for each RX queue. Increasing this
111 * value allows the driver to buffer more incoming packets. Each descriptor
112 * is 16 bytes.  A receive buffer is also allocated for each descriptor.
113 *
114 * Note: with 8 rings and a dual port card, it is possible to bump up
115 *	against the system mbuf pool limit, you can tune nmbclusters
116 *	to adjust for this.
117 */
118#define DEFAULT_RXD	1024
119#define PERFORM_RXD	2048
120#define MAX_RXD		4096
121#define MIN_RXD		64
122
123/* Alignment for rings */
124#define DBA_ALIGN	128
125
126/*
127 * This parameter controls the maximum no of times the driver will loop in
128 * the isr. Minimum Value = 1
129 */
130#define MAX_LOOP	10
131
132/*
133 * This is the max watchdog interval, ie. the time that can
134 * pass between any two TX clean operations, such only happening
135 * when the TX hardware is functioning.
136 */
137#define IXGBE_WATCHDOG                   (10 * hz)
138
139/*
140 * This parameters control when the driver calls the routine to reclaim
141 * transmit descriptors.
142 */
143#define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
144#define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
145
146#define IXGBE_MAX_FRAME_SIZE	0x3F00
147
148/* Flow control constants */
149#define IXGBE_FC_PAUSE		0xFFFF
150#define IXGBE_FC_HI		0x20000
151#define IXGBE_FC_LO		0x10000
152
153/*
154 * Used for optimizing small rx mbufs.  Effort is made to keep the copy
155 * small and aligned for the CPU L1 cache.
156 *
157 * MHLEN is typically 168 bytes, giving us 8-byte alignment.  Getting
158 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
159 * wasted.  Getting 64 byte alignment, which _should_ be ideal for
160 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
161 * in observed efficiency of the optimization, 97.9% -> 81.8%.
162 */
163#define IXGBE_RX_COPY_LEN	160
164#define IXGBE_RX_COPY_ALIGN	(MHLEN - IXGBE_RX_COPY_LEN)
165
166/* Keep older OS drivers building... */
167#if !defined(SYSCTL_ADD_UQUAD)
168#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
169#endif
170
171/* Defines for printing debug information */
172#define DEBUG_INIT  0
173#define DEBUG_IOCTL 0
174#define DEBUG_HW    0
175
176#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
177#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
178#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
179#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
180#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
181#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
182#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
183#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
184#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
185
186#define MAX_NUM_MULTICAST_ADDRESSES     128
187#define IXGBE_82598_SCATTER		100
188#define IXGBE_82599_SCATTER		32
189#define MSIX_82598_BAR			3
190#define MSIX_82599_BAR			4
191#define IXGBE_TSO_SIZE			262140
192#define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
193#define IXGBE_RX_HDR			128
194#define IXGBE_VFTA_SIZE			128
195#define IXGBE_BR_SIZE			4096
196#define IXGBE_QUEUE_MIN_FREE		32
197
198/* IOCTL define to gather SFP+ Diagnostic data */
199#define SIOCGI2C	SIOCGIFGENERIC
200
201/* Offload bits in mbuf flag */
202#if __FreeBSD_version >= 800000
203#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
204#else
205#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP)
206#endif
207
208/*
209 * Interrupt Moderation parameters
210 */
211#define IXGBE_LOW_LATENCY	128
212#define IXGBE_AVE_LATENCY	400
213#define IXGBE_BULK_LATENCY	1200
214#define IXGBE_LINK_ITR		2000
215
216
217/*
218 *****************************************************************************
219 * vendor_info_array
220 *
221 * This array contains the list of Subvendor/Subdevice IDs on which the driver
222 * should load.
223 *
224 *****************************************************************************
225 */
226typedef struct _ixgbe_vendor_info_t {
227	unsigned int    vendor_id;
228	unsigned int    device_id;
229	unsigned int    subvendor_id;
230	unsigned int    subdevice_id;
231	unsigned int    index;
232} ixgbe_vendor_info_t;
233
234
235/* This is used to get SFP+ module data */
236struct ixgbe_i2c_req {
237        u8 dev_addr;
238        u8 offset;
239        u8 len;
240        u8 data[8];
241};
242
243struct ixgbe_tx_buf {
244	union ixgbe_adv_tx_desc	*eop;
245	struct mbuf	*m_head;
246	bus_dmamap_t	map;
247};
248
249struct ixgbe_rx_buf {
250	struct mbuf	*buf;
251	struct mbuf	*fmp;
252	bus_dmamap_t	pmap;
253	u_int		flags;
254#define IXGBE_RX_COPY	0x01
255	uint64_t	addr;
256};
257
258/*
259 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
260 */
261struct ixgbe_dma_alloc {
262	bus_addr_t		dma_paddr;
263	caddr_t			dma_vaddr;
264	bus_dma_tag_t		dma_tag;
265	bus_dmamap_t		dma_map;
266	bus_dma_segment_t	dma_seg;
267	bus_size_t		dma_size;
268	int			dma_nseg;
269};
270
271/*
272** Driver queue struct: this is the interrupt container
273**  for the associated tx and rx ring.
274*/
275struct ix_queue {
276	struct adapter		*adapter;
277	u32			msix;           /* This queue's MSIX vector */
278	u32			eims;           /* This queue's EIMS bit */
279	u32			eitr_setting;
280	struct resource		*res;
281	void			*tag;
282	struct tx_ring		*txr;
283	struct rx_ring		*rxr;
284	struct task		que_task;
285	struct taskqueue	*tq;
286	u64			irqs;
287};
288
289/*
290 * The transmit ring, one per queue
291 */
292struct tx_ring {
293        struct adapter		*adapter;
294	struct mtx		tx_mtx;
295	u32			me;
296	int			watchdog_time;
297	union ixgbe_adv_tx_desc	*tx_base;
298	struct ixgbe_tx_buf	*tx_buffers;
299	struct ixgbe_dma_alloc	txdma;
300	volatile u16		tx_avail;
301	u16			next_avail_desc;
302	u16			next_to_clean;
303	u16			process_limit;
304	u16			num_desc;
305	enum {
306	    IXGBE_QUEUE_IDLE,
307	    IXGBE_QUEUE_WORKING,
308	    IXGBE_QUEUE_HUNG,
309	}			queue_status;
310	u32			txd_cmd;
311	bus_dma_tag_t		txtag;
312	char			mtx_name[16];
313#ifndef IXGBE_LEGACY_TX
314	struct buf_ring		*br;
315	struct task		txq_task;
316#endif
317#ifdef IXGBE_FDIR
318	u16			atr_sample;
319	u16			atr_count;
320#endif
321	u32			bytes;  /* used for AIM */
322	u32			packets;
323	/* Soft Stats */
324	unsigned long   	tso_tx;
325	unsigned long   	no_tx_map_avail;
326	unsigned long   	no_tx_dma_setup;
327	u64			no_desc_avail;
328	u64			total_packets;
329};
330
331
332/*
333 * The Receive ring, one per rx queue
334 */
335struct rx_ring {
336        struct adapter		*adapter;
337	struct mtx		rx_mtx;
338	u32			me;
339	union ixgbe_adv_rx_desc	*rx_base;
340	struct ixgbe_dma_alloc	rxdma;
341	struct lro_ctrl		lro;
342	bool			lro_enabled;
343	bool			hw_rsc;
344	bool			discard;
345	bool			vtag_strip;
346        u16			next_to_refresh;
347        u16 			next_to_check;
348	u16			num_desc;
349	u16			mbuf_sz;
350	u16			process_limit;
351	char			mtx_name[16];
352	struct ixgbe_rx_buf	*rx_buffers;
353	bus_dma_tag_t		ptag;
354
355	u32			bytes; /* Used for AIM calc */
356	u32			packets;
357
358	/* Soft stats */
359	u64			rx_irq;
360	u64			rx_copies;
361	u64			rx_packets;
362	u64 			rx_bytes;
363	u64 			rx_discarded;
364	u64 			rsc_num;
365#ifdef IXGBE_FDIR
366	u64			flm;
367#endif
368};
369
370/* Our adapter structure */
371struct adapter {
372	struct ifnet		*ifp;
373	struct ixgbe_hw		hw;
374
375	struct ixgbe_osdep	osdep;
376	struct device		*dev;
377
378	struct resource		*pci_mem;
379	struct resource		*msix_mem;
380
381	/*
382	 * Interrupt resources: this set is
383	 * either used for legacy, or for Link
384	 * when doing MSIX
385	 */
386	void			*tag;
387	struct resource 	*res;
388
389	struct ifmedia		media;
390	struct callout		timer;
391	int			msix;
392	int			if_flags;
393
394	struct mtx		core_mtx;
395
396	eventhandler_tag 	vlan_attach;
397	eventhandler_tag 	vlan_detach;
398
399	u16			num_vlans;
400	u16			num_queues;
401
402	/*
403	** Shadow VFTA table, this is needed because
404	** the real vlan filter table gets cleared during
405	** a soft reset and the driver needs to be able
406	** to repopulate it.
407	*/
408	u32			shadow_vfta[IXGBE_VFTA_SIZE];
409
410	/* Info about the interface */
411	u32			optics;
412	u32			fc; /* local flow ctrl setting */
413	int			advertise;  /* link speeds */
414	bool			link_active;
415	u16			max_frame_size;
416	u16			num_segs;
417	u32			link_speed;
418	bool			link_up;
419	u32 			linkvec;
420
421	/* Mbuf cluster size */
422	u32			rx_mbuf_sz;
423
424	/* Support for pluggable optics */
425	bool			sfp_probe;
426	struct task     	link_task;  /* Link tasklet */
427	struct task     	mod_task;   /* SFP tasklet */
428	struct task     	msf_task;   /* Multispeed Fiber */
429#ifdef IXGBE_FDIR
430	int			fdir_reinit;
431	struct task     	fdir_task;
432#endif
433	struct taskqueue	*tq;
434
435	/*
436	** Queues:
437	**   This is the irq holder, it has
438	**   and RX/TX pair or rings associated
439	**   with it.
440	*/
441	struct ix_queue		*queues;
442
443	/*
444	 * Transmit rings:
445	 *	Allocated at run time, an array of rings.
446	 */
447	struct tx_ring		*tx_rings;
448	u32			num_tx_desc;
449
450	/*
451	 * Receive rings:
452	 *	Allocated at run time, an array of rings.
453	 */
454	struct rx_ring		*rx_rings;
455	u64			que_mask;
456	u32			num_rx_desc;
457
458	/* Multicast array memory */
459	u8			*mta;
460
461
462	/* Misc stats maintained by the driver */
463	unsigned long   	dropped_pkts;
464	unsigned long   	mbuf_defrag_failed;
465	unsigned long   	mbuf_header_failed;
466	unsigned long   	mbuf_packet_failed;
467	unsigned long   	watchdog_events;
468	unsigned long		link_irq;
469
470	struct ixgbe_hw_stats 	stats;
471};
472
473
474/* Precision Time Sync (IEEE 1588) defines */
475#define ETHERTYPE_IEEE1588      0x88F7
476#define PICOSECS_PER_TICK       20833
477#define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
478#define IXGBE_ADVTXD_TSTAMP	0x00080000
479
480
481#define IXGBE_CORE_LOCK_INIT(_sc, _name) \
482        mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
483#define IXGBE_CORE_LOCK_DESTROY(_sc)      mtx_destroy(&(_sc)->core_mtx)
484#define IXGBE_TX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->tx_mtx)
485#define IXGBE_RX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->rx_mtx)
486#define IXGBE_CORE_LOCK(_sc)              mtx_lock(&(_sc)->core_mtx)
487#define IXGBE_TX_LOCK(_sc)                mtx_lock(&(_sc)->tx_mtx)
488#define IXGBE_TX_TRYLOCK(_sc)             mtx_trylock(&(_sc)->tx_mtx)
489#define IXGBE_RX_LOCK(_sc)                mtx_lock(&(_sc)->rx_mtx)
490#define IXGBE_CORE_UNLOCK(_sc)            mtx_unlock(&(_sc)->core_mtx)
491#define IXGBE_TX_UNLOCK(_sc)              mtx_unlock(&(_sc)->tx_mtx)
492#define IXGBE_RX_UNLOCK(_sc)              mtx_unlock(&(_sc)->rx_mtx)
493#define IXGBE_CORE_LOCK_ASSERT(_sc)       mtx_assert(&(_sc)->core_mtx, MA_OWNED)
494#define IXGBE_TX_LOCK_ASSERT(_sc)         mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
495
496/* For backward compatibility */
497#if !defined(PCIER_LINK_STA)
498#define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
499#endif
500
501static inline bool
502ixgbe_is_sfp(struct ixgbe_hw *hw)
503{
504	switch (hw->phy.type) {
505	case ixgbe_phy_sfp_avago:
506	case ixgbe_phy_sfp_ftl:
507	case ixgbe_phy_sfp_intel:
508	case ixgbe_phy_sfp_unknown:
509	case ixgbe_phy_sfp_passive_tyco:
510	case ixgbe_phy_sfp_passive_unknown:
511		return TRUE;
512	default:
513		return FALSE;
514	}
515}
516
517/* Workaround to make 8.0 buildable */
518#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
519static __inline int
520drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
521{
522#ifdef ALTQ
523        if (ALTQ_IS_ENABLED(&ifp->if_snd))
524                return (1);
525#endif
526        return (!buf_ring_empty(br));
527}
528#endif
529
530/*
531** Find the number of unrefreshed RX descriptors
532*/
533static inline u16
534ixgbe_rx_unrefreshed(struct rx_ring *rxr)
535{
536	if (rxr->next_to_check > rxr->next_to_refresh)
537		return (rxr->next_to_check - rxr->next_to_refresh - 1);
538	else
539		return ((rxr->num_desc + rxr->next_to_check) -
540		    rxr->next_to_refresh - 1);
541}
542
543#endif /* _IXGBE_H_ */
544