ixgbe.h revision 248287
1/****************************************************************************** 2 3 Copyright (c) 2001-2012, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: stable/9/sys/dev/ixgbe/ixgbe.h 248287 2013-03-14 21:39:39Z jfv $*/ 34 35 36#ifndef _IXGBE_H_ 37#define _IXGBE_H_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#ifndef IXGBE_LEGACY_TX 43#include <sys/buf_ring.h> 44#endif 45#include <sys/mbuf.h> 46#include <sys/protosw.h> 47#include <sys/socket.h> 48#include <sys/malloc.h> 49#include <sys/kernel.h> 50#include <sys/module.h> 51#include <sys/sockio.h> 52 53#include <net/if.h> 54#include <net/if_arp.h> 55#include <net/bpf.h> 56#include <net/ethernet.h> 57#include <net/if_dl.h> 58#include <net/if_media.h> 59 60#include <net/bpf.h> 61#include <net/if_types.h> 62#include <net/if_vlan_var.h> 63 64#include <netinet/in_systm.h> 65#include <netinet/in.h> 66#include <netinet/if_ether.h> 67#include <netinet/ip.h> 68#include <netinet/ip6.h> 69#include <netinet/tcp.h> 70#include <netinet/tcp_lro.h> 71#include <netinet/udp.h> 72 73#include <machine/in_cksum.h> 74 75#include <sys/bus.h> 76#include <machine/bus.h> 77#include <sys/rman.h> 78#include <machine/resource.h> 79#include <vm/vm.h> 80#include <vm/pmap.h> 81#include <machine/clock.h> 82#include <dev/pci/pcivar.h> 83#include <dev/pci/pcireg.h> 84#include <sys/proc.h> 85#include <sys/sysctl.h> 86#include <sys/endian.h> 87#include <sys/taskqueue.h> 88#include <sys/pcpu.h> 89#include <sys/smp.h> 90#include <machine/smp.h> 91 92#include "ixgbe_api.h" 93 94/* Tunables */ 95 96/* 97 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 98 * number of transmit descriptors allocated by the driver. Increasing this 99 * value allows the driver to queue more transmits. Each descriptor is 16 100 * bytes. Performance tests have show the 2K value to be optimal for top 101 * performance. 102 */ 103#define DEFAULT_TXD 1024 104#define PERFORM_TXD 2048 105#define MAX_TXD 4096 106#define MIN_TXD 64 107 108/* 109 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 110 * number of receive descriptors allocated for each RX queue. Increasing this 111 * value allows the driver to buffer more incoming packets. Each descriptor 112 * is 16 bytes. A receive buffer is also allocated for each descriptor. 113 * 114 * Note: with 8 rings and a dual port card, it is possible to bump up 115 * against the system mbuf pool limit, you can tune nmbclusters 116 * to adjust for this. 117 */ 118#define DEFAULT_RXD 1024 119#define PERFORM_RXD 2048 120#define MAX_RXD 4096 121#define MIN_RXD 64 122 123/* Alignment for rings */ 124#define DBA_ALIGN 128 125 126/* 127 * This parameter controls the maximum no of times the driver will loop in 128 * the isr. Minimum Value = 1 129 */ 130#define MAX_LOOP 10 131 132/* 133 * This is the max watchdog interval, ie. the time that can 134 * pass between any two TX clean operations, such only happening 135 * when the TX hardware is functioning. 136 */ 137#define IXGBE_WATCHDOG (10 * hz) 138 139/* 140 * This parameters control when the driver calls the routine to reclaim 141 * transmit descriptors. 142 */ 143#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 144#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 145 146#define IXGBE_MAX_FRAME_SIZE 0x3F00 147 148/* Flow control constants */ 149#define IXGBE_FC_PAUSE 0xFFFF 150#define IXGBE_FC_HI 0x20000 151#define IXGBE_FC_LO 0x10000 152 153/* 154 * Used for optimizing small rx mbufs. Effort is made to keep the copy 155 * small and aligned for the CPU L1 cache. 156 * 157 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting 158 * 32 byte alignment needed for the fast bcopy results in 8 bytes being 159 * wasted. Getting 64 byte alignment, which _should_ be ideal for 160 * modern Intel CPUs, results in 40 bytes wasted and a significant drop 161 * in observed efficiency of the optimization, 97.9% -> 81.8%. 162 */ 163#define IXGBE_RX_COPY_LEN 160 164#define IXGBE_RX_COPY_ALIGN (MHLEN - IXGBE_RX_COPY_LEN) 165 166/* Keep older OS drivers building... */ 167#if !defined(SYSCTL_ADD_UQUAD) 168#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD 169#endif 170 171/* Defines for printing debug information */ 172#define DEBUG_INIT 0 173#define DEBUG_IOCTL 0 174#define DEBUG_HW 0 175 176#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 177#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 178#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 179#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 180#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 181#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 182#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 183#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 184#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 185 186#define MAX_NUM_MULTICAST_ADDRESSES 128 187#define IXGBE_82598_SCATTER 100 188#define IXGBE_82599_SCATTER 32 189#define MSIX_82598_BAR 3 190#define MSIX_82599_BAR 4 191#define IXGBE_TSO_SIZE 262140 192#define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 193#define IXGBE_RX_HDR 128 194#define IXGBE_VFTA_SIZE 128 195#define IXGBE_BR_SIZE 4096 196#define IXGBE_QUEUE_MIN_FREE 32 197 198/* IOCTL define to gather SFP+ Diagnostic data */ 199#define SIOCGI2C SIOCGIFGENERIC 200 201/* Offload bits in mbuf flag */ 202#if __FreeBSD_version >= 800000 203#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP) 204#else 205#define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP) 206#endif 207 208/* 209 * Interrupt Moderation parameters 210 */ 211#define IXGBE_LOW_LATENCY 128 212#define IXGBE_AVE_LATENCY 400 213#define IXGBE_BULK_LATENCY 1200 214#define IXGBE_LINK_ITR 2000 215 216/* 217 ***************************************************************************** 218 * vendor_info_array 219 * 220 * This array contains the list of Subvendor/Subdevice IDs on which the driver 221 * should load. 222 * 223 ***************************************************************************** 224 */ 225typedef struct _ixgbe_vendor_info_t { 226 unsigned int vendor_id; 227 unsigned int device_id; 228 unsigned int subvendor_id; 229 unsigned int subdevice_id; 230 unsigned int index; 231} ixgbe_vendor_info_t; 232 233/* This is used to get SFP+ module data */ 234struct ixgbe_i2c_req { 235 u8 dev_addr; 236 u8 offset; 237 u8 len; 238 u8 data[8]; 239}; 240 241struct ixgbe_tx_buf { 242 union ixgbe_adv_tx_desc *eop; 243 struct mbuf *m_head; 244 bus_dmamap_t map; 245}; 246 247struct ixgbe_rx_buf { 248 struct mbuf *buf; 249 struct mbuf *fmp; 250 bus_dmamap_t pmap; 251 u_int flags; 252#define IXGBE_RX_COPY 0x01 253 uint64_t addr; 254}; 255 256/* 257 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 258 */ 259struct ixgbe_dma_alloc { 260 bus_addr_t dma_paddr; 261 caddr_t dma_vaddr; 262 bus_dma_tag_t dma_tag; 263 bus_dmamap_t dma_map; 264 bus_dma_segment_t dma_seg; 265 bus_size_t dma_size; 266 int dma_nseg; 267}; 268 269/* 270** Driver queue struct: this is the interrupt container 271** for the associated tx and rx ring. 272*/ 273struct ix_queue { 274 struct adapter *adapter; 275 u32 msix; /* This queue's MSIX vector */ 276 u32 eims; /* This queue's EIMS bit */ 277 u32 eitr_setting; 278 struct resource *res; 279 void *tag; 280 struct tx_ring *txr; 281 struct rx_ring *rxr; 282 struct task que_task; 283 struct taskqueue *tq; 284 u64 irqs; 285}; 286 287/* 288 * The transmit ring, one per queue 289 */ 290struct tx_ring { 291 struct adapter *adapter; 292 struct mtx tx_mtx; 293 u32 me; 294 int watchdog_time; 295 union ixgbe_adv_tx_desc *tx_base; 296 struct ixgbe_tx_buf *tx_buffers; 297 struct ixgbe_dma_alloc txdma; 298 volatile u16 tx_avail; 299 u16 next_avail_desc; 300 u16 next_to_clean; 301 u16 process_limit; 302 u16 num_desc; 303 enum { 304 IXGBE_QUEUE_IDLE, 305 IXGBE_QUEUE_WORKING, 306 IXGBE_QUEUE_HUNG, 307 } queue_status; 308 u32 txd_cmd; 309 bus_dma_tag_t txtag; 310 char mtx_name[16]; 311#ifndef IXGBE_LEGACY_TX 312 struct buf_ring *br; 313 struct task txq_task; 314#endif 315#ifdef IXGBE_FDIR 316 u16 atr_sample; 317 u16 atr_count; 318#endif 319 u32 bytes; /* used for AIM */ 320 u32 packets; 321 /* Soft Stats */ 322 unsigned long tso_tx; 323 unsigned long no_tx_map_avail; 324 unsigned long no_tx_dma_setup; 325 u64 no_desc_avail; 326 u64 total_packets; 327}; 328 329 330/* 331 * The Receive ring, one per rx queue 332 */ 333struct rx_ring { 334 struct adapter *adapter; 335 struct mtx rx_mtx; 336 u32 me; 337 union ixgbe_adv_rx_desc *rx_base; 338 struct ixgbe_dma_alloc rxdma; 339 struct lro_ctrl lro; 340 bool lro_enabled; 341 bool hw_rsc; 342 bool discard; 343 bool vtag_strip; 344 u16 next_to_refresh; 345 u16 next_to_check; 346 u16 num_desc; 347 u16 mbuf_sz; 348 u16 process_limit; 349 char mtx_name[16]; 350 struct ixgbe_rx_buf *rx_buffers; 351 bus_dma_tag_t ptag; 352 353 u32 bytes; /* Used for AIM calc */ 354 u32 packets; 355 356 /* Soft stats */ 357 u64 rx_irq; 358 u64 rx_copies; 359 u64 rx_packets; 360 u64 rx_bytes; 361 u64 rx_discarded; 362 u64 rsc_num; 363#ifdef IXGBE_FDIR 364 u64 flm; 365#endif 366}; 367 368/* Our adapter structure */ 369struct adapter { 370 struct ifnet *ifp; 371 struct ixgbe_hw hw; 372 373 struct ixgbe_osdep osdep; 374 struct device *dev; 375 376 struct resource *pci_mem; 377 struct resource *msix_mem; 378 379 /* 380 * Interrupt resources: this set is 381 * either used for legacy, or for Link 382 * when doing MSIX 383 */ 384 void *tag; 385 struct resource *res; 386 387 struct ifmedia media; 388 struct callout timer; 389 int msix; 390 int if_flags; 391 392 struct mtx core_mtx; 393 394 eventhandler_tag vlan_attach; 395 eventhandler_tag vlan_detach; 396 397 u16 num_vlans; 398 u16 num_queues; 399 400 /* 401 ** Shadow VFTA table, this is needed because 402 ** the real vlan filter table gets cleared during 403 ** a soft reset and the driver needs to be able 404 ** to repopulate it. 405 */ 406 u32 shadow_vfta[IXGBE_VFTA_SIZE]; 407 408 /* Info about the interface */ 409 u32 optics; 410 u32 fc; /* local flow ctrl setting */ 411 int advertise; /* link speeds */ 412 bool link_active; 413 u16 max_frame_size; 414 u16 num_segs; 415 u32 link_speed; 416 bool link_up; 417 u32 linkvec; 418 419 /* Mbuf cluster size */ 420 u32 rx_mbuf_sz; 421 422 /* Support for pluggable optics */ 423 bool sfp_probe; 424 struct task link_task; /* Link tasklet */ 425 struct task mod_task; /* SFP tasklet */ 426 struct task msf_task; /* Multispeed Fiber */ 427#ifdef IXGBE_FDIR 428 int fdir_reinit; 429 struct task fdir_task; 430#endif 431 struct taskqueue *tq; 432 433 /* 434 ** Queues: 435 ** This is the irq holder, it has 436 ** and RX/TX pair or rings associated 437 ** with it. 438 */ 439 struct ix_queue *queues; 440 441 /* 442 * Transmit rings: 443 * Allocated at run time, an array of rings. 444 */ 445 struct tx_ring *tx_rings; 446 u32 num_tx_desc; 447 448 /* 449 * Receive rings: 450 * Allocated at run time, an array of rings. 451 */ 452 struct rx_ring *rx_rings; 453 u64 que_mask; 454 u32 num_rx_desc; 455 456 /* Multicast array memory */ 457 u8 *mta; 458 459 /* Misc stats maintained by the driver */ 460 unsigned long dropped_pkts; 461 unsigned long mbuf_defrag_failed; 462 unsigned long mbuf_header_failed; 463 unsigned long mbuf_packet_failed; 464 unsigned long watchdog_events; 465 unsigned long link_irq; 466 467 struct ixgbe_hw_stats stats; 468}; 469 470/* Precision Time Sync (IEEE 1588) defines */ 471#define ETHERTYPE_IEEE1588 0x88F7 472#define PICOSECS_PER_TICK 20833 473#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 474#define IXGBE_ADVTXD_TSTAMP 0x00080000 475 476 477#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 478 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 479#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 480#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 481#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 482#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 483#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 484#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 485#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 486#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 487#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 488#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 489#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 490#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 491 492 493static inline bool 494ixgbe_is_sfp(struct ixgbe_hw *hw) 495{ 496 switch (hw->phy.type) { 497 case ixgbe_phy_sfp_avago: 498 case ixgbe_phy_sfp_ftl: 499 case ixgbe_phy_sfp_intel: 500 case ixgbe_phy_sfp_unknown: 501 case ixgbe_phy_sfp_passive_tyco: 502 case ixgbe_phy_sfp_passive_unknown: 503 return TRUE; 504 default: 505 return FALSE; 506 } 507} 508 509/* Workaround to make 8.0 buildable */ 510#if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 511static __inline int 512drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) 513{ 514#ifdef ALTQ 515 if (ALTQ_IS_ENABLED(&ifp->if_snd)) 516 return (1); 517#endif 518 return (!buf_ring_empty(br)); 519} 520#endif 521 522/* 523** Find the number of unrefreshed RX descriptors 524*/ 525static inline u16 526ixgbe_rx_unrefreshed(struct rx_ring *rxr) 527{ 528 if (rxr->next_to_check > rxr->next_to_refresh) 529 return (rxr->next_to_check - rxr->next_to_refresh - 1); 530 else 531 return ((rxr->num_desc + rxr->next_to_check) - 532 rxr->next_to_refresh - 1); 533} 534 535#endif /* _IXGBE_H_ */ 536