ixgbe.h revision 215914 
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3  Copyright (c) 2001-2010, Intel Corporation
4  All rights reserved.
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32******************************************************************************/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 215914 2010-11-27 00:00:33Z jfv $*/
34
35
36#ifndef _IXGBE_H_
37#define _IXGBE_H_
38
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#if __FreeBSD_version >= 800000
43#include <sys/buf_ring.h>
44#endif
45#include <sys/mbuf.h>
46#include <sys/protosw.h>
47#include <sys/socket.h>
48#include <sys/malloc.h>
49#include <sys/kernel.h>
50#include <sys/module.h>
51#include <sys/sockio.h>
52
53#include <net/if.h>
54#include <net/if_arp.h>
55#include <net/bpf.h>
56#include <net/ethernet.h>
57#include <net/if_dl.h>
58#include <net/if_media.h>
59
60#include <net/bpf.h>
61#include <net/if_types.h>
62#include <net/if_vlan_var.h>
63
64#include <netinet/in_systm.h>
65#include <netinet/in.h>
66#include <netinet/if_ether.h>
67#include <netinet/ip.h>
68#include <netinet/ip6.h>
69#include <netinet/tcp.h>
70#include <netinet/tcp_lro.h>
71#include <netinet/udp.h>
72
73#include <machine/in_cksum.h>
74
75#include <sys/bus.h>
76#include <machine/bus.h>
77#include <sys/rman.h>
78#include <machine/resource.h>
79#include <vm/vm.h>
80#include <vm/pmap.h>
81#include <machine/clock.h>
82#include <dev/pci/pcivar.h>
83#include <dev/pci/pcireg.h>
84#include <sys/proc.h>
85#include <sys/sysctl.h>
86#include <sys/endian.h>
87#include <sys/taskqueue.h>
88#include <sys/pcpu.h>
89#include <sys/smp.h>
90#include <machine/smp.h>
91
92#ifdef IXGBE_IEEE1588
93#include <sys/ieee1588.h>
94#endif
95
96#include "ixgbe_api.h"
97
98/* Tunables */
99
100/*
101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
102 * number of transmit descriptors allocated by the driver. Increasing this
103 * value allows the driver to queue more transmits. Each descriptor is 16
104 * bytes. Performance tests have show the 2K value to be optimal for top
105 * performance.
106 */
107#define DEFAULT_TXD	1024
108#define PERFORM_TXD	2048
109#define MAX_TXD		4096
110#define MIN_TXD		64
111
112/*
113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
114 * number of receive descriptors allocated for each RX queue. Increasing this
115 * value allows the driver to buffer more incoming packets. Each descriptor
116 * is 16 bytes.  A receive buffer is also allocated for each descriptor.
117 *
118 * Note: with 8 rings and a dual port card, it is possible to bump up
119 *	against the system mbuf pool limit, you can tune nmbclusters
120 *	to adjust for this.
121 */
122#define DEFAULT_RXD	1024
123#define PERFORM_RXD	2048
124#define MAX_RXD		4096
125#define MIN_RXD		64
126
127/* Alignment for rings */
128#define DBA_ALIGN	128
129
130/*
131 * This parameter controls the maximum no of times the driver will loop in
132 * the isr. Minimum Value = 1
133 */
134#define MAX_LOOP	10
135
136/*
137 * This is the max watchdog interval, ie. the time that can
138 * pass between any two TX clean operations, such only happening
139 * when the TX hardware is functioning.
140 */
141#define IXGBE_WATCHDOG                   (10 * hz)
142
143/*
144 * This parameters control when the driver calls the routine to reclaim
145 * transmit descriptors.
146 */
147#define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
148#define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
149
150#define IXGBE_MAX_FRAME_SIZE	0x3F00
151
152/* Flow control constants */
153#define IXGBE_FC_PAUSE		0xFFFF
154#define IXGBE_FC_HI		0x20000
155#define IXGBE_FC_LO		0x10000
156
157/* Defines for printing debug information */
158#define DEBUG_INIT  0
159#define DEBUG_IOCTL 0
160#define DEBUG_HW    0
161
162#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
163#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
164#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
165#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
166#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
167#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
168#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
169#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
170#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
171
172#define MAX_NUM_MULTICAST_ADDRESSES     128
173#define IXGBE_82598_SCATTER		100
174#define IXGBE_82599_SCATTER		32
175#define MSIX_82598_BAR			3
176#define MSIX_82599_BAR			4
177#define IXGBE_TSO_SIZE			65535
178#define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
179#define IXGBE_RX_HDR			128
180#define IXGBE_VFTA_SIZE			128
181#define IXGBE_BR_SIZE			4096
182#define IXGBE_QUEUE_IDLE		0
183#define IXGBE_QUEUE_WORKING		1
184#define IXGBE_QUEUE_HUNG		2
185
186/* Offload bits in mbuf flag */
187#if __FreeBSD_version >= 800000
188#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
189#else
190#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP)
191#endif
192
193/* For 6.X code compatibility */
194#if !defined(ETHER_BPF_MTAP)
195#define ETHER_BPF_MTAP		BPF_MTAP
196#endif
197
198#if __FreeBSD_version < 700000
199#define CSUM_TSO		0
200#define IFCAP_TSO4		0
201#endif
202
203/*
204 * Interrupt Moderation parameters
205 */
206#define IXGBE_LOW_LATENCY	128
207#define IXGBE_AVE_LATENCY	400
208#define IXGBE_BULK_LATENCY	1200
209#define IXGBE_LINK_ITR		2000
210
211/*
212 *****************************************************************************
213 * vendor_info_array
214 *
215 * This array contains the list of Subvendor/Subdevice IDs on which the driver
216 * should load.
217 *
218 *****************************************************************************
219 */
220typedef struct _ixgbe_vendor_info_t {
221	unsigned int    vendor_id;
222	unsigned int    device_id;
223	unsigned int    subvendor_id;
224	unsigned int    subdevice_id;
225	unsigned int    index;
226} ixgbe_vendor_info_t;
227
228
229struct ixgbe_tx_buf {
230	u32		eop_index;
231	struct mbuf	*m_head;
232	bus_dmamap_t	map;
233};
234
235struct ixgbe_rx_buf {
236	struct mbuf	*m_head;
237	struct mbuf	*m_pack;
238	struct mbuf	*fmp;
239	bus_dmamap_t	hmap;
240	bus_dmamap_t	pmap;
241};
242
243/*
244 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
245 */
246struct ixgbe_dma_alloc {
247	bus_addr_t		dma_paddr;
248	caddr_t			dma_vaddr;
249	bus_dma_tag_t		dma_tag;
250	bus_dmamap_t		dma_map;
251	bus_dma_segment_t	dma_seg;
252	bus_size_t		dma_size;
253	int			dma_nseg;
254};
255
256/*
257** Driver queue struct: this is the interrupt container
258**  for the associated tx and rx ring.
259*/
260struct ix_queue {
261	struct adapter		*adapter;
262	u32			msix;           /* This queue's MSIX vector */
263	u32			eims;           /* This queue's EIMS bit */
264	u32			eitr_setting;
265	struct resource		*res;
266	void			*tag;
267	struct tx_ring		*txr;
268	struct rx_ring		*rxr;
269	struct task		que_task;
270	struct taskqueue	*tq;
271	u64			irqs;
272};
273
274/*
275 * The transmit ring, one per queue
276 */
277struct tx_ring {
278        struct adapter		*adapter;
279	struct mtx		tx_mtx;
280	u32			me;
281	int			queue_status;
282	int			watchdog_time;
283	union ixgbe_adv_tx_desc	*tx_base;
284	struct ixgbe_dma_alloc	txdma;
285	u32			next_avail_desc;
286	u32			next_to_clean;
287	struct ixgbe_tx_buf	*tx_buffers;
288	volatile u16		tx_avail;
289	u32			txd_cmd;
290	bus_dma_tag_t		txtag;
291	char			mtx_name[16];
292#if __FreeBSD_version >= 800000
293	struct buf_ring		*br;
294#endif
295#ifdef IXGBE_FDIR
296	u16			atr_sample;
297	u16			atr_count;
298#endif
299	u32			bytes;  /* used for AIM */
300	u32			packets;
301	/* Soft Stats */
302	u64			no_desc_avail;
303	u64			total_packets;
304};
305
306
307/*
308 * The Receive ring, one per rx queue
309 */
310struct rx_ring {
311        struct adapter		*adapter;
312	struct mtx		rx_mtx;
313	u32			me;
314	union ixgbe_adv_rx_desc	*rx_base;
315	struct ixgbe_dma_alloc	rxdma;
316	struct lro_ctrl		lro;
317	bool			lro_enabled;
318	bool			hdr_split;
319	bool			hw_rsc;
320	bool			discard;
321        u32			next_to_refresh;
322        u32 			next_to_check;
323	char			mtx_name[16];
324	struct ixgbe_rx_buf	*rx_buffers;
325	bus_dma_tag_t		htag;
326	bus_dma_tag_t		ptag;
327
328	u32			bytes; /* Used for AIM calc */
329	u32			packets;
330
331	/* Soft stats */
332	u64			rx_irq;
333	u64			rx_split_packets;
334	u64			rx_packets;
335	u64 			rx_bytes;
336	u64 			rx_discarded;
337	u64 			rsc_num;
338#ifdef IXGBE_FDIR
339	u64			flm;
340#endif
341};
342
343/* Our adapter structure */
344struct adapter {
345	struct ifnet		*ifp;
346	struct ixgbe_hw		hw;
347
348	struct ixgbe_osdep	osdep;
349	struct device		*dev;
350
351	struct resource		*pci_mem;
352	struct resource		*msix_mem;
353
354	/*
355	 * Interrupt resources: this set is
356	 * either used for legacy, or for Link
357	 * when doing MSIX
358	 */
359	void			*tag;
360	struct resource 	*res;
361
362	struct ifmedia		media;
363	struct callout		timer;
364	int			msix;
365	int			if_flags;
366
367	struct mtx		core_mtx;
368
369	eventhandler_tag 	vlan_attach;
370	eventhandler_tag 	vlan_detach;
371
372	u16			num_vlans;
373	u16			num_queues;
374
375	/*
376	** Shadow VFTA table, this is needed because
377	** the real vlan filter table gets cleared during
378	** a soft reset and the driver needs to be able
379	** to repopulate it.
380	*/
381	u32			shadow_vfta[IXGBE_VFTA_SIZE];
382
383	/* Info about the interface */
384	u32			optics;
385	int			advertise;  /* link speeds */
386	bool			link_active;
387	u16			max_frame_size;
388	u32			link_speed;
389	bool			link_up;
390	u32 			linkvec;
391
392	/* Mbuf cluster size */
393	u32			rx_mbuf_sz;
394
395	/* Support for pluggable optics */
396	bool			sfp_probe;
397	struct task     	link_task;  /* Link tasklet */
398	struct task     	mod_task;   /* SFP tasklet */
399	struct task     	msf_task;   /* Multispeed Fiber */
400#ifdef IXGBE_FDIR
401	int			fdir_reinit;
402	struct task     	fdir_task;
403#endif
404	struct taskqueue	*tq;
405
406	/*
407	** Queues:
408	**   This is the irq holder, it has
409	**   and RX/TX pair or rings associated
410	**   with it.
411	*/
412	struct ix_queue		*queues;
413
414	/*
415	 * Transmit rings:
416	 *	Allocated at run time, an array of rings.
417	 */
418	struct tx_ring		*tx_rings;
419	int			num_tx_desc;
420
421	/*
422	 * Receive rings:
423	 *	Allocated at run time, an array of rings.
424	 */
425	struct rx_ring		*rx_rings;
426	int			num_rx_desc;
427	u64			que_mask;
428	u32			rx_process_limit;
429
430	/* Multicast array memory */
431	u8			*mta;
432
433	/* Misc stats maintained by the driver */
434	unsigned long   	dropped_pkts;
435	unsigned long   	mbuf_defrag_failed;
436	unsigned long   	mbuf_header_failed;
437	unsigned long   	mbuf_packet_failed;
438	unsigned long   	no_tx_map_avail;
439	unsigned long   	no_tx_dma_setup;
440	unsigned long   	watchdog_events;
441	unsigned long   	tso_tx;
442	unsigned long		link_irq;
443
444	struct ixgbe_hw_stats 	stats;
445};
446
447/* Precision Time Sync (IEEE 1588) defines */
448#define ETHERTYPE_IEEE1588      0x88F7
449#define PICOSECS_PER_TICK       20833
450#define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
451#define IXGBE_ADVTXD_TSTAMP	0x00080000
452
453
454#define IXGBE_CORE_LOCK_INIT(_sc, _name) \
455        mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
456#define IXGBE_CORE_LOCK_DESTROY(_sc)      mtx_destroy(&(_sc)->core_mtx)
457#define IXGBE_TX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->tx_mtx)
458#define IXGBE_RX_LOCK_DESTROY(_sc)        mtx_destroy(&(_sc)->rx_mtx)
459#define IXGBE_CORE_LOCK(_sc)              mtx_lock(&(_sc)->core_mtx)
460#define IXGBE_TX_LOCK(_sc)                mtx_lock(&(_sc)->tx_mtx)
461#define IXGBE_TX_TRYLOCK(_sc)             mtx_trylock(&(_sc)->tx_mtx)
462#define IXGBE_RX_LOCK(_sc)                mtx_lock(&(_sc)->rx_mtx)
463#define IXGBE_CORE_UNLOCK(_sc)            mtx_unlock(&(_sc)->core_mtx)
464#define IXGBE_TX_UNLOCK(_sc)              mtx_unlock(&(_sc)->tx_mtx)
465#define IXGBE_RX_UNLOCK(_sc)              mtx_unlock(&(_sc)->rx_mtx)
466#define IXGBE_CORE_LOCK_ASSERT(_sc)       mtx_assert(&(_sc)->core_mtx, MA_OWNED)
467#define IXGBE_TX_LOCK_ASSERT(_sc)         mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
468
469
470static inline bool
471ixgbe_is_sfp(struct ixgbe_hw *hw)
472{
473	switch (hw->phy.type) {
474	case ixgbe_phy_sfp_avago:
475	case ixgbe_phy_sfp_ftl:
476	case ixgbe_phy_sfp_intel:
477	case ixgbe_phy_sfp_unknown:
478	case ixgbe_phy_sfp_passive_tyco:
479	case ixgbe_phy_sfp_passive_unknown:
480		return TRUE;
481	default:
482		return FALSE;
483	}
484}
485
486/* Workaround to make 8.0 buildable */
487#if __FreeBSD_version < 800504
488static __inline int
489drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
490{
491#ifdef ALTQ
492        if (ALTQ_IS_ENABLED(&ifp->if_snd))
493                return (1);
494#endif
495        return (!buf_ring_empty(br));
496}
497#endif
498
499#endif /* _IXGBE_H_ */
500